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NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:047243/0001   Pages: 959
Recorded: 08/23/2018
Attorney Dkt #:4816.238
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
09/13/2005
Application #:
10207526
Filing Dt:
07/29/2002
Publication #:
Pub Dt:
01/29/2004
Title:
METHOD, CIRCUIT AND SYSTEM FOR DETERMINING BURN-IN RELIABILITY FROM WAFER LEVEL BURN-IN
2
Patent #:
Issue Dt:
05/20/2003
Application #:
10207572
Filing Dt:
07/29/2002
Publication #:
Pub Dt:
12/12/2002
Title:
LEAD-OVER-CHIP LEADFRAMES
3
Patent #:
Issue Dt:
04/15/2003
Application #:
10208063
Filing Dt:
07/30/2002
Publication #:
Pub Dt:
12/19/2002
Title:
SCHEME FOR DELAY LOCKED LOOP RESET PROTECTION
4
Patent #:
Issue Dt:
10/28/2003
Application #:
10208154
Filing Dt:
07/29/2002
Publication #:
Pub Dt:
03/13/2003
Title:
CAPACITOR DIELECTRIC HAVING PEROVSKITE- TYPE CRYSTALLINE STRUCTURE
5
Patent #:
Issue Dt:
12/30/2003
Application #:
10208335
Filing Dt:
07/30/2002
Title:
METHOD FOR ALIGNING AND CONNECTING SEMICONDUCTOR COMPONENTS TO SUBSTRATES
6
Patent #:
Issue Dt:
03/11/2003
Application #:
10208987
Filing Dt:
07/31/2002
Publication #:
Pub Dt:
12/12/2002
Title:
METHOD OF MANUFACTURING A SEMICONDUCTOR STRUCTURE HAVING STACKED SEMICONDUCTOR DEVICES
7
Patent #:
Issue Dt:
08/26/2003
Application #:
10209269
Filing Dt:
07/30/2002
Publication #:
Pub Dt:
12/19/2002
Title:
SEMICONDUCTOR PROCESSING METHODS OF FORMING INTEGRATED CIRCUITRY MEMORY DEVICES, METHODS OF FORMING CAPACITOR CONTAINERS, METHODS OF MAKING ELECTRICAL CONNECTION TO CIRCUIT NODES AND RELATED INTEGRATED CIRCUITRY
8
Patent #:
Issue Dt:
11/18/2003
Application #:
10209504
Filing Dt:
07/31/2002
Publication #:
Pub Dt:
12/26/2002
Title:
SELECTIVE POLYSILICON STUD GROWTH
9
Patent #:
Issue Dt:
07/26/2005
Application #:
10209581
Filing Dt:
07/30/2002
Publication #:
Pub Dt:
02/05/2004
Title:
ATOMIC LAYER DEPOSITED NANOLAMINATES OF HFO2/ZRO2 FILMS AS GATE DIELECTRICS
10
Patent #:
Issue Dt:
07/15/2008
Application #:
10209753
Filing Dt:
07/31/2002
Publication #:
Pub Dt:
12/12/2002
Title:
BALL GRID ARRAY PACKAGES WITH THERMALLY CONDUCTIVE CONTAINERS
11
Patent #:
Issue Dt:
03/16/2004
Application #:
10209820
Filing Dt:
07/31/2002
Publication #:
Pub Dt:
01/30/2003
Title:
METHOD OF FORMING INTEGRATED CIRCUITRY, METHOD OF FORMING A CAPACITOR, METHOD OF FORMING DRAM INTEGRATED CIRCUITRY, INTEGRATED CIRCUITRY AND DRAM INTEGRATED CIRCUITRY
12
Patent #:
Issue Dt:
10/05/2004
Application #:
10209823
Filing Dt:
07/31/2002
Publication #:
Pub Dt:
02/05/2004
Title:
SEMICONDUCTOR DICE HAVING BACKSIDE REDISTRIBUTION LAYER ACCESSED USING THROUGH-SILICON VIAS, METHODS OF FABRICATION AND ASSEMBLIES
13
Patent #:
Issue Dt:
06/24/2003
Application #:
10209865
Filing Dt:
08/02/2002
Publication #:
Pub Dt:
12/19/2002
Title:
METHOD OF FORMING TRENCH ISOLATION REGIONS
14
Patent #:
Issue Dt:
12/16/2003
Application #:
10210423
Filing Dt:
07/31/2002
Publication #:
Pub Dt:
12/12/2002
Title:
METHODS OF FABRICATING CARRIER SUBSTRATES AND SEMICONDUCTOR DEVICES
15
Patent #:
Issue Dt:
09/20/2005
Application #:
10210579
Filing Dt:
07/30/2002
Publication #:
Pub Dt:
10/23/2003
Title:
PROVIDING A REGISTER FILE MEMORY WITH LOCAL ADDRESSING IN A SIMD PARALLEL PROCESSOR
16
Patent #:
Issue Dt:
08/19/2003
Application #:
10210633
Filing Dt:
07/31/2002
Publication #:
Pub Dt:
12/12/2002
Title:
FILM ON A SURFACE OF A MOLD USED DURING SEMICONDUCTOR DEVICE FABRICATION
17
Patent #:
Issue Dt:
03/02/2004
Application #:
10210926
Filing Dt:
08/02/2002
Title:
ELECTRONIC ASSEMBLIES CONTAINING BOW RESISTANT SEMICONDUCTOR PACKAGES
18
Patent #:
Issue Dt:
03/02/2004
Application #:
10211021
Filing Dt:
08/02/2002
Publication #:
Pub Dt:
02/05/2004
Title:
STACKED SEMICONDUCTOR PACKAGE AND METHOD PRODUCING SAME
19
Patent #:
Issue Dt:
04/03/2007
Application #:
10211036
Filing Dt:
08/02/2002
Publication #:
Pub Dt:
02/05/2004
Title:
SYSTEM AND METHOD FOR OPTICALLY INTERCONNECTING MEMORY DEVICES
20
Patent #:
Issue Dt:
09/27/2005
Application #:
10211465
Filing Dt:
08/01/2002
Publication #:
Pub Dt:
02/05/2004
Title:
DYNAMIC POWER LEVEL CONTROL BASED ON A BOARD LATCH STATE
21
Patent #:
Issue Dt:
01/27/2004
Application #:
10211476
Filing Dt:
08/01/2002
Publication #:
Pub Dt:
02/05/2004
Title:
EDGE INTENSIVE ANTIFUSE DEVICE STRUCTURE
22
Patent #:
Issue Dt:
03/30/2004
Application #:
10211924
Filing Dt:
08/01/2002
Publication #:
Pub Dt:
12/12/2002
Title:
COMPUTER INCLUDING INSTALLABLE AND REMOVABLE CARDS, OPTICAL INTERCONNECTION BETWEEN CARDS, AND METHOD OF ASSEMBLING A COMPUTER
23
Patent #:
Issue Dt:
08/17/2004
Application #:
10212518
Filing Dt:
08/05/2002
Publication #:
Pub Dt:
02/05/2004
Title:
GLOBAL COLUMN SELECT STRUCTURE FOR ACCESSING A MEMORY
24
Patent #:
Issue Dt:
07/18/2006
Application #:
10212544
Filing Dt:
08/05/2002
Publication #:
Pub Dt:
12/05/2002
Title:
MEMORY CELL WITH SELECTIVE DEPOSITION OF REFRACTORY METALS
25
Patent #:
Issue Dt:
06/07/2005
Application #:
10212561
Filing Dt:
08/05/2002
Publication #:
Pub Dt:
02/05/2004
Title:
SILICON RICH BARRIER LAYERS FOR INTEGRATED CIRCUIT DEVICES
26
Patent #:
Issue Dt:
10/21/2003
Application #:
10212625
Filing Dt:
08/01/2002
Publication #:
Pub Dt:
12/19/2002
Title:
SOI CMOS DEVICE WITH REDUCED DIBL
27
Patent #:
Issue Dt:
07/27/2004
Application #:
10212630
Filing Dt:
08/05/2002
Publication #:
Pub Dt:
02/05/2004
Title:
REFRESHING MEMORY CELLS OF A PHASE CHANGE MATERIAL MEMORY DEVICE
28
Patent #:
Issue Dt:
07/22/2003
Application #:
10212892
Filing Dt:
08/05/2002
Publication #:
Pub Dt:
12/19/2002
Title:
METHOD FOR STABILIZING HIGH PRESSURE OXIDATION OF A SEMICONDUCTOR DEVICE
29
Patent #:
Issue Dt:
02/03/2004
Application #:
10212893
Filing Dt:
08/05/2002
Publication #:
Pub Dt:
12/19/2002
Title:
APPARATUS FOR FILLING A GAP BETWEEN SPACED LAYERS OF A SEMICONDUCTOR
30
Patent #:
Issue Dt:
08/26/2003
Application #:
10212903
Filing Dt:
08/05/2002
Publication #:
Pub Dt:
12/12/2002
Title:
DEVICE AND METHOD FOR MARGIN TESTING A SEMICONDUCTOR MEMORY BY APPLYING A STRESSING VOLTAGE SIMULTANEOUSLY TO COMPLEMENTARY AND TRUE DIGIT LINES
31
Patent #:
Issue Dt:
07/13/2004
Application #:
10212937
Filing Dt:
08/05/2002
Publication #:
Pub Dt:
12/19/2002
Title:
NUCLEATION FOR IMPROVED FLASH ERASE CHARACTERISTICS
32
Patent #:
Issue Dt:
10/03/2006
Application #:
10213038
Filing Dt:
08/05/2002
Publication #:
Pub Dt:
02/05/2004
Title:
MEMORY HUB AND ACCESS METHOD HAVING INTERNAL ROW CACHING
33
Patent #:
Issue Dt:
03/30/2004
Application #:
10213086
Filing Dt:
08/07/2002
Publication #:
Pub Dt:
02/12/2004
Title:
METHOD TO REMOVE AN OXIDE SEAM ALONG GATE STACK EDGE, WHEN NITRIDE SPACE FORMATION BEGINS WITH AN OXIDE LINER SURROUNDING GATE STACK
34
Patent #:
Issue Dt:
06/03/2003
Application #:
10213121
Filing Dt:
08/05/2002
Publication #:
Pub Dt:
12/12/2002
Title:
DEVICE AND METHOD FOR REPAIRING A SEMICONDUCTOR MEMORY
35
Patent #:
Issue Dt:
02/08/2005
Application #:
10213128
Filing Dt:
08/05/2002
Publication #:
Pub Dt:
03/27/2003
Title:
UTILIZE ULTRASONIC ENERGY TO REDUCE THE INITIAL CONTACT FORCES IN KNOWN-GOOD-DIE OR PERMANENT CONTACT SYSTEMS
36
Patent #:
Issue Dt:
09/23/2003
Application #:
10213160
Filing Dt:
08/06/2002
Publication #:
Pub Dt:
12/19/2002
Title:
METHODS OF ATTACHING A SEMICONDUCTOR CHIP TO A LEADFRAME WITH A FOOTPRINT OF ABOUT THE SAME SIZE AS THE CHIP
37
Patent #:
Issue Dt:
06/03/2003
Application #:
10213295
Filing Dt:
08/06/2002
Publication #:
Pub Dt:
12/12/2002
Title:
METHOD FOR PROVIDING AN ALIGNMENT DIFFRACTION GRATING FOR PHOTOLITHOGRAPHIC ALIGNMENT DURING SEMICONDUCTOR FABRICATION
38
Patent #:
Issue Dt:
07/05/2005
Application #:
10213306
Filing Dt:
08/06/2002
Publication #:
Pub Dt:
12/26/2002
Title:
METHOD OF USING TANTALUM-ALUMINUM-NITROGEN MATERIAL AS DIFFUSION BARRIER AND ADHESION LAYER IN SEMICONDUCTOR DEVICES
39
Patent #:
Issue Dt:
01/11/2005
Application #:
10213623
Filing Dt:
08/06/2002
Publication #:
Pub Dt:
02/12/2004
Title:
METHODS OF FORMING PATTERNED RETICLES
40
Patent #:
Issue Dt:
04/19/2005
Application #:
10214167
Filing Dt:
08/08/2002
Publication #:
Pub Dt:
03/25/2004
Title:
STACKED COLUMNAR RESISTIVE MEMORY STRUCTURE AND ITS METHOD OF FORMATION AND OPERATION
41
Patent #:
Issue Dt:
08/24/2004
Application #:
10214169
Filing Dt:
08/08/2002
Publication #:
Pub Dt:
12/12/2002
Title:
INTERCONNECT LINE SELECTIVELY ISOLATED FROM AN UNDERLYING CONTACT PLUG
42
Patent #:
Issue Dt:
04/25/2006
Application #:
10214630
Filing Dt:
08/07/2002
Publication #:
Pub Dt:
02/12/2004
Title:
PRACTICAL CODING AND METRIC CALCULATION FOR THE LATTICE INTERFERED CHANNEL
43
Patent #:
Issue Dt:
08/03/2004
Application #:
10214805
Filing Dt:
08/07/2002
Publication #:
Pub Dt:
02/12/2004
Title:
MAGNETORESISTIVE MEMORY AND METHOD OF MANUFACTURING THE SAME
44
Patent #:
Issue Dt:
08/01/2006
Application #:
10215214
Filing Dt:
08/08/2002
Publication #:
Pub Dt:
02/12/2004
Title:
PHOTOLITHOGRAPHIC TECHNIQUES FOR PRODUCING ANGLED LINES
45
Patent #:
Issue Dt:
07/18/2006
Application #:
10215215
Filing Dt:
08/08/2002
Publication #:
Pub Dt:
02/12/2004
Title:
METHODS AND COMPOSITIONS FOR REMOVING GROUP VIII METAL-CONTAINING MATERIALS FROM SURFACES
46
Patent #:
Issue Dt:
05/06/2008
Application #:
10215462
Filing Dt:
08/09/2002
Publication #:
Pub Dt:
12/19/2002
Title:
LOW LEAKAGE MIM CAPACITOR
47
Patent #:
Issue Dt:
08/07/2007
Application #:
10215505
Filing Dt:
08/09/2002
Publication #:
Pub Dt:
02/12/2004
Title:
SYSTEM AND METHOD FOR MULTIPLE BIT OPTICAL DATA TRANSMISSION IN MEMORY SYSTEMS
48
Patent #:
Issue Dt:
06/07/2005
Application #:
10215513
Filing Dt:
08/08/2002
Publication #:
Pub Dt:
12/12/2002
Title:
METHOD OF FORMING A ROUGH (HIGH SURFACE AREA) ELECTRODE FROM TI AND TIN CAPACITORS AND SEMICONDUCTOR DEVICES INCLUDING SAME
49
Patent #:
Issue Dt:
04/06/2004
Application #:
10215519
Filing Dt:
08/09/2002
Publication #:
Pub Dt:
02/12/2004
Title:
METHODS FOR FORMING DUAL GATE OXIDES
50
Patent #:
Issue Dt:
03/08/2011
Application #:
10215549
Filing Dt:
08/08/2002
Publication #:
Pub Dt:
02/12/2004
Title:
EXECUTING APPLICATIONS FROM A SEMICONDUCTOR NONVOLATILE MEMORY
51
Patent #:
Issue Dt:
06/17/2003
Application #:
10215571
Filing Dt:
08/08/2002
Publication #:
Pub Dt:
12/12/2002
Title:
COUPLING SPACED BOND PADS TO A CONTACT
52
Patent #:
Issue Dt:
02/27/2007
Application #:
10215732
Filing Dt:
08/09/2002
Publication #:
Pub Dt:
02/12/2004
Title:
MULTI-FUNCTIONAL SOLDER AND ARTICLES MADE THEREWITH, SUCH AS MICROELECTRONIC COMPONENTS
53
Patent #:
Issue Dt:
12/28/2004
Application #:
10215898
Filing Dt:
08/08/2002
Publication #:
Pub Dt:
02/12/2004
Title:
METHOD OF FORMING A MEMORY TRANSISTOR COMPRISING A SCHOTTKY CONTACT
54
Patent #:
Issue Dt:
04/12/2005
Application #:
10215915
Filing Dt:
08/08/2002
Publication #:
Pub Dt:
02/12/2004
Title:
CONDUCTIVE STRUCTURE FOR MICROELECTRONIC DEVICES AND METHODS OF FABRICATING SUCH STRUCTURES
55
Patent #:
Issue Dt:
09/07/2004
Application #:
10215991
Filing Dt:
08/09/2002
Publication #:
Pub Dt:
12/12/2002
Title:
PROCESS FOR THE FORMATION OF RUSIXOY-CONTAINING BARRIER LAYERS FOR HIGH-K DIELECTRICS
56
Patent #:
Issue Dt:
05/31/2005
Application #:
10216080
Filing Dt:
08/07/2002
Publication #:
Pub Dt:
09/25/2003
Title:
MEMORY DEVICE WITH MULTI-LEVEL STORAGE CELLS AND APPARATUSES, SYSTEMS AND METHODS INCLUDING SAME
57
Patent #:
Issue Dt:
07/18/2006
Application #:
10216439
Filing Dt:
08/12/2002
Publication #:
Pub Dt:
02/12/2004
Title:
METHOD AND APPARATUS USING PARASITIC CAPACITANCE FOR SYNCHRONIZING SIGNALS A DEVICE
58
Patent #:
Issue Dt:
12/13/2005
Application #:
10216580
Filing Dt:
08/08/2002
Publication #:
Pub Dt:
02/12/2004
Title:
ELECTRONIC DEVICES INCORPORATING ELECTRICAL INTERCONNECTIONS WITH IMPROVED RELIABILITY AND METHODS OF FABRICATING SAME
59
Patent #:
Issue Dt:
09/28/2004
Application #:
10216698
Filing Dt:
08/08/2002
Publication #:
Pub Dt:
02/12/2004
Title:
METHODS AND APPARATUS FOR SIGNAL PROCESSING
60
Patent #:
Issue Dt:
08/10/2004
Application #:
10216804
Filing Dt:
08/13/2002
Publication #:
Pub Dt:
02/19/2004
Title:
CAPACITOR LAYOUT TECHNIQUE FOR REDUCTION OF FIXED PATTERN NOISE IN A CMOS SENSOR
61
Patent #:
Issue Dt:
01/13/2004
Application #:
10216990
Filing Dt:
08/12/2002
Publication #:
Pub Dt:
12/19/2002
Title:
ROW DECODED BIASING OF SENSE AMPLIFIER FOR IMPROVED ONE'S MARGIN
62
Patent #:
Issue Dt:
07/22/2003
Application #:
10217562
Filing Dt:
08/12/2002
Publication #:
Pub Dt:
04/10/2003
Title:
METHODS OF FORMING A FIELD EFFECT TRANSISTORS
63
Patent #:
Issue Dt:
04/26/2005
Application #:
10217600
Filing Dt:
08/13/2002
Publication #:
Pub Dt:
02/19/2004
Title:
CLOSED FLUX MAGNETIC MEMORY
64
Patent #:
Issue Dt:
03/13/2007
Application #:
10217618
Filing Dt:
08/13/2002
Publication #:
Pub Dt:
02/13/2003
Title:
SEMICONDUCTOR MANUFACTURING SYSTEM FOR FORMING METALLIZATION LAYER
65
Patent #:
Issue Dt:
01/29/2008
Application #:
10217644
Filing Dt:
08/14/2002
Publication #:
Pub Dt:
02/19/2004
Title:
DATA PACKET HEADER CONVERSION
66
Patent #:
Issue Dt:
03/01/2005
Application #:
10217665
Filing Dt:
08/12/2002
Publication #:
Pub Dt:
02/12/2004
Title:
APPARATUS AND METHODS FOR REGULATED VOLTAGE
67
Patent #:
Issue Dt:
07/29/2008
Application #:
10217667
Filing Dt:
08/12/2002
Publication #:
Pub Dt:
12/19/2002
Title:
METHOD AND APPARATUS FOR REMOVING ENCAPSULATING MATERIAL FROM A PACKAGED MICROELECTRONIC DEVICE
68
Patent #:
Issue Dt:
10/07/2003
Application #:
10217719
Filing Dt:
08/13/2002
Publication #:
Pub Dt:
12/19/2002
Title:
SELF-ALIGNED PECVD ETCH MASK
69
Patent #:
Issue Dt:
06/02/2009
Application #:
10218047
Filing Dt:
08/13/2002
Publication #:
Pub Dt:
02/19/2004
Title:
METHODS FOR FORMING OPENINGS IN DOPED SILICON DIOXIDE
70
Patent #:
Issue Dt:
08/12/2003
Application #:
10218258
Filing Dt:
08/13/2002
Publication #:
Pub Dt:
01/02/2003
Title:
GATE COUPLED VOLTAGE SUPPORT FOR AN OUTPUT DRIVER CIRCUIT
71
Patent #:
Issue Dt:
07/15/2003
Application #:
10218268
Filing Dt:
08/13/2002
Title:
SELECTIVE PASSIVATION OF EXPOSED SILICON
72
Patent #:
Issue Dt:
05/03/2005
Application #:
10218273
Filing Dt:
08/13/2002
Publication #:
Pub Dt:
12/19/2002
Title:
METHOD FOR USING THIN SPACERS AND OXIDATION IN GATE OXIDES
73
Patent #:
Issue Dt:
01/06/2004
Application #:
10218275
Filing Dt:
08/13/2002
Publication #:
Pub Dt:
12/12/2002
Title:
MULTI CHIP SEMICONDUCTOR PACKAGE AND METHOD OF CONSTRUCTION
74
Patent #:
Issue Dt:
10/07/2003
Application #:
10218278
Filing Dt:
08/13/2002
Publication #:
Pub Dt:
12/26/2002
Title:
METHOD AND APPARATUS FOR TESTING BUMPED DIE
75
Patent #:
Issue Dt:
03/16/2004
Application #:
10218281
Filing Dt:
08/13/2002
Publication #:
Pub Dt:
12/19/2002
Title:
METHOD FOR FILLING A GAP BETWEEN SPACED LAYERS OF A SEMICONDUCTOR
76
Patent #:
Issue Dt:
08/09/2005
Application #:
10218379
Filing Dt:
08/13/2002
Publication #:
Pub Dt:
12/12/2002
Title:
METHOD AND APPARATUS FOR TESTING BUMPED DIE
77
Patent #:
Issue Dt:
11/11/2003
Application #:
10218511
Filing Dt:
08/15/2002
Publication #:
Pub Dt:
12/19/2002
Title:
CLOCKED PASS TRANSISTOR AND COMPLEMENTARY PASS TRANSISTOR LOGIC CIRCUITS
78
Patent #:
Issue Dt:
02/15/2005
Application #:
10218586
Filing Dt:
08/15/2002
Publication #:
Pub Dt:
02/19/2004
Title:
PROGRAMMABLE EMBEDDED DRAM CURRENT MONITOR
79
Patent #:
Issue Dt:
11/23/2004
Application #:
10218677
Filing Dt:
08/14/2002
Publication #:
Pub Dt:
03/13/2003
Title:
FAST SENSING SCHEME FOR FLOATING-GATE MEMORY CELLS
80
Patent #:
Issue Dt:
07/20/2004
Application #:
10219118
Filing Dt:
08/14/2002
Publication #:
Pub Dt:
12/12/2002
Title:
IC PACKAGE WITH DUAL HEAT SPREADERS
81
Patent #:
Issue Dt:
03/13/2007
Application #:
10219543
Filing Dt:
08/16/2002
Publication #:
Pub Dt:
02/19/2004
Title:
CMOS IMAGER DECODER STRUCTURE
82
Patent #:
Issue Dt:
11/15/2005
Application #:
10219604
Filing Dt:
08/15/2002
Publication #:
Pub Dt:
02/19/2004
Title:
SEMICONDUCTOR DICE PACKAGES EMPLOYING AT LEAST ONE REDISTRIBUTION LAYER AND METHODS OF FABRICATION
83
Patent #:
Issue Dt:
07/01/2003
Application #:
10219721
Filing Dt:
08/15/2002
Publication #:
Pub Dt:
12/26/2002
Title:
ELECTRONIC DEVICE WITH LOCALLY REDUCED EFFECTS ON ANALOG SIGNALS
84
Patent #:
Issue Dt:
04/26/2005
Application #:
10219870
Filing Dt:
08/15/2002
Publication #:
Pub Dt:
02/19/2004
Title:
LANTHANIDE DOPED TIOX DIELECTRIC FILMS BY PLASMA OXIDATION
85
Patent #:
Issue Dt:
09/14/2004
Application #:
10219878
Filing Dt:
08/15/2002
Publication #:
Pub Dt:
02/19/2004
Title:
LANTHANIDE DOPED TIOX DIELECTRIC FILMS
86
Patent #:
Issue Dt:
06/22/2004
Application #:
10222067
Filing Dt:
08/16/2002
Publication #:
Pub Dt:
12/26/2002
Title:
TRANSVERSE HYBRID LOC PACKAGE
87
Patent #:
Issue Dt:
12/02/2003
Application #:
10222103
Filing Dt:
08/16/2002
Publication #:
Pub Dt:
01/02/2003
Title:
COMPRESSION LAYER ON THE LEADFRAME TO REDUCE STRESS DEFECTS
88
Patent #:
Issue Dt:
07/08/2003
Application #:
10222113
Filing Dt:
08/16/2002
Publication #:
Pub Dt:
01/30/2003
Title:
APPARATUS FOR DISABLING AND RE-ENABLING ACCESS TO IC TEST FUNCTIONS
89
Patent #:
Issue Dt:
04/26/2005
Application #:
10222238
Filing Dt:
08/16/2002
Publication #:
Pub Dt:
02/19/2004
Title:
METHODS AND SYSTEMS FOR PLANARIZING MICROELECTRONIC DEVICES WITH GE-SE-AG LAYERS
90
Patent #:
Issue Dt:
05/03/2005
Application #:
10222290
Filing Dt:
08/15/2002
Publication #:
Pub Dt:
05/06/2004
Title:
GAS DELIVERY SYSTEM FOR PULSED-TYPE DEPOSITION PROCESSES USED IN THE MANUFACTURING OF MICRO-DEVICES
91
Patent #:
Issue Dt:
03/15/2005
Application #:
10222305
Filing Dt:
08/15/2002
Publication #:
Pub Dt:
04/17/2003
Title:
INTEGRATED CIRCUITRY
92
Patent #:
Issue Dt:
07/04/2006
Application #:
10222326
Filing Dt:
08/15/2002
Publication #:
Pub Dt:
02/19/2004
Title:
METHODS OF FORMING A FIELD EFFECT TRANSISTOR HAVING SOURCE/DRAIN MATERIAL OVER INSULATIVE MATERIAL
93
Patent #:
Issue Dt:
04/13/2004
Application #:
10222330
Filing Dt:
08/15/2002
Publication #:
Pub Dt:
03/06/2003
Title:
METHODS OF FORMING CAPACITOR CONSTRUCTIONS
94
Patent #:
Issue Dt:
02/01/2005
Application #:
10222456
Filing Dt:
08/16/2002
Publication #:
Pub Dt:
02/19/2004
Title:
LATENCY REDUCTION USING NEGATIVE CLOCK EDGE AND READ FLAGS
95
Patent #:
Issue Dt:
04/04/2006
Application #:
10222827
Filing Dt:
08/19/2002
Publication #:
Pub Dt:
02/19/2004
Title:
CMOS IMAGER HAVING ON-CHIP ROM
96
Patent #:
Issue Dt:
05/15/2007
Application #:
10222997
Filing Dt:
08/19/2002
Publication #:
Pub Dt:
08/19/2004
Title:
METHOD OF FORMING VERTICAL SUB-MICRON CMOS TRANSISTORS ON (110), (111), (311), (511), AND HIGHER ORDER SURFACES OF BULK, SOI AND THIN FILM STRUCTURES
97
Patent #:
Issue Dt:
12/30/2003
Application #:
10223257
Filing Dt:
08/15/2002
Title:
DIFFERENTIAL BUFFER HAVING BIAS CURRENT GATED BY ASSOCIATED SIGNAL
98
Patent #:
Issue Dt:
03/29/2005
Application #:
10223315
Filing Dt:
08/19/2002
Publication #:
Pub Dt:
02/19/2004
Title:
ACTIVATION OF OXIDES FOR ELECTROLESS PLATING
99
Patent #:
Issue Dt:
01/27/2004
Application #:
10223425
Filing Dt:
08/19/2002
Publication #:
Pub Dt:
01/02/2003
Title:
CHEMICAL VAPOR DEPOSITION SYSTEMS INCLUDING METAL COMPLEXES WITH CHELATING O- AND/OR N-DONOR LIGANDS
100
Patent #:
Issue Dt:
01/27/2004
Application #:
10223869
Filing Dt:
08/20/2002
Publication #:
Pub Dt:
03/13/2003
Title:
VOLTAGE CONTROLLED OSCILLATORS
Assignor
1
Exec Dt:
06/29/2018
Assignee
1
8000 S. FEDERAL WAY
BOISE, IDAHO 83707
Correspondence name and address
WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
ONE MARKET, SPEAR TOWER, SUITE 3300
SAN FRANCISCO, CA 94105

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