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Reel/Frame:047243/0001   Pages: 959
Recorded: 08/23/2018
Attorney Dkt #:4816.238
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
10/04/2005
Application #:
10663587
Filing Dt:
09/16/2003
Publication #:
Pub Dt:
03/17/2005
Title:
METHODS FOR FABRICATING PLASMA PROBES
2
Patent #:
Issue Dt:
05/08/2007
Application #:
10663709
Filing Dt:
09/17/2003
Publication #:
Pub Dt:
03/17/2005
Title:
METHOD FOR AUTOMATED TESTING OF THE MODULATION TRANSFER FUNCTION IN IMAGE SENSORS
3
Patent #:
Issue Dt:
10/11/2005
Application #:
10663959
Filing Dt:
09/16/2003
Publication #:
Pub Dt:
03/17/2005
Title:
MOISTURE-RESISTANT ELECTRONIC DEVICE PACKAGE AND METHODS OF ASSEMBLY
4
Patent #:
Issue Dt:
08/30/2005
Application #:
10664182
Filing Dt:
09/17/2003
Publication #:
Pub Dt:
04/01/2004
Title:
ANTIFUSE OPTION FOR ROW REPAIR
5
Patent #:
Issue Dt:
02/15/2005
Application #:
10664606
Filing Dt:
09/16/2003
Publication #:
Pub Dt:
07/01/2004
Title:
CIRCUIT FOR BIASING AN INPUT NODE OF A SENSE AMPLIFIER WITH A PRE-CHARGE STAGE
6
Patent #:
Issue Dt:
04/18/2006
Application #:
10664738
Filing Dt:
09/18/2003
Publication #:
Pub Dt:
03/24/2005
Title:
METHODS OF ETCHING SILICON NITRIDE SUBSTANTIALLY SELECTIVELY RELATIVE TO AN OXIDE OF ALUMINUM
7
Patent #:
Issue Dt:
02/22/2005
Application #:
10665327
Filing Dt:
09/19/2003
Publication #:
Pub Dt:
04/01/2004
Title:
METHOD FOR FORMING GATE SEGMENTS FOR AN INTEGRATED CIRCUIT
8
Patent #:
Issue Dt:
10/16/2007
Application #:
10665908
Filing Dt:
09/18/2003
Publication #:
Pub Dt:
03/24/2005
Title:
SYSTEMS AND METHODS FOR DEPOSITING MATERIAL ONTO MICROFEATURE WORKPIECES IN REACTION CHAMBERS
9
Patent #:
Issue Dt:
04/25/2006
Application #:
10666025
Filing Dt:
09/17/2003
Publication #:
Pub Dt:
04/14/2005
Title:
PLASMA ENHANCED CHEMICAL VAPOR DEPOSITION METHOD OF FORMING A TITANIUM SILICIDE COMPRISING LAYER
10
Patent #:
Issue Dt:
10/27/2009
Application #:
10666077
Filing Dt:
09/19/2003
Publication #:
Pub Dt:
04/21/2005
Title:
PRIORITIZED ADDRESS DECODER
11
Patent #:
Issue Dt:
06/13/2006
Application #:
10666302
Filing Dt:
09/19/2003
Publication #:
Pub Dt:
04/07/2005
Title:
SEMICONDUCTOR COMPONENT AND SYSTEM HAVING STIFFENER AND CIRCUIT DECAL
12
Patent #:
Issue Dt:
08/30/2005
Application #:
10666393
Filing Dt:
09/17/2003
Publication #:
Pub Dt:
11/25/2004
Title:
SYSTEM AND METHOD FOR BALANCING CAPACITIVELY COUPLED SIGNAL LINES
13
Patent #:
Issue Dt:
02/13/2007
Application #:
10666454
Filing Dt:
09/17/2003
Publication #:
Pub Dt:
03/17/2005
Title:
APPARATUS AND METHOD FOR SELECTIVELY CONFIGURING A MEMORY DEVICE USING A BI-STABLE RELAY
14
Patent #:
Issue Dt:
05/11/2010
Application #:
10666742
Filing Dt:
09/19/2003
Publication #:
Pub Dt:
03/24/2005
Title:
METHODS FOR THINNING SEMICONDUCTOR SUBSTRATES THAT EMPLOY SUPPORT STRUCTURES FORMED ON THE SUBTRATES
15
Patent #:
Issue Dt:
03/22/2005
Application #:
10666988
Filing Dt:
09/18/2003
Publication #:
Pub Dt:
03/25/2004
Title:
VARIABLE LEVEL MEMORY
16
Patent #:
Issue Dt:
05/29/2007
Application #:
10668009
Filing Dt:
09/22/2003
Publication #:
Pub Dt:
03/24/2005
Title:
Method and apparatus for accessing a dynamic memory device by providing at least one of burst and latency information over at least one of redundant row and column address lines
17
Patent #:
Issue Dt:
08/30/2005
Application #:
10668755
Filing Dt:
09/23/2003
Publication #:
Pub Dt:
03/24/2005
Title:
APPARATUS AND METHOD FOR SUPPRESSING JITTER WITHIN A CLOCK SIGNAL GENERATOR
18
Patent #:
Issue Dt:
11/23/2004
Application #:
10668772
Filing Dt:
09/23/2003
Publication #:
Pub Dt:
03/25/2004
Title:
SYNCHRONOUS MIRROR DELAY WITH REDUCED DELAY LINE TAPS
19
Patent #:
Issue Dt:
03/18/2008
Application #:
10668914
Filing Dt:
09/23/2003
Publication #:
Pub Dt:
03/24/2005
Title:
PROCESS AND INTEGRATION SCHEME FOR FABRICATING CONDUCTIVE COMPONENTS, THROUGH-VIAS AND SEMICONDUCTOR COMPONENTS INCLUDING CONDUCTIVE THROUGH-WAFER VIAS
20
Patent #:
Issue Dt:
10/17/2006
Application #:
10668925
Filing Dt:
09/23/2003
Publication #:
Pub Dt:
03/25/2004
Title:
METHODS OF FORMING A CONTACT ARRAY IN SITU ON A SUBSTRATE
21
Patent #:
Issue Dt:
04/19/2005
Application #:
10668944
Filing Dt:
09/22/2003
Publication #:
Pub Dt:
03/25/2004
Title:
METHOD AND APPARATUS FOR A FLASH MEMORY DEVICE COMPRISING A SOURCE LOCAL INTERCONNECT
22
Patent #:
Issue Dt:
09/22/2009
Application #:
10669309
Filing Dt:
09/23/2003
Publication #:
Pub Dt:
03/24/2005
Title:
METHOD AND APPARATUS TO PERFORM TASK SCHEDULING
23
Patent #:
Issue Dt:
04/26/2005
Application #:
10669635
Filing Dt:
09/24/2003
Publication #:
Pub Dt:
09/02/2004
Title:
VOLTAGE REGULATOR AND DATA PATH FOR A MEMORY DEVICE
24
Patent #:
Issue Dt:
04/26/2005
Application #:
10669949
Filing Dt:
09/24/2003
Publication #:
Pub Dt:
07/22/2004
Title:
WAFER-LEVEL TESTING APPARATUS AND METHOD
25
Patent #:
Issue Dt:
04/19/2005
Application #:
10671112
Filing Dt:
09/25/2003
Publication #:
Pub Dt:
06/17/2004
Title:
VERTICAL FLASH MEMORY CELL WITH BURIED SOURCE RAIL
26
Patent #:
Issue Dt:
08/30/2005
Application #:
10671186
Filing Dt:
09/24/2003
Publication #:
Pub Dt:
03/24/2005
Title:
ANTIREFLECTIVE COATING FOR USE DURING THE MANUFACTURE OF A SEMICONDUCTOR DEVICE
27
Patent #:
Issue Dt:
02/01/2005
Application #:
10671228
Filing Dt:
09/24/2003
Publication #:
Pub Dt:
03/25/2004
Title:
METHODS OF FORMING POLISHED MATERIAL AND METHODS OF FORMING ISOLATION REGIONS
28
Patent #:
Issue Dt:
07/08/2008
Application #:
10671229
Filing Dt:
09/24/2003
Publication #:
Pub Dt:
03/24/2005
Title:
ELECTRONIC APPARATUS, SILICON-ON-INSULATOR INTEGRATED CIRCUITS, AND FABRICATION METHODS
29
Patent #:
Issue Dt:
12/25/2007
Application #:
10671922
Filing Dt:
09/24/2003
Publication #:
Pub Dt:
03/24/2005
Title:
ATOMIC LAYER DEPOSITION METHODS, AND METHODS OF FORMING MATERIALS OVER SEMICONDUCTOR SUBSTRATES
30
Patent #:
Issue Dt:
02/13/2007
Application #:
10672293
Filing Dt:
09/26/2003
Publication #:
Pub Dt:
06/24/2004
Title:
INTEGRATED RESISTIVE ELEMENTS WITH SILICIDATION PROTECTION
31
Patent #:
Issue Dt:
08/09/2005
Application #:
10672329
Filing Dt:
09/26/2003
Publication #:
Pub Dt:
03/25/2004
Title:
MARKINGS FOR ALIGNING FIBER OPTIC BUNDLE
32
Patent #:
Issue Dt:
07/13/2010
Application #:
10672750
Filing Dt:
09/25/2003
Publication #:
Pub Dt:
03/25/2004
Title:
STACKED DIE MODULE INCLUDING MULTIPLE ADHESIVES THAT CURE AT DIFFERENT TEMPERATURES
33
Patent #:
Issue Dt:
06/27/2006
Application #:
10673362
Filing Dt:
09/30/2003
Publication #:
Pub Dt:
04/22/2004
Title:
TRANSISTOR GATE STRUCTURE
34
Patent #:
Issue Dt:
04/29/2008
Application #:
10673692
Filing Dt:
09/29/2003
Publication #:
Pub Dt:
03/31/2005
Title:
METHOD FOR CREATING ELECTRICAL PATHWAYS FOR SEMICONDUCTOR DEVICE STRUCTURES USING LASER MACHINING PROCESSES
35
Patent #:
Issue Dt:
09/06/2005
Application #:
10673756
Filing Dt:
09/29/2003
Publication #:
Pub Dt:
04/15/2004
Title:
ENHANCED PROTECTION FOR INPUT BUFFERS OF LOW-VOLTAGE FLASH MEMORIES
36
Patent #:
Issue Dt:
05/31/2005
Application #:
10674549
Filing Dt:
10/01/2003
Publication #:
Pub Dt:
04/01/2004
Title:
MULTILAYER DIELECTRIC TUNNEL BARRIER USED IN MAGNETIC TUNNEL JUNCTION DEVICES, AND ITS METHOD OF FABRICATION
37
Patent #:
Issue Dt:
03/08/2005
Application #:
10674869
Filing Dt:
09/29/2003
Title:
METHOD OF MANUFACTURING WIRE BONDED MICROELECTRONIC DEVICE ASSEMBLIES
38
Patent #:
Issue Dt:
02/27/2007
Application #:
10675221
Filing Dt:
09/30/2003
Publication #:
Pub Dt:
10/21/2004
Title:
METHOD FOR ERASING NON-VOLATILE MEMORY CELLS AND CORRESPONDING MEMORY DEVICE
39
Patent #:
Issue Dt:
10/04/2005
Application #:
10675661
Filing Dt:
09/29/2003
Publication #:
Pub Dt:
03/31/2005
Title:
NON-CASCADING CHARGE PUMP CIRCUIT AND METHOD
40
Patent #:
Issue Dt:
09/20/2005
Application #:
10675805
Filing Dt:
09/30/2003
Publication #:
Pub Dt:
11/11/2004
Title:
METHOD FOR DETECTING A RESISTIVE PATH OR A PREDETERMINED POTENTIAL IN NON-VOLATILE MEMORY ELECTRONIC DEVICES
41
Patent #:
Issue Dt:
05/22/2007
Application #:
10675965
Filing Dt:
09/30/2003
Publication #:
Pub Dt:
04/01/2004
Title:
SEMICONDUCTOR PACKAGE ASSEMBLY AND METHOD FOR ELECTRICALLY ISOLATING MODULES
42
Patent #:
Issue Dt:
08/08/2006
Application #:
10676169
Filing Dt:
09/30/2003
Publication #:
Pub Dt:
04/01/2004
Title:
DEPOSITION METHODS
43
Patent #:
Issue Dt:
12/05/2006
Application #:
10676888
Filing Dt:
09/30/2003
Publication #:
Pub Dt:
03/31/2005
Title:
METHOD AND APPARATUS FOR TRUSTED KEYBOARD SCANNING
44
Patent #:
Issue Dt:
10/24/2006
Application #:
10677057
Filing Dt:
09/30/2003
Publication #:
Pub Dt:
04/01/2004
Title:
METHODS FOR MAKING NEARLY PLANAR DIELECTRIC FILMS IN INTEGRATED CIRCUITS
45
Patent #:
Issue Dt:
04/08/2008
Application #:
10677081
Filing Dt:
09/30/2003
Publication #:
Pub Dt:
03/31/2005
Title:
PASSING PARAMETERS BY IMPLICIT REFERENCE
46
Patent #:
Issue Dt:
11/21/2006
Application #:
10678595
Filing Dt:
10/03/2003
Publication #:
Pub Dt:
08/12/2004
Title:
VOLTAGE REGULATOR AND DATA PATH FOR A MEMORY DEVICE
47
Patent #:
Issue Dt:
03/21/2006
Application #:
10678722
Filing Dt:
10/03/2003
Publication #:
Pub Dt:
08/19/2004
Title:
VOLTAGE REGULATOR AND DATA PATH FOR A MEMORY DEVICE
48
Patent #:
Issue Dt:
05/15/2007
Application #:
10679266
Filing Dt:
10/07/2003
Publication #:
Pub Dt:
04/07/2005
Title:
TESTING CMOS CAM WITH REDUNDANCY
49
Patent #:
Issue Dt:
04/19/2005
Application #:
10679544
Filing Dt:
10/06/2003
Publication #:
Pub Dt:
04/08/2004
Title:
READING FERROELECTRIC MEMORY CELLS
50
Patent #:
Issue Dt:
08/30/2005
Application #:
10679616
Filing Dt:
10/06/2003
Publication #:
Pub Dt:
04/08/2004
Title:
WRITING TO FERROELECTRIC MEMORY DEVICES
51
Patent #:
Issue Dt:
06/28/2005
Application #:
10679822
Filing Dt:
10/06/2003
Publication #:
Pub Dt:
04/29/2004
Title:
BORON INCORPORATED DIFFUSION BARRIER MATERIAL
52
Patent #:
Issue Dt:
09/20/2005
Application #:
10680038
Filing Dt:
10/07/2003
Publication #:
Pub Dt:
05/12/2005
Title:
DEVICES CONTAINING ZIRCONIUM-PLATINUM-CONTAINING MATERIALS AND METHODS FOR PREPARING SUCH MATERIALS AND DEVICES
53
Patent #:
Issue Dt:
04/19/2005
Application #:
10680161
Filing Dt:
10/08/2003
Publication #:
Pub Dt:
04/15/2004
Title:
PCRAM REWRITE PREVENTION
54
Patent #:
Issue Dt:
09/12/2006
Application #:
10680170
Filing Dt:
10/08/2003
Publication #:
Pub Dt:
04/14/2005
Title:
PARITY-SCANNING AND REFRESH IN DYNAMIC MEMORY DEVICES
55
Patent #:
Issue Dt:
12/15/2009
Application #:
10680171
Filing Dt:
10/08/2003
Publication #:
Pub Dt:
04/14/2005
Title:
ALIGNMENT OF INSTRUCTIONS AND REPLIES ACROSS MULTIPLE DEVICES IN A CASCADED SYSTEM, USING BUFFERS OF PROGRAMMABLE DEPTHS
56
Patent #:
Issue Dt:
10/03/2006
Application #:
10680391
Filing Dt:
10/07/2003
Publication #:
Pub Dt:
04/15/2004
Title:
SEMICONDUCTOR DEVICE ASSEMBLIES INCLUDING INTERPOSERS WITH DAMS PROTRUDING THEREFROM
57
Patent #:
Issue Dt:
12/28/2004
Application #:
10680580
Filing Dt:
10/07/2003
Publication #:
Pub Dt:
04/15/2004
Title:
BUILT-IN SELF REPAIR FOR AN INTEGRATED CIRCUIT
58
Patent #:
Issue Dt:
06/06/2006
Application #:
10681108
Filing Dt:
10/09/2003
Publication #:
Pub Dt:
04/14/2005
Title:
ULTRASHALLOW PHOTODIODE USING INDIUM
59
Patent #:
Issue Dt:
10/17/2006
Application #:
10681161
Filing Dt:
10/09/2003
Publication #:
Pub Dt:
04/14/2005
Title:
AC SENSING FOR A RESISTIVE MEMORY
60
Patent #:
Issue Dt:
06/05/2007
Application #:
10681308
Filing Dt:
10/09/2003
Publication #:
Pub Dt:
04/14/2005
Title:
METHOD AND APPARATUS FOR BALANCING COLOR RESPONSE OF IMAGERS
61
Patent #:
Issue Dt:
06/14/2005
Application #:
10681408
Filing Dt:
10/08/2003
Publication #:
Pub Dt:
04/08/2004
Title:
VERTICAL NROM HAVING A STORAGE DENSITY OF 1 BIT PER IF2
62
Patent #:
Issue Dt:
08/22/2006
Application #:
10681414
Filing Dt:
10/08/2003
Publication #:
Pub Dt:
04/14/2005
Title:
COMMON WORDLINE FLASH ARRAY ARCHITECTURE
63
Patent #:
Issue Dt:
01/12/2010
Application #:
10681481
Filing Dt:
10/08/2003
Publication #:
Pub Dt:
04/14/2005
Title:
METHOD OF CLEANING SEMICONDUCTOR SURFACES
64
Patent #:
Issue Dt:
12/13/2005
Application #:
10681482
Filing Dt:
10/08/2003
Publication #:
Pub Dt:
04/14/2005
Title:
MEMORY BLOCK ERASING IN A FLASH MEMORY DEVICE
65
Patent #:
Issue Dt:
11/07/2006
Application #:
10681929
Filing Dt:
10/09/2003
Publication #:
Pub Dt:
04/14/2005
Title:
SENSE AMPLIFIER CIRCUIT
66
Patent #:
Issue Dt:
09/27/2005
Application #:
10682017
Filing Dt:
10/09/2003
Publication #:
Pub Dt:
04/14/2005
Title:
Method and system for monitoring plasma using optical emission spectroscopy
67
Patent #:
Issue Dt:
05/13/2008
Application #:
10682276
Filing Dt:
10/08/2003
Publication #:
Pub Dt:
04/14/2005
Title:
MODIFIED ELECTROPLATING SOLUTION COMPONENTS IN A LOW-ACID ELECTROLYTE SOLUTION
68
Patent #:
Issue Dt:
01/03/2006
Application #:
10682585
Filing Dt:
10/09/2003
Publication #:
Pub Dt:
04/14/2005
Title:
METHOD AND APPARATUS FOR READING NAND FLASH MEMORY ARRAY
69
Patent #:
Issue Dt:
12/14/2004
Application #:
10682590
Filing Dt:
10/09/2003
Title:
FULLY DEPLETED SILICON-ON-INSULATOR CMOS LOGIC
70
Patent #:
Issue Dt:
07/04/2006
Application #:
10682674
Filing Dt:
10/09/2003
Publication #:
Pub Dt:
04/14/2005
Title:
RANDOM ACCESS INTERFACE IN A SERIAL MEMORY DEVICE
71
Patent #:
Issue Dt:
12/04/2007
Application #:
10682700
Filing Dt:
10/09/2003
Publication #:
Pub Dt:
04/22/2004
Title:
ELECTRO- AND ELECTROLESS PLATING OF METAL IN THE MANUFACTURE OF PCRAM DEVICES
72
Patent #:
Issue Dt:
09/05/2006
Application #:
10682703
Filing Dt:
10/09/2003
Publication #:
Pub Dt:
04/14/2005
Title:
METHODS OF PLATING VIA INTERCONNECTS
73
Patent #:
Issue Dt:
07/31/2012
Application #:
10683075
Filing Dt:
10/10/2003
Publication #:
Pub Dt:
04/14/2005
Title:
MULTI-PARTITION MEMORY WITH SEPARATED READ AND ALGORITHM DATALINES
74
Patent #:
Issue Dt:
09/01/2009
Application #:
10683424
Filing Dt:
10/10/2003
Publication #:
Pub Dt:
04/28/2005
Title:
APPARATUS AND METHODS FOR MANUFACTURING MICROFEATURES ON WORKPIECES USING PLASMA VAPOR PROCESSES
75
Patent #:
Issue Dt:
01/29/2008
Application #:
10683606
Filing Dt:
10/09/2003
Publication #:
Pub Dt:
04/28/2005
Title:
APPARATUS AND METHODS FOR PLASMA VAPOR DEPOSITION PROCESSES
76
Patent #:
Issue Dt:
12/25/2007
Application #:
10683806
Filing Dt:
10/10/2003
Publication #:
Pub Dt:
04/14/2005
Title:
LASER ASSISTED MATERIAL DEPOSITION
77
Patent #:
Issue Dt:
03/27/2007
Application #:
10684280
Filing Dt:
10/10/2003
Publication #:
Pub Dt:
05/06/2004
Title:
METHOD AND APPARATUS FOR CONDITIONING OF A DIGITAL PULSE
78
Patent #:
Issue Dt:
06/27/2006
Application #:
10684431
Filing Dt:
10/15/2003
Publication #:
Pub Dt:
04/29/2004
Title:
SEMICONDUCTOR DEVICES USING ANTI-REFLECTIVE COATINGS
79
Patent #:
Issue Dt:
04/18/2006
Application #:
10684621
Filing Dt:
10/14/2003
Publication #:
Pub Dt:
04/14/2005
Title:
COMPLIANT CONTACT STRUCTURES, CONTACTOR CARDS AND TEST SYSTEM INCLUDING SAME
80
Patent #:
Issue Dt:
05/17/2005
Application #:
10684794
Filing Dt:
10/14/2003
Publication #:
Pub Dt:
04/14/2005
Title:
METHODS AND SYSTEMS FOR CONTROLLING RADIATION BEAM CHARACTERISTICS FOR MICROLITHOGRAPHIC PROCESSING
81
Patent #:
Issue Dt:
09/26/2006
Application #:
10684967
Filing Dt:
10/14/2003
Publication #:
Pub Dt:
04/14/2005
Title:
SYSTEM AND METHOD FOR REDUCING SHORTING IN MEMORY CELLS
82
Patent #:
Issue Dt:
03/01/2005
Application #:
10685297
Filing Dt:
10/14/2003
Publication #:
Pub Dt:
07/08/2004
Title:
MEMORY REDUNDANCY WITH PROGRAMMABLE NON-VOLATILE CONTROL
83
Patent #:
Issue Dt:
01/18/2005
Application #:
10686091
Filing Dt:
10/15/2003
Publication #:
Pub Dt:
04/29/2004
Title:
METHOD FOR UNDERFILLING SEMICONDUCTOR COMPONENTS
84
Patent #:
Issue Dt:
05/24/2005
Application #:
10686333
Filing Dt:
10/14/2003
Publication #:
Pub Dt:
05/13/2004
Title:
PEROVSKITE-TYPE MATERIAL FORMING METHODS, CAPACITOR DIELECTRIC FORMING METHODS, AND CAPACITOR CONSTRUCTIONS
85
Patent #:
Issue Dt:
07/26/2005
Application #:
10686552
Filing Dt:
10/15/2003
Publication #:
Pub Dt:
07/22/2004
Title:
STRUCTURE FOR UPDATING A BLOCK OF MEMORY CELLS IN A FLASH MEMORY DEVICE WITH ERASE AND PROGRAM OPERATION REDUCTION
86
Patent #:
Issue Dt:
08/29/2006
Application #:
10686731
Filing Dt:
10/17/2003
Publication #:
Pub Dt:
05/06/2004
Title:
METAL WIRING PATTERN FOR MEMORY DEVICES
87
Patent #:
Issue Dt:
05/03/2005
Application #:
10686864
Filing Dt:
10/16/2003
Publication #:
Pub Dt:
04/21/2005
Title:
METHODS AND APPARATUSES FOR TRANSFERRING HEAT FROM MICROELECTRONIC DEVICE MODULES
88
Patent #:
Issue Dt:
08/01/2006
Application #:
10687086
Filing Dt:
10/16/2003
Publication #:
Pub Dt:
04/29/2004
Title:
BORON INCORPORATED DIFFUSION BARRIER MATERIAL
89
Patent #:
Issue Dt:
01/19/2010
Application #:
10687458
Filing Dt:
10/15/2003
Publication #:
Pub Dt:
04/21/2005
Title:
SYSTEMS FOR DEPOSITING MATERIAL ONTO WORKPIECES IN REACTION CHAMBERS AND METHODS FOR REMOVING BYPRODUCTS FROM REACTION CHAMBERS
90
Patent #:
Issue Dt:
10/19/2004
Application #:
10687463
Filing Dt:
10/15/2003
Publication #:
Pub Dt:
05/06/2004
Title:
STRUCTURE AND METHOD FOR TRANSVERSE FIELD ENHANCEMENT
91
Patent #:
Issue Dt:
08/17/2010
Application #:
10688461
Filing Dt:
10/17/2003
Publication #:
Pub Dt:
04/21/2005
Title:
METHOD AND APPARATUS FOR SENDING DATA FROM MULTIPLE SOURCES OVER A COMMUNICATIONS BUS
92
Patent #:
Issue Dt:
01/02/2007
Application #:
10688828
Filing Dt:
10/17/2003
Publication #:
Pub Dt:
04/21/2005
Title:
DIGITAL DATA APPARATUSES AND DIGITAL DATA OPERATIONAL METHODS
93
Patent #:
Issue Dt:
11/04/2008
Application #:
10689256
Filing Dt:
10/20/2003
Publication #:
Pub Dt:
10/28/2004
Title:
METHOD FOR FINDING GLOBAL EXTREMA OF A SET OF BYTES DISTRIBUTED ACROSS AN ARRAY OF PARALLEL PROCESSING ELEMENTS
94
Patent #:
Issue Dt:
09/29/2009
Application #:
10689257
Filing Dt:
10/20/2003
Publication #:
Pub Dt:
10/28/2004
Title:
METHOD OF SHIFTING DATA ALONG DIAGONALS IN A GROUP OF PROCESSING ELEMENTS TO TRANSPOSE THE DATA
95
Patent #:
Issue Dt:
03/10/2009
Application #:
10689280
Filing Dt:
10/20/2003
Publication #:
Pub Dt:
10/28/2004
Title:
METHOD OF OBTAINING INTERLEAVE INTERVAL FOR TWO DATA VALUES
96
Patent #:
Issue Dt:
08/28/2007
Application #:
10689300
Filing Dt:
10/20/2003
Publication #:
Pub Dt:
10/28/2004
Title:
METHOD FOR MANIPULATING DATA IN A GROUP OF PROCESSING ELEMENTS TO TRANSPOSE THE DATA USING A MEMORY STACK
97
Patent #:
Issue Dt:
05/13/2008
Application #:
10689312
Filing Dt:
10/20/2003
Publication #:
Pub Dt:
10/28/2004
Title:
METHOD FOR USING EXTREMA TO LOAD BALANCE A LOOP OF PARALLEL PROCESSING ELEMENTS
98
Patent #:
Issue Dt:
11/18/2008
Application #:
10689335
Filing Dt:
10/20/2003
Publication #:
Pub Dt:
10/28/2004
Title:
METHOD FOR FINDING LOCAL EXTREMA OF A SET OF VALUES FOR A PARALLEL PROCESSING ELEMENT
99
Patent #:
Issue Dt:
10/14/2008
Application #:
10689336
Filing Dt:
10/20/2003
Publication #:
Pub Dt:
10/28/2004
Title:
METHOD FOR LOAD BALANCING A LOOP OF PARALLEL PROCESSING ELEMENTS
100
Patent #:
Issue Dt:
09/30/2008
Application #:
10689345
Filing Dt:
10/20/2003
Publication #:
Pub Dt:
10/28/2004
Title:
METHOD FOR LOAD BALANCING A LINE OF PARALLEL PROCESSING ELEMENTS
Assignor
1
Exec Dt:
06/29/2018
Assignee
1
8000 S. FEDERAL WAY
BOISE, IDAHO 83707
Correspondence name and address
WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
ONE MARKET, SPEAR TOWER, SUITE 3300
SAN FRANCISCO, CA 94105

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