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Patent #:
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|
Issue Dt:
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01/12/1999
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Application #:
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08791348
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Filing Dt:
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01/30/1997
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Title:
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MULTI-LEVEL MEMORY CIRCUITS AND CORRESPONDING READING AND WRITING METHODS
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Patent #:
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Issue Dt:
|
05/11/1999
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Application #:
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08791383
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Filing Dt:
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01/30/1997
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Title:
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CURRENT REFERENCE DEVICE IN INTEGRATED CIRCUIT FORM
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Patent #:
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Issue Dt:
|
08/18/1998
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Application #:
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08791700
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Filing Dt:
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01/30/1997
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Title:
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HIGH VOLTAGES DETECTOR CIRCUIT AND INTEGRATED CIRCUIT USING SAME
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Patent #:
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Issue Dt:
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12/29/1998
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Application #:
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08791746
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Filing Dt:
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01/30/1997
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Title:
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DECODING HIERARCHICAL ARCHITECTURE FOR HIGH INTEGRATION MEMORIES
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Patent #:
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Issue Dt:
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10/06/1998
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Application #:
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08792893
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Filing Dt:
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01/31/1997
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Title:
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PROCESS OF FABRICATING TUNNEL-OXIDE NONVOLATILE MEMORY DEVICES
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Patent #:
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Issue Dt:
|
03/23/1999
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Application #:
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08792962
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Filing Dt:
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01/24/1997
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Title:
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DEVICE TO NEUTRALIZE AN ELECTRONIC CIRCUIT WHEN IT IS BEING POWERED OR DISCONNECTED
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Patent #:
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Issue Dt:
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03/07/2000
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Application #:
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08794283
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Filing Dt:
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02/03/1997
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Title:
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BLOCK LOCKING APPARATUS FOR FLASH MEMORY
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Patent #:
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Issue Dt:
|
03/16/1999
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Application #:
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08794355
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Filing Dt:
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02/04/1997
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Title:
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METHOD FOR FORMING A HOLE IN A SEMICONDUCTOR DEVICE
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Patent #:
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|
Issue Dt:
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08/15/2000
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Application #:
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08794750
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Filing Dt:
|
02/03/1997
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Title:
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FIELD EMISSION DISPLAY WITH MULTI-LEVEL INTERCONNECT
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Patent #:
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Issue Dt:
|
10/26/1999
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Application #:
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08794877
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Filing Dt:
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02/05/1997
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Title:
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QUICK CHANGE PRECISOR
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Patent #:
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|
Issue Dt:
|
05/04/1999
|
Application #:
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08795053
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Filing Dt:
|
02/05/1997
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Title:
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BACKING PLATE FOR CONTRAST ENHANCEMENT OF PHOTOLITHOGRAPHIC IMAGES ON TRANSPARENT SUBSTRATES AND METHOD OF USING SAME
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Patent #:
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Issue Dt:
|
07/27/1999
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Application #:
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08795072
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Filing Dt:
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02/05/1997
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Title:
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METHOD AND APPARATUS FOR VERIFYING ERASURE OF MEMORY BLOCKS WITHIN A NON-VOLATILE MEMORY STRUCTURE
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Patent #:
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Issue Dt:
|
01/26/1999
|
Application #:
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08795170
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Filing Dt:
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02/10/1997
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Title:
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APPARATUS FOR FORMING MATERIALS
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Patent #:
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Issue Dt:
|
11/23/1999
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Application #:
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08795258
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Filing Dt:
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02/10/1997
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Title:
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METHOD FOR FORMING MATERIALS
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Patent #:
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Issue Dt:
|
11/30/1999
|
Application #:
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08795694
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Filing Dt:
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02/04/1997
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Title:
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MULTI BANK TEST MODE FOR MEMORY DEVICES
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Patent #:
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Issue Dt:
|
08/03/1999
|
Application #:
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08796399
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Filing Dt:
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02/06/1997
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Title:
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REDUCTION OF CONTACT SIZE UTILIZING FORMATION OF SPACER MATERIAL OVER RESIST PATTERN
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Patent #:
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Issue Dt:
|
08/10/1999
|
Application #:
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08796650
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Filing Dt:
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03/03/1997
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Title:
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METHOD FOR FABRICATION OF AND APPARATUS FOR USE AS A SEMICONDUCTOR PHOTOMASK
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Patent #:
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Issue Dt:
|
02/16/1999
|
Application #:
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08797499
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Filing Dt:
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02/07/1997
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Title:
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SEMICONDUCTOR PROCESSING METHODS OF FORMING SELF-ALIGNED CONTACT OPENINGS
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Patent #:
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Issue Dt:
|
10/19/1999
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Application #:
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08797547
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Filing Dt:
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02/07/1997
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Title:
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SEMICONDUCTOR PROCESSING METHOD OF FORMING COMPLEMENTARY N-TYPE DOPED AND P-TYPE DOPED ACTIVE REGIONS WITHIN A SEMICONDUCTOR SUBSTRATE
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Patent #:
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Issue Dt:
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05/09/2000
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Application #:
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08797719
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Filing Dt:
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02/11/1997
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Title:
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PROBE CARD FOR SEMICONDUCTOR WAFERS AND METHOD AND SYSTEM FOR TESTING WAFERS
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Patent #:
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Issue Dt:
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07/18/2000
|
Application #:
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08797900
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Filing Dt:
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02/10/1997
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Title:
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CONDITIONING OF DIELECTRIC MATERIALS
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Patent #:
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Issue Dt:
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09/07/1999
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Application #:
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08797948
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Filing Dt:
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02/12/1997
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Title:
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ELECTRICALLY MODIFIABLE NON-VOLATILE MEMORY CIRCUIT HAVING MEANS FOR AUTONOMOUS REFRESHING DEPENDENT UPON ON PERIODIC CLOCK PULSES
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Patent #:
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Issue Dt:
|
05/08/2001
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Application #:
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08798229
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Filing Dt:
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02/11/1997
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Title:
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METHOD AND APPARATUS FOR GENERATING A VARIABLE SEQUENCE OF MEMORY DEVICE COMMAND SIGNALS
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Patent #:
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Issue Dt:
|
11/04/1997
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Application #:
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08798848
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Filing Dt:
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02/12/1997
|
Title:
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SEMICONDUCTOR MEMORY WITH TEST CIRCUIT
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Patent #:
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Issue Dt:
|
07/28/1998
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Application #:
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08799166
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Filing Dt:
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02/14/1997
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Title:
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ATOM LITHOGRAPHIC MASK HAVING DIFFRACTION GRATING ALIGNED WITH PRIMARY MASK PATTERN
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|
Patent #:
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Issue Dt:
|
08/24/1999
|
Application #:
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08799233
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Filing Dt:
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02/14/1997
|
Title:
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METHOD FOR FORMING A DIFFUSION REGION IN A SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
|
05/26/1998
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Application #:
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08799575
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Filing Dt:
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02/12/1997
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Title:
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HIGHLY SELECTIVE NITRIDE SPACER ETCH
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Patent #:
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Issue Dt:
|
04/14/1998
|
Application #:
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08800553
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Filing Dt:
|
02/18/1997
|
Title:
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SEMICONDUCTOR PROCESSING METHOD OF FORMING A STATIC RANDOM ACCESS MEMORY CELL AND STATIC RANDOM ACCESS MEMORY CELL
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Patent #:
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Issue Dt:
|
08/01/2000
|
Application #:
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08800841
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Filing Dt:
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02/14/1997
|
Title:
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DIE INTERCONNECTION USING INTERMEDIATE CONNECTION ELEMENTS SECURED TO THE DIE FACE
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Patent #:
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Issue Dt:
|
06/16/1998
|
Application #:
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08800963
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Filing Dt:
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02/18/1997
|
Title:
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FAST SENSE AMPLIFIER FOR SMALL VOLTAGE DIFFERENCES
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|
Patent #:
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Issue Dt:
|
03/24/1998
|
Application #:
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08801125
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Filing Dt:
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02/14/1997
|
Title:
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MEMORY DEVICE COMMUNICATION LINE CONTROL
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|
Patent #:
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|
Issue Dt:
|
06/05/2001
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Application #:
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08801161
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Filing Dt:
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02/18/1997
|
Title:
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MULTIPLEXED SEMICONDUCTOR DATA TRANSFER ARRANGEMENT WITH TIMING SIGNAL GENERATOR
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Patent #:
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Issue Dt:
|
11/16/1999
|
Application #:
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08801508
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Filing Dt:
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12/31/1996
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Title:
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METHOD AND APPARATUS FOR DELIVERING DATA
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|
Patent #:
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|
Issue Dt:
|
12/01/1998
|
Application #:
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08801565
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Filing Dt:
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02/17/1997
|
Title:
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METHOD OF SORTING A GROUP OF INTERGRATED CIRCUIT DEVICES FOR THOSE DEVICES REQUIRING SPECIAL TESTING
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Patent #:
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Issue Dt:
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03/31/2009
|
Application #:
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08801812
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Filing Dt:
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02/14/1997
|
Publication #:
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Pub Dt:
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12/06/2001
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Title:
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UTILIZATION OF ENERGY ABSORBING LAYER TO IMPROVE METAL FLOW AND FILL IN A NOVEL INTERCONNECT STRUCTURE
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Patent #:
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Issue Dt:
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05/09/2000
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Application #:
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08801819
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Filing Dt:
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02/14/1997
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Title:
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METHOD OF MAKING AN INTERCONENCT STRUCTURE
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Patent #:
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Issue Dt:
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12/01/1998
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Application #:
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08802405
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Filing Dt:
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02/18/1997
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Title:
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ALUMINUM FILM FOR SEMICONDUCTIVE DEVICES
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Patent #:
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Issue Dt:
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04/13/1999
|
Application #:
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08802619
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Filing Dt:
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02/19/1997
|
Title:
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METHOD FOR IMPROVING THE INTERMEDIATE DIELECTRIC PROFILE, PARTICULARLY FOR NON-VOLATILE MEMORIES
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Patent #:
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Issue Dt:
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03/30/1999
|
Application #:
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08802665
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Filing Dt:
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02/19/1997
|
Title:
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DEVICE AND METHOD FOR ELECTROSTATIC DISCHARGE PROTECTION OF A CIRCUIT DEVICE
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Patent #:
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Issue Dt:
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02/10/1998
|
Application #:
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08802724
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Filing Dt:
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02/20/1997
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Title:
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EXPANDABLE DATA WIDTH SAM FOR A MULTIPORT RAM
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Patent #:
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Issue Dt:
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07/20/1999
|
Application #:
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08802861
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Filing Dt:
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02/19/1997
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Title:
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CONDUCTOR LAYER NITRIDATION
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Patent #:
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Issue Dt:
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07/17/2001
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Application #:
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08802884
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Filing Dt:
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02/19/1997
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Title:
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LOW RESISTIVITY TITANIUM SILICIDE STRUCTURES
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Patent #:
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Issue Dt:
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09/28/1999
|
Application #:
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08802895
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Filing Dt:
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02/18/1997
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Title:
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CONTENT ADDRESSABLE BIT REPLACEMENT MEMORY
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Patent #:
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Issue Dt:
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01/18/2000
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Application #:
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08803174
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Filing Dt:
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02/19/1997
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Title:
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SEMICONDUCTOR STRUCTURE HAVING A DOPED CONDUCTIVE LAYER
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Patent #:
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Issue Dt:
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06/08/1999
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Application #:
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08803343
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Filing Dt:
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02/20/1997
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Title:
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VOLTAGE LEVEL TRANSLATOR
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Patent #:
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Issue Dt:
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10/03/2000
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Application #:
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08803528
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Filing Dt:
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02/20/1997
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Title:
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METAL SILICIDATION METHODS AND METHODS FOR USING SAME
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Patent #:
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Issue Dt:
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03/24/1998
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Application #:
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08804179
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Filing Dt:
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02/20/1997
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Title:
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MERGED TRANSISTOR STRUCTURE FOR GAIN MEMORY CELL
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Patent #:
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Issue Dt:
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12/14/1999
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Application #:
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08804911
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Filing Dt:
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02/25/1997
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Title:
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METHOD FOR TRANSFER MOLDING ENCAPSULATION OF A SEMICONDUCTOR DIE WITH ATTACHED HEAT SINK
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Patent #:
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Issue Dt:
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12/16/1997
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Application #:
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08804945
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Filing Dt:
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02/24/1997
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Title:
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VOLTAGE REGULATOR CIRCUIT
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Patent #:
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Issue Dt:
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04/13/1999
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Application #:
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08805126
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Filing Dt:
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02/24/1997
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Title:
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INTERCONNECT WITH PRESSURE SENSING MECHANISM FOR TESTING SEMICONDUCTOR WAFERS
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Patent #:
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Issue Dt:
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07/14/1998
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Application #:
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08806191
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Filing Dt:
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02/26/1997
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Title:
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REPAIR OF REFLECTIVE PHOTOMASK USED IN SEMICONDUCTOR PROCESS
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Patent #:
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Issue Dt:
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09/01/1998
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Application #:
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08806206
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Filing Dt:
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02/26/1997
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Title:
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DATA PATH FOR HIGH SPEED HIGH BANDWIDTH DRAM
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Patent #:
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Issue Dt:
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06/22/1999
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Application #:
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08806442
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Filing Dt:
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02/26/1997
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Title:
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METHOD IN AN INTEGRATED CIRCUIT (IC) MANUFACTURING PROCESS FOR IDENTIFYING AND REDIRECTING IC'S MIS-PROCESSED DURING THEIR MANUFACTURE
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Patent #:
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Issue Dt:
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07/20/1999
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Application #:
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08806703
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Filing Dt:
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01/29/1997
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Title:
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DUAL STROBED NEGATIVE PUMPED WORDLINES FOR DYNAMIC RANDOM ACCESS MEMORIES
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Patent #:
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Issue Dt:
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12/14/1999
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Application #:
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08807113
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Filing Dt:
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12/13/1996
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Title:
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PROCESS FOR FABRICATING A MICROTIP CATHODE ASSEMBLY FOR A FIELD EMISSION DISPLAY PANEL
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Patent #:
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Issue Dt:
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11/16/1999
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Application #:
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08807192
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Filing Dt:
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02/27/1997
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Title:
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SEMICONDUCTOR PROCESSING METHODS OF FORMING A CONTACT OPENING
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Patent #:
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Issue Dt:
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10/08/2002
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Application #:
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08807418
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Filing Dt:
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02/28/1997
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Title:
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MULTILEVEL LEADFRAME FOR A PACKAGED INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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08/10/1999
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Application #:
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08807443
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Filing Dt:
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02/28/1997
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Title:
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DIFFUSION-ENHANCED CRYSTALLIZATION OF AMORPHOUS MATERIALS TO IMPROVE SURFACE ROUGHNESS
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Patent #:
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Issue Dt:
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04/06/1999
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Application #:
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08807562
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Filing Dt:
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02/28/1997
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Title:
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METHOD OF FORMING A CAPACITOR
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Patent #:
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Issue Dt:
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07/20/1999
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Application #:
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08807574
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Filing Dt:
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02/27/1997
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Title:
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ELECTRICALLY PROGRAMMABLE NON-VOLATILE MEMORY CELLS DEVICE FOR A REDUCED NUMBER OF PROGRAMMING CYCLES
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Patent #:
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Issue Dt:
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05/19/1998
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Application #:
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08808391
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Filing Dt:
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02/28/1997
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Title:
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SELF-TEST CIRCUIT FOR MEMORY INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
|
11/23/1999
|
Application #:
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08808392
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Filing Dt:
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02/28/1997
|
Title:
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METHOD AND APPARATUS FOR RAPIDLY TESTING MEMORY DEVICES
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Patent #:
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Issue Dt:
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02/16/1999
|
Application #:
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08808603
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Filing Dt:
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02/28/1997
|
Title:
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PROCESSING METHODS OF FORMING AN ELECTRICALLY CONDUCTIVE PLUG TO A NODE LOCATION
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Patent #:
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Issue Dt:
|
12/21/1999
|
Application #:
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08810048
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Filing Dt:
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03/04/1997
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Title:
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INTERPOSER CONVERTER TO ALLOW SINGLE- SIDED CONTACT TO CIRCUIT MODULES
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Patent #:
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Issue Dt:
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02/24/1998
|
Application #:
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08810416
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Filing Dt:
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03/04/1997
|
Title:
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METHOD OF FORMING CMOS CIRCUITRY
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Patent #:
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Issue Dt:
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07/15/2003
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Application #:
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08811124
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Filing Dt:
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03/03/1997
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Title:
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CONTACT INTEGRATION METHOD AND ARTICLES MADE THEREBY
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Patent #:
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Issue Dt:
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08/11/1998
|
Application #:
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08811386
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Filing Dt:
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03/04/1997
|
Title:
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CIRCUIT FOR THE GENERATION AND RESET OF TIMING SIGNAL USED FOR READING A MEMORY DEVICE
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Patent #:
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Issue Dt:
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08/22/2000
|
Application #:
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08811488
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Filing Dt:
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03/05/1997
|
Title:
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METHOD OF MAKING A LOCAL INTERCONNECT USING SPACER-MASKED CONTACT ETCH
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Patent #:
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Issue Dt:
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05/11/1999
|
Application #:
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08811548
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Filing Dt:
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03/04/1997
|
Title:
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CIRCUIT FOR IMMUNIZING AN INTEGRATED CIRCUIT FROM NOISE AFFECTING ENABLE SIGNALS OF THE INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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08/10/1999
|
Application #:
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08811563
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Filing Dt:
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03/04/1997
|
Title:
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APPARATUS FOR A;LLOWING DATA TRANSFERS WITH A MEMORY HAVING DEFECTIVE STORAGE LOCATIONS
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Patent #:
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Issue Dt:
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07/13/1999
|
Application #:
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08811577
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Filing Dt:
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03/05/1997
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Title:
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INTEGRATED DEVICE WITH PADS
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Patent #:
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Issue Dt:
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03/27/2001
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Application #:
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08811711
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Filing Dt:
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03/05/1997
|
Title:
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METHOD FOR FABRICATING A MICROMACHINED CHIP SCALE PACKAGE
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Patent #:
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Issue Dt:
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09/29/1998
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Application #:
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08811869
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Filing Dt:
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03/05/1997
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Title:
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ADDRESS TRANSITION DETECTION CIRCUIT
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Patent #:
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Issue Dt:
|
10/06/1998
|
Application #:
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08811935
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Filing Dt:
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03/05/1997
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Title:
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LOC SIMM AND METHOD OF FABRICATION
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Patent #:
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Issue Dt:
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06/06/2000
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Application #:
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08812098
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Filing Dt:
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03/03/1997
|
Title:
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TEMPORARY PACKAGE, METHOD AND SYSTEM FOR TESTING SEMICONDUCTOR DICE HAVING BACKSIDE ELECTRODES
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Patent #:
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Issue Dt:
|
03/21/2000
|
Application #:
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08812476
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Filing Dt:
|
03/06/1997
|
Title:
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MULTI-CHIP MODULE EMPLOYING A CARRIER SUBSTRATE WITH MICROMACHINED ALIGNMENT STRUCTURES AND METHOD OF FORMING
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Patent #:
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Issue Dt:
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11/03/1998
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Application #:
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08812595
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Filing Dt:
|
03/07/1997
|
Title:
|
NON-VOLATILE MEMORY DEVICE HAVING OPTIMIZED MANAGEMENT OF DATA TRANSMISSION LINES
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|
|
Patent #:
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Issue Dt:
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09/21/1999
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Application #:
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08812878
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Filing Dt:
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03/05/1997
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Title:
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METHOD AND CIRCUIT FOR PRODUCING HIGH-SPEED COUNTS
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Patent #:
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Issue Dt:
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01/16/2001
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Application #:
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08813041
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Filing Dt:
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03/05/1997
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Title:
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MEMORY DEVICE COMMAND BUFFER APPARATUS AND METHOD AND MEMORY DEVICES AND COMPUTER SYSTEMS USING SAME
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Patent #:
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|
Issue Dt:
|
09/14/1999
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Application #:
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08813063
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Filing Dt:
|
03/07/1997
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Title:
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PROGRAMMABLE VOLTAGE DIVIDER AND METHOD FOR TESTING THE IMPEDANCE OF A PROGRAMMABLE ELEMENT
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Patent #:
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Issue Dt:
|
11/30/1999
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Application #:
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08813467
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Filing Dt:
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03/10/1997
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Title:
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METHOD OF CONSTRUCTING STACKED PACKAGES
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Patent #:
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|
Issue Dt:
|
02/06/2001
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Application #:
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08813525
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Filing Dt:
|
03/07/1997
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Title:
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METHOD AND APPARATUS FOR CHECKING THE RESISTANCE OF PROGRAMMABLE ELEMENTS
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Patent #:
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|
Issue Dt:
|
08/20/2002
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Application #:
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08813687
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Filing Dt:
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03/07/1997
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Publication #:
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Pub Dt:
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11/15/2001
| | | | |
Title:
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TIMESHARING INTERNAL BUS, PARTICULARLY FOR NON-VOLATILE MEMORIES
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Patent #:
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|
Issue Dt:
|
11/09/1999
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Application #:
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08813767
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Filing Dt:
|
03/07/1997
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Title:
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METHOD AND APPARATUS FOR CHECKING THE RESISTANCE OF PROGRAMMABLE ELEMENTS
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Patent #:
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|
Issue Dt:
|
06/13/2000
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Application #:
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08813913
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Filing Dt:
|
03/07/1997
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Title:
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METHOD OF INCREASING CAPACITANCE BY SURFACE ROUGHENING IN SEMICONDUCTOR WAFER PROCESSING
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|
Patent #:
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|
Issue Dt:
|
09/01/1998
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Application #:
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08814218
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Filing Dt:
|
03/11/1997
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Title:
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INTEGRATED CIRCUIT OPERABLE IN A MODE HAVING EXTREMELY LOW POWER CONSUMPTION
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|
|
Patent #:
|
|
Issue Dt:
|
08/04/1998
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Application #:
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08814778
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Filing Dt:
|
03/10/1997
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Title:
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ON-CHIP MOBILE ION CONTAMINATION TEST CIRCUIT
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Patent #:
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|
Issue Dt:
|
09/07/1999
|
Application #:
|
08814965
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Filing Dt:
|
03/11/1997
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Title:
|
LOW VOLTAGE TEST MODE OPERATION ENABLE SCHEME WITH HARDWARE SAFEGUARD
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|
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Patent #:
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|
Issue Dt:
|
02/22/2000
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Application #:
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08815112
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Filing Dt:
|
03/11/1997
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Title:
|
LOW VOLTAGE TEST MODE OPERATION ENABLE SCHEME WITH HARDWARE SAFEGUARD
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|
|
Patent #:
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|
Issue Dt:
|
03/24/1998
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Application #:
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08815300
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Filing Dt:
|
03/11/1997
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Title:
|
SRAM CELL EMPLOYING SUBSTANTIALLY VERTICALLY ELONGATED PULL-UP RESISTORS
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|
|
Patent #:
|
|
Issue Dt:
|
12/01/1998
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Application #:
|
08815302
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Filing Dt:
|
03/11/1997
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Title:
|
SRAM CELL EMPLOYING SUBSTANTIALLY VERTICALLY ELONGATED PULL-UP RESISTORS
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|
|
Patent #:
|
|
Issue Dt:
|
05/12/1998
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Application #:
|
08815413
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Filing Dt:
|
03/11/1997
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Title:
|
SRAM CELL EMPLOYING SUBSTANTIALLY VERTICALLY ELONGATED PULL-UP RESISTORS
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|
|
Patent #:
|
|
Issue Dt:
|
08/24/1999
|
Application #:
|
08815755
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Filing Dt:
|
03/12/1997
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Title:
|
METHOD AND APPARATUS FOR SIGNAL TRANSITION DETECTION IN INTEGRATED CIRCUITS
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|
|
Patent #:
|
|
Issue Dt:
|
12/07/1999
|
Application #:
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08816621
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Filing Dt:
|
03/13/1997
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Title:
|
SEMICONDUCTOR PROCESSING METHODS OF FORMING INTEGRATED CIRCUITRY MEMORY DEVICES, METHODS OF FORMING CAPACITOR CONTAINERS, METHODS OF MAKING ELECTRICAL CONNECTION TO CIRCUIT NODES AND RELATED INTEGRATED CIRCUITRY
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|
Patent #:
|
|
Issue Dt:
|
12/29/1998
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Application #:
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08816645
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Filing Dt:
|
03/13/1997
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Title:
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METHOD OF FORMING A CONTACT LANDING PAD
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|
|
Patent #:
|
|
Issue Dt:
|
04/25/2000
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Application #:
|
08816766
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Filing Dt:
|
03/18/1997
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Title:
|
METHOD FOR RECOVERING FAILED MEMORY DEVICES
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|
|
Patent #:
|
|
Issue Dt:
|
03/04/2003
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Application #:
|
08816943
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Filing Dt:
|
01/28/1997
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Title:
|
CIRCUIT AND METHOD FOR VARYING A PERIOD OF AN INTERNAL CONTROL SIGNAL DURING A TEST MODE
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|
|
Patent #:
|
|
Issue Dt:
|
12/22/1998
|
Application #:
|
08818042
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Filing Dt:
|
03/14/1997
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Title:
|
NONVOLATILE FERROELECTRIC MEMORY WITH FOLDED BIT LINE ARCHITECTURE
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|
|
Patent #:
|
|
Issue Dt:
|
10/05/1999
|
Application #:
|
08818229
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Filing Dt:
|
03/14/1997
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Title:
|
METHOD OF MAKING A DOPED SILICON STRUCTURE WTIH IMPRESSION IMAGE ON OPPOSING ROUGHENED SURFACES
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|
|
Patent #:
|
|
Issue Dt:
|
06/20/2000
|
Application #:
|
08818325
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Filing Dt:
|
03/14/1997
|
Title:
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ETCHING PROCESS USING A BUFFER LAYER
|
|