skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:047243/0001   Pages: 959
Recorded: 08/23/2018
Attorney Dkt #:4816.238
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
05/19/2009
Application #:
10922582
Filing Dt:
08/20/2004
Publication #:
Pub Dt:
01/27/2005
Title:
SEMICODUCTOR DEVICE CONTAINING AN ULTRA THIN DIELECTRIC FILM OR DIELECTRIC LAYER
2
Patent #:
Issue Dt:
07/24/2007
Application #:
10922583
Filing Dt:
08/19/2004
Publication #:
Pub Dt:
02/23/2006
Title:
SILICON PILLARS FOR VERTICAL TRANSISTORS
3
Patent #:
Issue Dt:
04/26/2005
Application #:
10922921
Filing Dt:
08/23/2004
Publication #:
Pub Dt:
01/27/2005
Title:
METHOD AND APPARATUS SENSING A RESISTIVE MEMORY WITH REDUCED POWER CONSUMPTION
4
Patent #:
Issue Dt:
03/07/2006
Application #:
10923191
Filing Dt:
08/20/2004
Title:
FINFET DEVICE WITH REDUCED DIBL
5
Patent #:
Issue Dt:
01/27/2009
Application #:
10923315
Filing Dt:
08/20/2004
Publication #:
Pub Dt:
06/28/2007
Title:
METHODS FOR FORMING NIOBIUM AND/OR VANADIUM CONTAINING LAYERS USING ATOMIC LAYER DEPOSITION
6
Patent #:
Issue Dt:
02/24/2009
Application #:
10923437
Filing Dt:
08/19/2004
Publication #:
Pub Dt:
02/02/2006
Title:
METHOD OF MANUFACTURING AN INTERPOSER INCLUDING AT LEAST ONE PASSIVE ELEMENT AT LEAST PARTIALLY DEFINED BY A RECESS THEREIN
7
Patent #:
Issue Dt:
10/02/2007
Application #:
10923450
Filing Dt:
08/19/2004
Publication #:
Pub Dt:
02/02/2006
Title:
METHODS OF FORMING A MULTI-CHIP MODULE HAVING DISCRETE SPACERS
8
Patent #:
Issue Dt:
09/12/2006
Application #:
10923588
Filing Dt:
08/19/2004
Publication #:
Pub Dt:
02/02/2006
Title:
INTERPOSER WITH FLEXIBLE SOLDER PAD ELEMENTS AND METHODS OF MANUFACTURING THE SAME
9
Patent #:
Issue Dt:
11/07/2006
Application #:
10924010
Filing Dt:
08/23/2004
Publication #:
Pub Dt:
01/27/2005
Title:
SEMICONDUCTOR COMPONENT HAVING CONDUCTORS WITH WIRE BONDABLE METALIZATION LAYERS
10
Patent #:
Issue Dt:
06/28/2005
Application #:
10924186
Filing Dt:
08/23/2004
Publication #:
Pub Dt:
01/27/2005
Title:
ULTRA-LOW CURRENT BAND-GAP REFERENCE
11
Patent #:
Issue Dt:
03/14/2006
Application #:
10924296
Filing Dt:
08/23/2004
Publication #:
Pub Dt:
01/27/2005
Title:
EMBEDDED ROM DEVICE USING SUBSTRATE LEAKAGE
12
Patent #:
Issue Dt:
10/03/2006
Application #:
10924300
Filing Dt:
08/23/2004
Publication #:
Pub Dt:
02/23/2006
Title:
MEMORY ADDRESS REPAIR WITHOUT ENABLE FUSES
13
Patent #:
Issue Dt:
03/18/2008
Application #:
10924306
Filing Dt:
08/23/2004
Publication #:
Pub Dt:
02/23/2006
Title:
METHOD AND APPARATUS FOR GENERATING AND DETECTING INITIALIZATION PATTERNS FOR HIGH SPEED DRAM SYSTEMS
14
Patent #:
Issue Dt:
08/29/2006
Application #:
10924309
Filing Dt:
08/23/2004
Publication #:
Pub Dt:
01/27/2005
Title:
EMBEDDED ROM DEVICE USING SUBSTRATE LEAKAGE
15
Patent #:
Issue Dt:
11/21/2006
Application #:
10924695
Filing Dt:
08/24/2004
Publication #:
Pub Dt:
01/27/2005
Title:
DYNAMICALLY ADAPTABLE SEMICONDUCTOR PARAMETRIC TESTING
16
Patent #:
Issue Dt:
05/16/2006
Application #:
10925016
Filing Dt:
08/23/2004
Publication #:
Pub Dt:
02/23/2006
Title:
METHOD AND APPARATUS FOR MEMORY DEVICE WORDLINE
17
Patent #:
Issue Dt:
01/09/2007
Application #:
10925079
Filing Dt:
08/23/2004
Publication #:
Pub Dt:
02/23/2006
Title:
Methods of forming integrated circuits
18
Patent #:
Issue Dt:
08/28/2007
Application #:
10925100
Filing Dt:
08/23/2004
Publication #:
Pub Dt:
02/23/2006
Title:
METHODS OF FORMING FIELD EFFECT TRANSISTORS
19
Patent #:
Issue Dt:
12/05/2006
Application #:
10925120
Filing Dt:
08/24/2004
Publication #:
Pub Dt:
03/02/2006
Title:
MEMORY CELL WITH TRENCHED GATED THYRISTOR
20
Patent #:
Issue Dt:
10/10/2006
Application #:
10925158
Filing Dt:
08/23/2004
Publication #:
Pub Dt:
02/23/2006
Title:
METHODS OF FORMING CONDUCTIVE LINES
21
Patent #:
Issue Dt:
06/05/2007
Application #:
10925234
Filing Dt:
08/23/2004
Publication #:
Pub Dt:
02/23/2006
Title:
SYSTEM AND METHOD FOR CONTROLLING INPUT BUFFER BIASING CURRENT
22
Patent #:
Issue Dt:
04/24/2007
Application #:
10925243
Filing Dt:
08/25/2004
Publication #:
Pub Dt:
07/28/2005
Title:
COLUMNAR 1T-N MEMORY CELL STRUCTURE
23
Patent #:
Issue Dt:
01/30/2007
Application #:
10925255
Filing Dt:
08/23/2004
Publication #:
Pub Dt:
02/23/2006
Title:
DUAL PORT MEMORY WITH ASYMMETRIC INPUTS AND OUTPUTS, DEVICE, SYSTEM AND METHOD
24
Patent #:
Issue Dt:
05/15/2007
Application #:
10925260
Filing Dt:
08/25/2004
Publication #:
Pub Dt:
03/02/2006
Title:
BOTTOM SIDE STIFFENER PROBE CARD
25
Patent #:
Issue Dt:
08/07/2007
Application #:
10925339
Filing Dt:
08/24/2004
Publication #:
Pub Dt:
03/02/2006
Title:
HIGH DENSITY ACCESS TRANSISTOR HAVING INCREASED CHANNEL WIDTH AND METHODS OF FABRICATING SUCH DEVICES
26
Patent #:
Issue Dt:
09/30/2008
Application #:
10925406
Filing Dt:
08/24/2004
Publication #:
Pub Dt:
03/02/2006
Title:
MICROELECTRONIC IMAGERS WITH OPTICAL DEVICES HAVING INTEGRAL REFERENCE FEATURES AND METHODS FOR MANUFACTURING SUCH MICROELECTRONIC IMAGERS
27
Patent #:
Issue Dt:
10/30/2007
Application #:
10925464
Filing Dt:
08/25/2004
Publication #:
Pub Dt:
02/03/2005
Title:
STABLE PD-SOI DEVICES AND METHODS
28
Patent #:
Issue Dt:
09/16/2008
Application #:
10925501
Filing Dt:
08/24/2004
Publication #:
Pub Dt:
03/02/2006
Title:
METHODS FOR FORMING INTERCONNECTS IN VIAS AND MICROELECTRONIC WORKPIECES INCLUDING SUCH INTERCONNECTS
29
Patent #:
Issue Dt:
05/31/2005
Application #:
10925505
Filing Dt:
08/24/2004
Publication #:
Pub Dt:
01/27/2005
Title:
MICROELECTRONIC PACKAGE WITH REDUCED UNDERFILL AND METHODS FOR FORMING SUCH PACKAGES
30
Patent #:
Issue Dt:
04/03/2007
Application #:
10925525
Filing Dt:
08/24/2004
Publication #:
Pub Dt:
03/02/2006
Title:
WAFER BACKSIDE REMOVAL TO COMPLETE THROUGH-HOLES AND PROVIDE WAFER SINGULATION DURING THE FORMATION OF A SEMICONDUCTOR DEVICE
31
Patent #:
Issue Dt:
01/30/2007
Application #:
10925527
Filing Dt:
08/24/2004
Publication #:
Pub Dt:
03/02/2006
Title:
CONTACT STRUCTURE AND CONTACT LINER PROCESS
32
Patent #:
Issue Dt:
05/17/2005
Application #:
10925543
Filing Dt:
08/24/2004
Publication #:
Pub Dt:
01/27/2005
Title:
APPARATUS FOR DETERMINING BURN-IN RELIABILITY FROM WAFER LEVEL BURN-IN
33
Patent #:
Issue Dt:
09/11/2007
Application #:
10925655
Filing Dt:
08/25/2004
Publication #:
Pub Dt:
02/03/2005
Title:
STABLE PD-SOI DEVICES AND METHODS
34
Patent #:
Issue Dt:
09/18/2007
Application #:
10925715
Filing Dt:
08/24/2004
Publication #:
Pub Dt:
03/02/2006
Title:
LINER FOR SHALLOW TRENCH ISOLATION
35
Patent #:
Issue Dt:
10/17/2006
Application #:
10925789
Filing Dt:
08/24/2004
Publication #:
Pub Dt:
03/02/2006
Title:
METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS
36
Patent #:
Issue Dt:
03/13/2007
Application #:
10925793
Filing Dt:
08/24/2004
Publication #:
Pub Dt:
03/02/2006
Title:
METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS
37
Patent #:
Issue Dt:
05/08/2007
Application #:
10925865
Filing Dt:
08/25/2004
Publication #:
Pub Dt:
02/17/2005
Title:
SELECTIVELY DEPOSITED SILICON OXIDE LAYERS ON A SILICON SUBSTRATE
38
Patent #:
Issue Dt:
10/21/2008
Application #:
10925917
Filing Dt:
08/26/2004
Publication #:
Pub Dt:
04/28/2005
Title:
ISOLATION TECHNIQUES FOR REDUCING DARK CURRENT IN CMOS IMAGE SENSORS
39
Patent #:
Issue Dt:
01/13/2009
Application #:
10926345
Filing Dt:
08/26/2004
Publication #:
Pub Dt:
03/02/2006
Title:
TWO NARROW BAND AND ONE WIDE BAND COLOR FILTER FOR INCREASING COLOR IMAGE SENSOR SENSITIVITY
40
Patent #:
Issue Dt:
07/03/2007
Application #:
10926358
Filing Dt:
08/26/2004
Publication #:
Pub Dt:
02/03/2005
Title:
ISOLATION TECHNIQUES FOR REDUCING DARK CURRENT IN CMOS IMAGE SENSORS
41
Patent #:
Issue Dt:
03/14/2006
Application #:
10926360
Filing Dt:
08/26/2004
Publication #:
Pub Dt:
12/08/2005
Title:
APPARATUS AND METHOD FOR MANUFACTURING TILTED MICROLENSES
42
Patent #:
Issue Dt:
08/15/2006
Application #:
10926434
Filing Dt:
08/24/2004
Publication #:
Pub Dt:
01/27/2005
Title:
METHOD AND APPARATUS FOR ATTACHING MICROELECTRONIC SUBSTRATES AND SUPPORT MEMBERS
43
Patent #:
Issue Dt:
01/03/2006
Application #:
10926470
Filing Dt:
08/26/2004
Publication #:
Pub Dt:
02/03/2005
Title:
JUNCTION-ISOLATED DEPLETION MODE FERROELECTRIC MEMORY DEVICES
44
Patent #:
Issue Dt:
06/26/2007
Application #:
10926471
Filing Dt:
08/26/2004
Publication #:
Pub Dt:
02/03/2005
Title:
METHODS FOR MAKING NEARLY PLANAR DIELECTRIC FILMS IN INTEGRATED CIRCUITS
45
Patent #:
Issue Dt:
05/03/2005
Application #:
10926617
Filing Dt:
08/26/2004
Publication #:
Pub Dt:
02/03/2005
Title:
JUNCTION-ISOLATED DEPLETION MODE FERROELECTRIC MEMORY DEVICES
46
Patent #:
Issue Dt:
06/07/2005
Application #:
10926623
Filing Dt:
08/26/2004
Publication #:
Pub Dt:
02/03/2005
Title:
JUNCTION-ISOLATED DEPLETION MODE FERROELECTRIC MEMORY DEVICES
47
Patent #:
Issue Dt:
09/11/2007
Application #:
10926675
Filing Dt:
08/26/2004
Publication #:
Pub Dt:
03/02/2006
Title:
ONE-TRANSISTOR COMPOSITE-GATE MEMORY
48
Patent #:
Issue Dt:
01/25/2011
Application #:
10926727
Filing Dt:
08/26/2004
Publication #:
Pub Dt:
01/27/2005
Title:
SYSTEM AND METHOD FOR CONTROLLING USER ACCESS TO AN ELECTRONIC DEVICE
49
Patent #:
Issue Dt:
08/15/2006
Application #:
10926784
Filing Dt:
08/25/2004
Publication #:
Pub Dt:
03/03/2005
Title:
PHASE -CHANGE MEMORY DEVICE WITH BIASING OF DESELECTED BIT LINES
50
Patent #:
Issue Dt:
07/25/2006
Application #:
10926812
Filing Dt:
08/26/2004
Publication #:
Pub Dt:
03/02/2006
Title:
LANTHANIDE OXIDE DIELECTRIC LAYER
51
Patent #:
Issue Dt:
11/13/2007
Application #:
10926871
Filing Dt:
08/26/2004
Publication #:
Pub Dt:
02/03/2005
Title:
TITANIUM SILICIDE BORIDE GATE ELECTRODE
52
Patent #:
Issue Dt:
05/30/2006
Application #:
10926898
Filing Dt:
08/25/2004
Publication #:
Pub Dt:
02/03/2005
Title:
COMMUNICATION DEVICE FOR A LOGIC CIRCUIT
53
Patent #:
Issue Dt:
01/13/2009
Application #:
10927121
Filing Dt:
08/27/2004
Publication #:
Pub Dt:
03/02/2006
Title:
METHOD AND APPARATUS FOR IMPROVING PIXEL OUTPUT SWING IN IMAGER SENSORS
54
Patent #:
Issue Dt:
09/01/2009
Application #:
10927248
Filing Dt:
08/26/2004
Publication #:
Pub Dt:
03/02/2006
Title:
DELAY LINE OFF-STATE CONTROL WITH POWER REDUCTION
55
Patent #:
Issue Dt:
09/04/2007
Application #:
10927253
Filing Dt:
08/25/2004
Publication #:
Pub Dt:
02/03/2005
Title:
METHOD OF MAKING A SEMICONDUCTOR DEVICE HAVING AN OPENING IN A SOLDER MASK
56
Patent #:
Issue Dt:
06/10/2008
Application #:
10927308
Filing Dt:
08/27/2004
Publication #:
Pub Dt:
03/02/2006
Title:
APPARATUS AND METHOD FOR PROCESSING IMAGES
57
Patent #:
Issue Dt:
08/02/2005
Application #:
10927578
Filing Dt:
08/25/2004
Publication #:
Pub Dt:
02/03/2005
Title:
INTEGRATGED CIRCUIT CHARACTERIZATION PRINTED CIRCUIT BOARD, TEST EQUIPMENT INCLUDING SAME, METHOD OF FABRICATION THEREOF AND METHOD OF CHARACTERIZING AN INTEGRATED CIRCUIT DEVICE
58
Patent #:
Issue Dt:
07/08/2008
Application #:
10927591
Filing Dt:
08/27/2004
Publication #:
Pub Dt:
03/02/2006
Title:
HIGH DYNAMIC RANGE IMAGER WITH A ROLLING SHUTTER
59
Patent #:
Issue Dt:
06/16/2009
Application #:
10927607
Filing Dt:
08/26/2004
Publication #:
Pub Dt:
03/02/2006
Title:
MEMORY MODULES AND METHODS FOR MANUFACTURING MEMORY MODULES
60
Patent #:
Issue Dt:
08/01/2006
Application #:
10927760
Filing Dt:
08/27/2004
Publication #:
Pub Dt:
03/02/2006
Title:
SLANTED VIAS FOR ELECTRICAL CIRCUITS ON CIRCUIT BOARDS AND OTHER SUBSTRATES
61
Patent #:
Issue Dt:
09/05/2006
Application #:
10927763
Filing Dt:
08/27/2004
Publication #:
Pub Dt:
03/02/2006
Title:
INPUT AND OUTPUT BUFFERS HAVING SYMMETRICAL OPERATING CHARACTERISTICS AND IMMUNITY FROM VOLTAGE VARIATIONS
62
Patent #:
Issue Dt:
12/09/2008
Application #:
10927871
Filing Dt:
08/27/2004
Title:
STATUS OF OVERALL HEALTH OF NONVOLATILE MEMORY
63
Patent #:
Issue Dt:
09/19/2006
Application #:
10928034
Filing Dt:
08/27/2004
Publication #:
Pub Dt:
03/02/2006
Title:
MEMORY DEVICES HAVING REDUCED COUPLING NOISE BETWEEN WORDLINES
64
Patent #:
Issue Dt:
01/02/2007
Application #:
10928250
Filing Dt:
08/27/2004
Publication #:
Pub Dt:
03/02/2006
Title:
INTEGRATED DRAM-NVRAM MULTI-LEVEL MEMORY
65
Patent #:
Issue Dt:
12/06/2011
Application #:
10928310
Filing Dt:
08/30/2004
Publication #:
Pub Dt:
03/02/2006
Title:
DUAL PINNED DIODE PIXEL WITH SHUTTER
66
Patent #:
Issue Dt:
10/28/2008
Application #:
10928314
Filing Dt:
08/30/2004
Publication #:
Pub Dt:
03/02/2006
Title:
ACTIVE PHOTOSENSITIVE STRUCTURE WITH BURIED DEPLETION LAYER
67
Patent #:
Issue Dt:
04/29/2008
Application #:
10928315
Filing Dt:
08/30/2004
Publication #:
Pub Dt:
03/02/2006
Title:
DRAM LAYOUT WITH VERTICAL FETS AND METHOD OF FORMATION
68
Patent #:
Issue Dt:
07/10/2007
Application #:
10928317
Filing Dt:
08/30/2004
Publication #:
Pub Dt:
03/02/2006
Title:
METHOD OF FABRICATING A VERTICAL WRAP-AROUND-GATE FIELD-EFFECT-TRANSISTOR FOR HIGH DENSITY, LOW VOLTAGE LOGIC AND MEMORY ARRAY
69
Patent #:
Issue Dt:
08/12/2008
Application #:
10928323
Filing Dt:
08/30/2004
Publication #:
Pub Dt:
02/03/2005
Title:
APPARATUS AND METHOD FOR ELIMINATING ARTIFACTS IN ACTIVE PIXEL SENSOR (APS) IMAGERS
70
Patent #:
Issue Dt:
01/13/2009
Application #:
10928324
Filing Dt:
08/30/2004
Publication #:
Pub Dt:
03/02/2006
Title:
ANTI-ECLIPSING CIRCUIT FOR IMAGE SENSORS
71
Patent #:
Issue Dt:
04/10/2007
Application #:
10928385
Filing Dt:
08/27/2004
Publication #:
Pub Dt:
02/03/2005
Title:
MOTHERBOARD MEMORY SLOT RIBBON CABLE AND APPARATUS
72
Patent #:
Issue Dt:
01/10/2006
Application #:
10928400
Filing Dt:
08/27/2004
Publication #:
Pub Dt:
02/03/2005
Title:
DEVICE FOR MARGIN TESTING A SEMICONDUCTOR MEMORY BY APPLYING A STRESSING VOLTAGE SIMULTANEOUSLY TO COMPLEMENTARY AND TRUE DIGIT LINES
73
Patent #:
Issue Dt:
03/28/2006
Application #:
10928415
Filing Dt:
08/27/2004
Publication #:
Pub Dt:
02/03/2005
Title:
COMPACT DECODE AND MULTIPLEXING CIRCUITRY FOR A MULTI-PORT MEMORY HAVING A COMMON MEMORY INTERFACE
74
Patent #:
Issue Dt:
07/18/2006
Application #:
10928424
Filing Dt:
08/27/2004
Publication #:
Pub Dt:
03/02/2006
Title:
SYSTEM AND METHOD FOR REDUCED POWER OPEN-LOOP SYNTHESIS OF OUTPUT CLOCK SIGNALS HAVING A SELECTED PHASE RELATIVE TO AN INPUT CLOCK SIGNAL
75
Patent #:
Issue Dt:
03/21/2006
Application #:
10928491
Filing Dt:
08/27/2004
Publication #:
Pub Dt:
02/03/2005
Title:
ELECTRONIC SYSTEMS COMPRISING MEMORY DEVICES
76
Patent #:
Issue Dt:
09/05/2006
Application #:
10928505
Filing Dt:
08/26/2004
Publication #:
Pub Dt:
02/10/2005
Title:
METHOD FOR IMPROVING THICKNESS UNIFORMITY OF DEPOSITED OZONE-TEOS SILICATE GLASS LAYERS
77
Patent #:
Issue Dt:
06/19/2007
Application #:
10928512
Filing Dt:
08/26/2004
Publication #:
Pub Dt:
02/10/2005
Title:
METHOD OF WAFER BUMPING FOR ENABLING A STITCH WIRE BOND IN THE ABSENCE OF DISCRETE BUMP FORMATION
78
Patent #:
Issue Dt:
09/26/2006
Application #:
10928514
Filing Dt:
08/27/2004
Publication #:
Pub Dt:
03/02/2006
Title:
METHODS OF FORMING GATELINES AND TRANSISTOR DEVICES
79
Patent #:
Issue Dt:
07/10/2007
Application #:
10928522
Filing Dt:
08/26/2004
Publication #:
Pub Dt:
03/02/2006
Title:
VERTICAL TRANSISTOR STRUCTURES HAVING VERTICAL-SURROUNDING-GATES WITH SELF-ALIGNED FEATURES
80
Patent #:
Issue Dt:
05/15/2007
Application #:
10928547
Filing Dt:
08/26/2004
Publication #:
Pub Dt:
02/03/2005
Title:
METHODS OF FORMING HAFNIUM OXIDE
81
Patent #:
Issue Dt:
05/27/2008
Application #:
10928598
Filing Dt:
08/27/2004
Publication #:
Pub Dt:
03/02/2006
Title:
METHODS FOR FORMING VIAS OF VARYING LATERAL DIMENSIONS
82
Patent #:
Issue Dt:
08/26/2008
Application #:
10928666
Filing Dt:
08/26/2004
Publication #:
Pub Dt:
03/02/2006
Title:
ELECTRONIC DEVICES AT THE WAFER LEVEL HAVING FRONT SIDE AND EDGE PROTECTION MATERIAL AND SYSTEMS INCLUDING THE DEVICES
83
Patent #:
Issue Dt:
09/12/2006
Application #:
10928771
Filing Dt:
08/27/2004
Publication #:
Pub Dt:
02/10/2005
Title:
PHOTOLITHOGRAPHIC TECHNIQUES FOR PRODUCING ANGLED LINES
84
Patent #:
Issue Dt:
09/28/2010
Application #:
10928978
Filing Dt:
08/27/2004
Publication #:
Pub Dt:
02/03/2005
Title:
TECHNIQUES FOR PACKAGING A MULTIPLE DEVICE COMPONENT
85
Patent #:
Issue Dt:
01/23/2007
Application #:
10929173
Filing Dt:
08/30/2004
Publication #:
Pub Dt:
03/02/2006
Title:
METHODS FOR FORMING AN ENRICHED METAL OXIDE SURFACE FOR USE IN A SEMICONDUCTOR DEVICE
86
Patent #:
Issue Dt:
07/04/2006
Application #:
10929174
Filing Dt:
08/30/2004
Publication #:
Pub Dt:
02/03/2005
Title:
SILICON RICH BARRIER LAYERS FOR INTEGRATED CIRCUIT DEVICES
87
Patent #:
Issue Dt:
05/02/2006
Application #:
10929202
Filing Dt:
08/30/2004
Publication #:
Pub Dt:
03/02/2006
Title:
APPARATUS WITH EQUALIZING VOLTAGE GENERATION CIRCUIT AND METHODS OF USE
88
Patent #:
Issue Dt:
07/21/2009
Application #:
10929210
Filing Dt:
08/30/2004
Publication #:
Pub Dt:
02/10/2005
Title:
RESISTIVE HEATER FOR THERMO OPTIC DEVICE
89
Patent #:
Issue Dt:
08/28/2007
Application #:
10929251
Filing Dt:
08/30/2004
Publication #:
Pub Dt:
02/03/2005
Title:
SELECTIVE ELECTROLESS-PLATED COPPER METALLIZATION
90
Patent #:
Issue Dt:
08/09/2005
Application #:
10929253
Filing Dt:
08/30/2004
Publication #:
Pub Dt:
02/03/2005
Title:
METHOD AND STRUCTURE FOR HIGH CAPACITANCE MEMORY CELLS
91
Patent #:
Issue Dt:
07/14/2009
Application #:
10929272
Filing Dt:
08/30/2004
Publication #:
Pub Dt:
02/03/2005
Title:
ATOMIC LAYER DEPOSITION AND CONVERSION
92
Patent #:
Issue Dt:
09/18/2007
Application #:
10929281
Filing Dt:
08/30/2004
Publication #:
Pub Dt:
02/03/2005
Title:
MULTIPLE OXIDE THICKNESSES FOR MERGED MEMORY AND LOGIC APPLICATIONS
93
Patent #:
Issue Dt:
09/11/2007
Application #:
10929283
Filing Dt:
08/30/2004
Publication #:
Pub Dt:
02/03/2005
Title:
SEMICONDUCTOR INTEGRATED CIRCUIT PACKAGE HAVING ELECTRICALLY DISCONNECTED SOLDER BALLS FOR MOUNTING
94
Patent #:
Issue Dt:
12/12/2006
Application #:
10929307
Filing Dt:
08/30/2004
Publication #:
Pub Dt:
02/24/2005
Title:
SINGLE TRANSISTOR VERTICAL MEMORY GAIN CELL
95
Patent #:
Issue Dt:
08/01/2006
Application #:
10929610
Filing Dt:
08/30/2004
Publication #:
Pub Dt:
02/03/2005
Title:
ELECTRONIC DEVICE PACKAGE
96
Patent #:
Issue Dt:
09/13/2005
Application #:
10929613
Filing Dt:
08/30/2004
Publication #:
Pub Dt:
02/03/2005
Title:
PACKAGED MICROELECTRONIC DEVICES AND METHODS OF FORMING SAME
97
Patent #:
Issue Dt:
01/02/2007
Application #:
10929633
Filing Dt:
08/30/2004
Publication #:
Pub Dt:
04/21/2005
Title:
PLATINUM STUFFED WITH SILICON OXIDE AS A DIFFUSION OXYGEN BARRIER FOR SEMICONDUCTOR DEVICES
98
Patent #:
Issue Dt:
12/12/2006
Application #:
10929634
Filing Dt:
08/30/2004
Publication #:
Pub Dt:
02/03/2005
Title:
SEMICONDUCTOR CONTACT DEVICE
99
Patent #:
Issue Dt:
07/31/2007
Application #:
10929640
Filing Dt:
08/30/2004
Publication #:
Pub Dt:
01/26/2006
Title:
MICROELECTRONIC COMPONENT ASSEMBLIES WITH RECESSED WIRE BONDS AND METHODS OF MAKING SAME
100
Patent #:
Issue Dt:
05/09/2006
Application #:
10929800
Filing Dt:
08/30/2004
Publication #:
Pub Dt:
02/03/2005
Title:
VERTICAL TRANSISTOR AND METHOD OF MAKING
Assignor
1
Exec Dt:
06/29/2018
Assignee
1
8000 S. FEDERAL WAY
BOISE, IDAHO 83707
Correspondence name and address
WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
ONE MARKET, SPEAR TOWER, SUITE 3300
SAN FRANCISCO, CA 94105

Search Results as of: 05/13/2024 11:30 PM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT