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Reel/Frame:047243/0001   Pages: 959
Recorded: 08/23/2018
Attorney Dkt #:4816.238
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 17987
Page 86 of 180
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180
1
Patent #:
7170124
Issue Dt:
01/30/2007
Application #:
10968429
Filing Dt:
10/19/2004
Publication #:
US20050078534
Pub Dt:
04/14/2005
Title:
TRENCH BURIED BIT LINE MEMORY DEVICES AND METHODS THEREOF
2
Patent #:
6949952
Issue Dt:
09/27/2005
Application #:
10968446
Filing Dt:
10/18/2004
Publication #:
US20050077916
Pub Dt:
04/14/2005
Title:
PROGRAMMING CIRCUIT AND METHOD HAVING EXTENDED DURATION PROGRAMMING CAPABILITIES
3
Patent #:
7235493
Issue Dt:
06/26/2007
Application #:
10968786
Filing Dt:
10/18/2004
Publication #:
US20060084262
Pub Dt:
04/20/2006
Title:
LOW-K DIELECTRIC PROCESS FOR MULTILEVEL INTERCONNECTION USING MICROCAVITY ENGINEERING DURING ELECTRIC CIRCUIT MANUFACTURE
4
Patent #:
7276446
Issue Dt:
10/02/2007
Application #:
10968827
Filing Dt:
10/18/2004
Publication #:
US20050107010
Pub Dt:
05/19/2005
Title:
PLANARIZING SOLUTIONS, PLANARIZING MACHINES AND METHODS FOR MECHANICAL OR CHEMICAL-MECHANICAL PLANARIZATION OF MICROELECTRONIC-DEVICE SUBSTRATE ASSEMBLIES
5
Patent #:
7122480
Issue Dt:
10/17/2006
Application #:
10969568
Filing Dt:
10/21/2004
Publication #:
US20050056875
Pub Dt:
03/17/2005
Title:
METHOD OF PLASMA ETCHING A SUBSTRATE
6
Patent #:
7386643
Issue Dt:
06/10/2008
Application #:
10970015
Filing Dt:
10/21/2004
Publication #:
US20050060502
Pub Dt:
03/17/2005
Title:
MECHANISM TO GUARANTEE FORWARD PROGRESS FOR INCOMING COHERENT INPUT/OUTPUT (I/O) TRANSACTIONS FOR CACHING I/O AGENT ON ADDRESS CONFLICT WITH PROCESSOR TRANSACTIONS
7
Patent #:
7101737
Issue Dt:
09/05/2006
Application #:
10970399
Filing Dt:
10/20/2004
Publication #:
US20050056919
Pub Dt:
03/17/2005
Title:
METHOD OF ENCAPSULATING INTERCONNECTING UNITS IN PACKAGED MICROELECTRONIC DEVICES
8
Patent #:
7157364
Issue Dt:
01/02/2007
Application #:
10971392
Filing Dt:
10/21/2004
Publication #:
US20050085063
Pub Dt:
04/21/2005
Title:
METHOD FOR FORMING METAL CONTACTS ON A SUBSTRATE
9
Patent #:
7078294
Issue Dt:
07/18/2006
Application #:
10971774
Filing Dt:
10/22/2004
Publication #:
US20050112905
Pub Dt:
05/26/2005
Title:
SEALING METHOD FOR ELECTRONIC DEVICES FORMED ON A COMMON SEMICONDUCTOR SUBSTRATE AND CORRESPONDING CIRCUIT STRUCTURE
10
Patent #:
7257039
Issue Dt:
08/14/2007
Application #:
10971776
Filing Dt:
10/22/2004
Publication #:
US20050169095
Pub Dt:
08/04/2005
Title:
BIT LINE DISCHARGE CONTROL METHOD AND CIRCUIT FOR A SEMICONDUCTOR MEMORY
11
Patent #:
7269091
Issue Dt:
09/11/2007
Application #:
10971939
Filing Dt:
10/22/2004
Publication #:
US20060044922
Pub Dt:
03/02/2006
Title:
WORD LINE DRIVER CIRCUITRY AND METHODS FOR USING THE SAME
12
Patent #:
7382177
Issue Dt:
06/03/2008
Application #:
10972544
Filing Dt:
10/25/2004
Publication #:
US20060087365
Pub Dt:
04/27/2006
Title:
VOLTAGE CHARGE PUMP AND METHOD OF OPERATING THE SAME
13
Patent #:
7417255
Issue Dt:
08/26/2008
Application #:
10973161
Filing Dt:
10/25/2004
Publication #:
US20050112793
Pub Dt:
05/26/2005
Title:
METHODS OF FORMING A HIGH CONDUCTIVITY DIAMOND FILM AND STRUCTURES FORMED THEREBY
14
Patent #:
6930916
Issue Dt:
08/16/2005
Application #:
10973312
Filing Dt:
10/26/2004
Publication #:
US20050058004
Pub Dt:
03/17/2005
Title:
HIGH SPEED LOW VOLTAGE DRIVER
15
Patent #:
6985382
Issue Dt:
01/10/2006
Application #:
10973720
Filing Dt:
10/26/2004
Publication #:
US20050088876
Pub Dt:
04/28/2005
Title:
BRIDGE-TYPE MAGNETIC RANDOM ACCESS MEMORY (MRAM) LATCH
16
Patent #:
7078243
Issue Dt:
07/18/2006
Application #:
10973817
Filing Dt:
10/26/2004
Publication #:
US20050130327
Pub Dt:
06/16/2005
Title:
SHIELDING ARRANGEMENT TO PROTECT A CIRCUIT FROM STRAY MAGNETIC FIELDS
17
Patent #:
7185154
Issue Dt:
02/27/2007
Application #:
10975577
Filing Dt:
10/28/2004
Publication #:
US20050083759
Pub Dt:
04/21/2005
Title:
SINGLE SEGMENT DATA OBJECT MANAGEMENT
18
Patent #:
7162606
Issue Dt:
01/09/2007
Application #:
10975665
Filing Dt:
10/28/2004
Publication #:
US20050086422
Pub Dt:
04/21/2005
Title:
MULTIPLE SEGMENT DATA OBJECT MANAGEMENT
19
Patent #:
7087111
Issue Dt:
08/08/2006
Application #:
10975714
Filing Dt:
10/27/2004
Publication #:
US20050109271
Pub Dt:
05/26/2005
Title:
METHOD OF FORMING A REFRACTORY METAL SILICIDE
20
Patent #:
7500129
Issue Dt:
03/03/2009
Application #:
10976572
Filing Dt:
10/29/2004
Publication #:
US20060117231
Pub Dt:
06/01/2006
Title:
ADAPTIVE COMMUNICATION INTERFACE
21
Patent #:
8501523
Issue Dt:
08/06/2013
Application #:
10977186
Filing Dt:
10/28/2004
Publication #:
US20060091492
Pub Dt:
05/04/2006
Title:
DEPOSITING TITANIUM SILICON NITRIDE FILMS FOR FORMING PHASE CHANGE MEMORIES
22
Patent #:
7304373
Issue Dt:
12/04/2007
Application #:
10977908
Filing Dt:
10/28/2004
Publication #:
US20060091508
Pub Dt:
05/04/2006
Title:
POWER DISTRIBUTION WITHIN A FOLDED FLEX PACKAGE METHOD AND APPARATUS
23
Patent #:
7362637
Issue Dt:
04/22/2008
Application #:
10978464
Filing Dt:
11/02/2004
Publication #:
US20050088899
Pub Dt:
04/28/2005
Title:
CURRENT SWITCHING SENSOR DETECTOR
24
Patent #:
7098724
Issue Dt:
08/29/2006
Application #:
10979269
Filing Dt:
11/02/2004
Publication #:
US20060091934
Pub Dt:
05/04/2006
Title:
FORWARD BIASING PROTECTION CIRCUIT
25
Patent #:
7262488
Issue Dt:
08/28/2007
Application #:
10979849
Filing Dt:
11/01/2004
Publication #:
US20050090107
Pub Dt:
04/28/2005
Title:
SUBSTRATE WITH ENHANCED PROPERTIES FOR PLANARIZATION
26
Patent #:
7262428
Issue Dt:
08/28/2007
Application #:
10979994
Filing Dt:
11/03/2004
Publication #:
US20050087842
Pub Dt:
04/28/2005
Title:
STRAINED SI/SIGE/SOI ISLANDS AND PROCESSES OF MAKING SAME
27
Patent #:
7129573
Issue Dt:
10/31/2006
Application #:
10980554
Filing Dt:
11/03/2004
Publication #:
US20050064695
Pub Dt:
03/24/2005
Title:
SYSTEM HAVING SEMICONDUCTOR COMPONENT WITH ENCAPSULATED, BONDED, INTERCONNECT CONTACTS
28
Patent #:
7176748
Issue Dt:
02/13/2007
Application #:
10982528
Filing Dt:
11/05/2004
Publication #:
US20050127982
Pub Dt:
06/16/2005
Title:
CHARGE PUMP CIRCUIT WITH A BRIEF SETTLING TIME AND HIGH OUTPUT VOLTAGE REGULATION PRECISION
29
Patent #:
7046537
Issue Dt:
05/16/2006
Application #:
10982892
Filing Dt:
11/08/2004
Publication #:
US20050073900
Pub Dt:
04/07/2005
Title:
REDUCED SIGNAL SWING IN BIT LINES IN A CAM
30
Patent #:
7275190
Issue Dt:
09/25/2007
Application #:
10983801
Filing Dt:
11/08/2004
Publication #:
US20060098484
Pub Dt:
05/11/2006
Title:
MEMORY BLOCK QUALITY IDENTIFICATION IN A MEMORY DEVICE
31
Patent #:
7457908
Issue Dt:
11/25/2008
Application #:
10984372
Filing Dt:
11/08/2004
Publication #:
US20050157553
Pub Dt:
07/21/2005
Title:
INTEGRATED MEMORY DEVICE WITH MULTI-SECTOR SELECTION COMMANDS
32
Patent #:
7397477
Issue Dt:
07/08/2008
Application #:
10984373
Filing Dt:
11/08/2004
Publication #:
US20050128208
Pub Dt:
06/16/2005
Title:
MEMORY SYSTEM HAVING MULTIPLE ADDRESS ALLOCATION FORMATS AND METHOD FOR USE THEREOF
33
Patent #:
7259435
Issue Dt:
08/21/2007
Application #:
10985573
Filing Dt:
11/10/2004
Publication #:
US20050062114
Pub Dt:
03/24/2005
Title:
INTERMEDIATE SEMICONDUCTOR DEVICE HAVING NITROGEN CONCENTRATION PROFILE
34
Patent #:
7163893
Issue Dt:
01/16/2007
Application #:
10985960
Filing Dt:
11/12/2004
Publication #:
US20050090083
Pub Dt:
04/28/2005
Title:
ADVANCED BARRIER LINER FORMATION FOR VIAS
35
Patent #:
6974990
Issue Dt:
12/13/2005
Application #:
10986246
Filing Dt:
11/10/2004
Publication #:
US20050064656
Pub Dt:
03/24/2005
Title:
SELECTIVE POLYSILICON STUD GROWTH
36
Patent #:
7606951
Issue Dt:
10/20/2009
Application #:
10988417
Filing Dt:
11/12/2004
Publication #:
US20060106954
Pub Dt:
05/18/2006
Title:
MEMORY REUSE FOR MULTIPLE ENDPOINTS IN USB DEVICE
37
Patent #:
7195995
Issue Dt:
03/27/2007
Application #:
10989530
Filing Dt:
11/16/2004
Publication #:
US20050064689
Pub Dt:
03/24/2005
Title:
METHOD OF MANUFACTURING A MULTILAYERED DOPED CONDUCTOR FOR A CONTACT IN AN INTEGRATED CIRCUIT DEVICE
38
Patent #:
7529958
Issue Dt:
05/05/2009
Application #:
10989948
Filing Dt:
11/15/2004
Publication #:
US20060107077
Pub Dt:
05/18/2006
Title:
PROGRAMMABLE POWER TRANSITION COUNTER
39
Patent #:
6940761
Issue Dt:
09/06/2005
Application #:
10990586
Filing Dt:
11/17/2004
Publication #:
US20050094453
Pub Dt:
05/05/2005
Title:
MERGED MOS-BIPOLAR CAPACITOR MEMORY CELL
40
Patent #:
6943083
Issue Dt:
09/13/2005
Application #:
10990713
Filing Dt:
11/17/2004
Publication #:
US20050068828
Pub Dt:
03/31/2005
Title:
MERGED MOS-BIPOLAR CAPACITOR MEMORY CELL
41
Patent #:
7029926
Issue Dt:
04/18/2006
Application #:
10991876
Filing Dt:
11/18/2004
Publication #:
US20050068806
Pub Dt:
03/31/2005
Title:
DOUBLE DENSITY MRAM WITH PLANAR PROCESSING
42
Patent #:
7092285
Issue Dt:
08/15/2006
Application #:
10992052
Filing Dt:
11/18/2004
Title:
STATE SAVE-ON-POWER-DOWN USING GMR NON-VOLATILE ELEMENTS
43
Patent #:
7192806
Issue Dt:
03/20/2007
Application #:
10992384
Filing Dt:
11/18/2004
Publication #:
US20050067687
Pub Dt:
03/31/2005
Title:
METHOD OF ESTABLISHING NON-PERMANENT ELECTRICAL CONNECTION BETWEEN AN INTEGRATED CIRCUIT DEVICE LEAD ELEMENT AND A SUBSTRATE
44
Patent #:
7279788
Issue Dt:
10/09/2007
Application #:
10992424
Filing Dt:
11/18/2004
Publication #:
US20050073041
Pub Dt:
04/07/2005
Title:
DEVICE FOR ESTABLISHING NON-PERMANENT ELECTRICAL CONNECTION BETWEEN AN INTEGRATED CIRCUIT DEVICE LEAD ELEMENT AND A SUBSTRATE
45
Patent #:
7166479
Issue Dt:
01/23/2007
Application #:
10992984
Filing Dt:
11/19/2004
Publication #:
US20060063278
Pub Dt:
03/23/2006
Title:
METHODS OF FORMING MAGNETIC SHIELDING FOR A THIN-FILM MEMORY ELEMENT
46
Patent #:
7594063
Issue Dt:
09/22/2009
Application #:
10993692
Filing Dt:
11/19/2004
Title:
STORAGE CAPACITY STATUS
47
Patent #:
7208348
Issue Dt:
04/24/2007
Application #:
10994995
Filing Dt:
11/22/2004
Publication #:
US20050090040
Pub Dt:
04/28/2005
Title:
METHODS OF FABRICATING A VIA-IN-PAD WITH OFF-CENTER GEOMETRY
48
Patent #:
7208793
Issue Dt:
04/24/2007
Application #:
10995839
Filing Dt:
11/23/2004
Publication #:
US20060110870
Pub Dt:
05/25/2006
Title:
SCALABLE INTEGRATED LOGIC AND NON-VOLATILE MEMORY
49
Patent #:
6972214
Issue Dt:
12/06/2005
Application #:
10998380
Filing Dt:
11/29/2004
Publication #:
US20050087847
Pub Dt:
04/28/2005
Title:
METHOD FOR FABRICATING A SEMICONDUCTOR PACKAGE WITH MULTI LAYERED LEADFRAME
50
Patent #:
7087992
Issue Dt:
08/08/2006
Application #:
10999435
Filing Dt:
11/30/2004
Publication #:
US20050073029
Pub Dt:
04/07/2005
Title:
MULTICHIP WAFER LEVEL PACKAGES AND COMPUTING SYSTEMS INCORPORATING SAME
51
Patent #:
7208987
Issue Dt:
04/24/2007
Application #:
10999751
Filing Dt:
11/30/2004
Publication #:
US20050134345
Pub Dt:
06/23/2005
Title:
RESET INITIALIZATION
52
Patent #:
7118950
Issue Dt:
10/10/2006
Application #:
11000588
Filing Dt:
11/30/2004
Publication #:
US20050095756
Pub Dt:
05/05/2005
Title:
METHOD OF FORMING A FIELD EFFECT TRANSISTOR
53
Patent #:
7470576
Issue Dt:
12/30/2008
Application #:
11000786
Filing Dt:
11/30/2004
Publication #:
US20050101075
Pub Dt:
05/12/2005
Title:
METHODS OF FORMING FIELD EFFECT TRANSISTOR GATE LINES
54
Patent #:
7465616
Issue Dt:
12/16/2008
Application #:
11000809
Filing Dt:
11/30/2004
Publication #:
US20050106795
Pub Dt:
05/19/2005
Title:
METHOD OF FORMING A FIELD EFFECT TRANSISTOR
55
Patent #:
7312120
Issue Dt:
12/25/2007
Application #:
11000825
Filing Dt:
11/30/2004
Publication #:
US20060043451
Pub Dt:
03/02/2006
Title:
METHOD FOR OBTAINING EXTREME SELECTIVITY OF METAL NITRIDES AND METAL OXIDES
56
Patent #:
6936507
Issue Dt:
08/30/2005
Application #:
11001145
Filing Dt:
11/30/2004
Publication #:
US20050095767
Pub Dt:
05/05/2005
Title:
METHOD OF FORMING FIELD EFFECT TRANSISTORS
57
Patent #:
7329558
Issue Dt:
02/12/2008
Application #:
11001306
Filing Dt:
12/02/2004
Publication #:
US20050104105
Pub Dt:
05/19/2005
Title:
DIFFERENTIAL NEGATIVE RESISTANCE MEMORY
58
Patent #:
7202562
Issue Dt:
04/10/2007
Application #:
11001930
Filing Dt:
12/02/2004
Publication #:
US20060118949
Pub Dt:
06/08/2006
Title:
INTEGRATED CIRCUIT COOLING SYSTEM AND METHOD
59
Patent #:
7161391
Issue Dt:
01/09/2007
Application #:
11003117
Filing Dt:
12/03/2004
Publication #:
US20060119396
Pub Dt:
06/08/2006
Title:
SKEW TOLERANT HIGH-SPEED DIGITAL PHASE DETECTOR
60
Patent #:
7215027
Issue Dt:
05/08/2007
Application #:
11003133
Filing Dt:
12/03/2004
Publication #:
US20050140018
Pub Dt:
06/30/2005
Title:
ELECTRICAL COUPLING STACK AND PROCESSES FOR MAKING SAME
61
Patent #:
7411255
Issue Dt:
08/12/2008
Application #:
11003138
Filing Dt:
12/03/2004
Publication #:
US20050151179
Pub Dt:
07/14/2005
Title:
DOPANT BARRIER FOR DOPED GLASS IN MEMORY DEVICES
62
Patent #:
7276433
Issue Dt:
10/02/2007
Application #:
11003275
Filing Dt:
12/03/2004
Publication #:
US20060121677
Pub Dt:
06/08/2006
Title:
METHODS OF FORMING INTEGRATED CIRCUITRY, METHODS OF FORMING MEMORY CIRCUITRY, AND METHODS OF FORMING FIELD EFFECT TRANSISTORS
63
Patent #:
7366027
Issue Dt:
04/29/2008
Application #:
11003502
Filing Dt:
12/03/2004
Publication #:
US20070189081
Pub Dt:
08/16/2007
Title:
METHOD AND APPARATUS FOR ERASING MEMORY
64
Patent #:
7082073
Issue Dt:
07/25/2006
Application #:
11003547
Filing Dt:
12/03/2004
Publication #:
US20060120193
Pub Dt:
06/08/2006
Title:
SYSTEM AND METHOD FOR REDUCING POWER CONSUMPTION DURING EXTENDED REFRESH PERIODS OF DYNAMIC RANDOM ACCESS MEMORY DEVICES
65
Patent #:
7126181
Issue Dt:
10/24/2006
Application #:
11003642
Filing Dt:
12/03/2004
Publication #:
US20050101078
Pub Dt:
05/12/2005
Title:
CAPACITOR CONSTRUCTIONS
66
Patent #:
7109063
Issue Dt:
09/19/2006
Application #:
11003694
Filing Dt:
12/03/2004
Publication #:
US20050085014
Pub Dt:
04/21/2005
Title:
SEMICONDUCTOR SUBSTRATE FOR BUILD-UP PACKAGES
67
Patent #:
7220616
Issue Dt:
05/22/2007
Application #:
11003832
Filing Dt:
12/03/2004
Publication #:
US20050079653
Pub Dt:
04/14/2005
Title:
METHODS FOR EPOXY LOC DIE ATTACHMENT
68
Patent #:
6999363
Issue Dt:
02/14/2006
Application #:
11004069
Filing Dt:
12/03/2004
Publication #:
US20050078515
Pub Dt:
04/14/2005
Title:
NON-VOLATILE MEMORY WITH TEST ROWS FOR DISTURB DETECTION
69
Patent #:
7193899
Issue Dt:
03/20/2007
Application #:
11004454
Filing Dt:
12/03/2004
Publication #:
US20050099845
Pub Dt:
05/12/2005
Title:
ERASE BLOCK DATA SPLITTING
70
Patent #:
7271096
Issue Dt:
09/18/2007
Application #:
11004702
Filing Dt:
12/03/2004
Publication #:
US20050098108
Pub Dt:
05/12/2005
Title:
METHOD FOR IMPROVED DEPOSITION OF DIELECTRIC MATERIAL
71
Patent #:
7054532
Issue Dt:
05/30/2006
Application #:
11005712
Filing Dt:
12/07/2004
Publication #:
US20050105869
Pub Dt:
05/19/2005
Title:
THREE-DIMENSIONAL PHOTONIC CRYSTAL WAVEGUIDE STRUCTURE AND METHOD
72
Patent #:
7348237
Issue Dt:
03/25/2008
Application #:
11005909
Filing Dt:
12/06/2004
Publication #:
US20050085040
Pub Dt:
04/21/2005
Title:
NOR FLASH MEMORY CELL WITH HIGH STORAGE DENSITY
73
Patent #:
7064007
Issue Dt:
06/20/2006
Application #:
11006043
Filing Dt:
12/07/2004
Publication #:
US20050085015
Pub Dt:
04/21/2005
Title:
METHOD OF USING FOAMED INSULATORS IN THREE DIMENSIONAL MULTICHIP STRUCTURES
74
Patent #:
6977855
Issue Dt:
12/20/2005
Application #:
11006045
Filing Dt:
12/07/2004
Publication #:
US20050083739
Pub Dt:
04/21/2005
Title:
APPARATUS AND METHOD FOR DYNAMICALLY REPAIRING A SEMICONDUCTOR MEMORY
75
Patent #:
7113429
Issue Dt:
09/26/2006
Application #:
11006312
Filing Dt:
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Publication #:
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Pub Dt:
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Title:
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Filing Dt:
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Pub Dt:
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Title:
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Publication #:
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Pub Dt:
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Title:
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Filing Dt:
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Pub Dt:
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Title:
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Pub Dt:
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Title:
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Pub Dt:
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Title:
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Pub Dt:
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Title:
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Pub Dt:
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Title:
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Pub Dt:
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Title:
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Pub Dt:
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Title:
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Title:
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Pub Dt:
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Pub Dt:
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Title:
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Pub Dt:
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Title:
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Title:
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Pub Dt:
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Title:
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Pub Dt:
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Title:
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Pub Dt:
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Title:
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Title:
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Title:
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Title:
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Publication #:
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Pub Dt:
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Title:
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Assignor
1
U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Exec Dt:
06/29/2018
Assignee
1
MICRON TECHNOLOGY, INC.
8000 S. FEDERAL WAY
BOISE, IDAHO 83707
Correspondence name and address
WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
ONE MARKET, SPEAR TOWER, SUITE 3300
SAN FRANCISCO, CA 94105

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