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Reel/Frame:	047243/0001			Pages:	959
		Recorded:	08/23/2018
Attorney Dkt #:	4816.238
Conveyance:	RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).

Total properties: 17987
Page 92 of 180
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Patent #:	7482653	Issue Dt:	01/27/2009	Application #:	11185320	Filing Dt:	07/20/2005
Publication #:	US20070018228	Pub Dt:	01/25/2007
Title:	NON-VOLATILE MEMORY WITH CARBON NANOTUBES

Patent #:	7473637	Issue Dt:	01/06/2009	Application #:	11185423	Filing Dt:	07/20/2005
Publication #:	US20070020923	Pub Dt:	01/25/2007
Title:	ALD FORMED TITANIUM NITRIDE FILMS

Patent #:	7655938	Issue Dt:	02/02/2010	Application #:	11185488	Filing Dt:	07/20/2005
Publication #:	US20070018148	Pub Dt:	01/25/2007
Title:	PHASE CHANGE MEMORY WITH U-SHAPED CHALCOGENIDE CELL

Patent #:	7521989	Issue Dt:	04/21/2009	Application #:	11185905	Filing Dt:	07/20/2005
Publication #:	US20060018067	Pub Dt:	01/26/2006
Title:	DISTRIBUTION OF AN ELECTRIC QUANTITY THROUGH A CIRCUIT

Patent #:	7250687	Issue Dt:	07/31/2007	Application #:	11186481	Filing Dt:	07/21/2005
Publication #:	US20050253238	Pub Dt:	11/17/2005
Title:	SYSTEMS FOR DEGATING PACKAGED SEMICONDUCTOR DEVICES WITH TAPE SUBSTRATES

Patent #:	7352649	Issue Dt:	04/01/2008	Application #:	11186525	Filing Dt:	07/21/2005
Publication #:	US20070019486	Pub Dt:	01/25/2007
Title:	HIGH SPEED ARRAY PIPELINE ARCHITECTURE

Patent #:	7145228	Issue Dt:	12/05/2006	Application #:	11186534	Filing Dt:	07/21/2005
Publication #:	US20060006534	Pub Dt:	01/12/2006
Title:	MICROELECTRONIC DEVICES

Patent #:	7629819	Issue Dt:	12/08/2009	Application #:	11186548	Filing Dt:	07/21/2005
Publication #:	US20070030753	Pub Dt:	02/08/2007
Title:	SEAMLESS COARSE AND FINE DELAY STRUCTURE FOR HIGH PERFORMANCE DLL

Patent #:	7747933	Issue Dt:	06/29/2010	Application #:	11186713	Filing Dt:	07/21/2005
Publication #:	US20070033512	Pub Dt:	02/08/2007
Title:	METHOD AND APPARATUS FOR DETECTING COMMUNICATION ERRORS ON A BUS

Patent #:	7190081	Issue Dt:	03/13/2007	Application #:	11186714	Filing Dt:	07/21/2005
Publication #:	US20050253250	Pub Dt:	11/17/2005
Title:	MOLD GATES AND TAPE SUBSTRATES INCLUDING THE MOLD GATES

Patent #:	7499302	Issue Dt:	03/03/2009	Application #:	11186803	Filing Dt:	07/22/2005
Publication #:	US20050254277	Pub Dt:	11/17/2005
Title:	NOISE REDUCTION IN A CAM MEMORY CELL

Patent #:	7362619	Issue Dt:	04/22/2008	Application #:	11187058	Filing Dt:	07/22/2005
Publication #:	US20050254336	Pub Dt:	11/17/2005
Title:	DATA STROBE SYNCHRONIZATION CIRCUIT AND METHOD FOR DOUBLE DATA RATE, MULTI-BIT WRITES

Patent #:	7335935	Issue Dt:	02/26/2008	Application #:	11188235	Filing Dt:	07/22/2005
Publication #:	US20060003583	Pub Dt:	01/05/2006
Title:	SEMICONDUCTOR STRUCTURES

Patent #:	7161217	Issue Dt:	01/09/2007	Application #:	11188364	Filing Dt:	07/25/2005
Publication #:	US20050253186	Pub Dt:	11/17/2005
Title:	TRENCH CORNER EFFECT BIDIRECTIONAL FLASH MEMORY CELL

Patent #:	7283394	Issue Dt:	10/16/2007	Application #:	11188497	Filing Dt:	07/25/2005
Publication #:	US20050255638	Pub Dt:	11/17/2005
Title:	TRENCH CORNER EFFECT BIDIRECTIONAL FLASH MEMORY CELL

Patent #:	7768051	Issue Dt:	08/03/2010	Application #:	11188507	Filing Dt:	07/25/2005
Publication #:	US20070090363	Pub Dt:	04/26/2007
Title:	DRAM INCLUDING A VERTICAL SURROUND GATE TRANSISTOR

Patent #:	7285821	Issue Dt:	10/23/2007	Application #:	11188553	Filing Dt:	07/25/2005
Publication #:	US20050269627	Pub Dt:	12/08/2005
Title:	TRENCH CORNER EFFECT BIDIRECTIONAL FLASH MEMORY CELL

Patent #:	7329920	Issue Dt:	02/12/2008	Application #:	11188570	Filing Dt:	07/25/2005
Publication #:	US20050269625	Pub Dt:	12/08/2005
Title:	TRENCH CORNER EFFECT BIDIRECTIONAL FLASH MEMORY CELL

Patent #:	7154289	Issue Dt:	12/26/2006	Application #:	11188813	Filing Dt:	07/25/2005
Publication #:	US20050253629	Pub Dt:	11/17/2005
Title:	INPUT BUFFER WITH AUTOMATIC SWITCHING POINT ADJUSTMENT CIRCUITRY, AND SYNCHRONOUS DRAM DEVICE INCLUDING SAME

Patent #:	7535054	Issue Dt:	05/19/2009	Application #:	11188891	Filing Dt:	07/25/2005
Publication #:	US20050258480	Pub Dt:	11/24/2005
Title:	TRENCH CORNER EFFECT BIDIRECTIONAL FLASH MEMORY CELL

Patent #:	7583358	Issue Dt:	09/01/2009	Application #:	11189236	Filing Dt:	07/25/2005
Publication #:	US20070019172	Pub Dt:	01/25/2007
Title:	SYSTEMS AND METHODS FOR RETRIEVING RESIDUAL LIQUID DURING IMMERSION LENS PHOTOLITHOGRAPHY

Patent #:	7496719	Issue Dt:	02/24/2009	Application #:	11189448	Filing Dt:	07/26/2005
Publication #:	US20070028031	Pub Dt:	02/01/2007
Title:	UNIVERSAL NONVOLATILE MEMORY BOOT MODE

Patent #:	7776715	Issue Dt:	08/17/2010	Application #:	11189945	Filing Dt:	07/26/2005
Publication #:	US20070023805	Pub Dt:	02/01/2007
Title:	REVERSE CONSTRUCTION MEMORY CELL

Patent #:	7541081	Issue Dt:	06/02/2009	Application #:	11190014	Filing Dt:	07/27/2005
Publication #:	US20070003732	Pub Dt:	01/04/2007
Title:	PHASE CHANGE MEMORY FOR ARCHIVAL DATA STORAGE

Patent #:	7225469	Issue Dt:	05/29/2007	Application #:	11190420	Filing Dt:	07/27/2005
Publication #:	US20050262574	Pub Dt:	11/24/2005
Title:	BIOS LOCK ENCODE/DECODE DRIVER

Patent #:	7369436	Issue Dt:	05/06/2008	Application #:	11190467	Filing Dt:	07/27/2005
Publication #:	US20050269626	Pub Dt:	12/08/2005
Title:	VERTICAL NAND FLASH MEMORY DEVICE

Patent #:	7276733	Issue Dt:	10/02/2007	Application #:	11191505	Filing Dt:	07/28/2005
Publication #:	US20050259468	Pub Dt:	11/24/2005
Title:	SELECT LINES FOR NAND MEMORY DEVICES

Patent #:	7491650	Issue Dt:	02/17/2009	Application #:	11191685	Filing Dt:	07/27/2005
Publication #:	US20070023396	Pub Dt:	02/01/2007
Title:	ETCH COMPOSITIONS AND METHODS OF PROCESSING A SUBSTRATE

Patent #:	7763327	Issue Dt:	07/27/2010	Application #:	11192326	Filing Dt:	07/27/2005
Publication #:	US20060029736	Pub Dt:	02/09/2006
Title:	METHODS USING OZONE FOR CVD DEPOSITED FILMS

Patent #:	7282762	Issue Dt:	10/16/2007	Application #:	11192472	Filing Dt:	07/29/2005
Publication #:	US20050265063	Pub Dt:	12/01/2005
Title:	4F2 EEPROM NROM MEMORY ARRAYS WITH VERTICAL DEVICES

Patent #:	7184352	Issue Dt:	02/27/2007	Application #:	11192971	Filing Dt:	07/28/2005
Publication #:	US20060044913	Pub Dt:	03/02/2006
Title:	MEMORY SYSTEM AND METHOD USING ECC TO ACHIEVE LOW POWER REFRESH

Patent #:	7282972	Issue Dt:	10/16/2007	Application #:	11193257	Filing Dt:	07/29/2005
Publication #:	US20070024331	Pub Dt:	02/01/2007
Title:	BIAS GENERATOR WITH FEEDBACK CONTROL

Patent #:	7437647	Issue Dt:	10/14/2008	Application #:	11193258	Filing Dt:	07/29/2005
Publication #:	US20060002209	Pub Dt:	01/05/2006
Title:	MODE ENTRY CIRCUIT AND METHOD

Patent #:	7075330	Issue Dt:	07/11/2006	Application #:	11193260	Filing Dt:	07/29/2005
Publication #:	US20050280444	Pub Dt:	12/22/2005
Title:	SYSTEM AND METHOD FOR BALANCING CAPACITIVELY COUPLED SIGNAL LINES

Patent #:	7432540	Issue Dt:	10/07/2008	Application #:	11193322	Filing Dt:	08/01/2005
Publication #:	US20070023798	Pub Dt:	02/01/2007
Title:	DUAL CONVERSION GAIN GATE AND CAPACITOR COMBINATION

Patent #:	7274034	Issue Dt:	09/25/2007	Application #:	11193425	Filing Dt:	08/01/2005
Publication #:	US20070023744	Pub Dt:	02/01/2007
Title:	RESISTANCE VARIABLE MEMORY DEVICE WITH SPUTTERED METAL-CHALCOGENIDE REGION AND METHOD OF FABRICATION

Patent #:	7184348	Issue Dt:	02/27/2007	Application #:	11194739	Filing Dt:	08/01/2005
Publication #:	US20060023531	Pub Dt:	02/02/2006
Title:	SENSING CIRCUIT FOR A SEMICONDUCTOR MEMORY

Patent #:	7328381	Issue Dt:	02/05/2008	Application #:	11195035	Filing Dt:	08/01/2005
Publication #:	US20070038907	Pub Dt:	02/15/2007
Title:	TESTING SYSTEM AND METHOD FOR MEMORY MODULES HAVING A MEMORY HUB ARCHITECTURE

Patent #:	7372310	Issue Dt:	05/13/2008	Application #:	11195154	Filing Dt:	08/01/2005
Publication #:	US20050285643	Pub Dt:	12/29/2005
Title:	DIGITAL FREQUENCY-MULTIPLYING DLLS

Patent #:	7449410	Issue Dt:	11/11/2008	Application #:	11195174	Filing Dt:	08/02/2005
Publication #:	US20070032071	Pub Dt:	02/08/2007
Title:	METHODS OF FORMING COSI2, METHODS OF FORMING FIELD EFFECT TRANSISTORS, AND METHODS OF FORMING CONDUCTIVE CONTACTS

Patent #:	7269080	Issue Dt:	09/11/2007	Application #:	11195359	Filing Dt:	08/02/2005
Publication #:	US20060056265	Pub Dt:	03/16/2006
Title:	NONVOLATILE PHASE CHANGE MEMORY DEVICE AND BIASING METHOD THEREFOR

Patent #:	7149158	Issue Dt:	12/12/2006	Application #:	11195420	Filing Dt:	08/01/2005
Publication #:	US20050265186	Pub Dt:	12/01/2005
Title:	APPARATUS AND METHOD FOR PROVIDING UNINTERRUPTED CONTINUOUS PLAY DURING A CHANGE OF SIDES OF A DUAL-SIDED OPTICAL DISK

Patent #:	7687841	Issue Dt:	03/30/2010	Application #:	11195433	Filing Dt:	08/02/2005
Publication #:	US20070029612	Pub Dt:	02/08/2007
Title:	SCALABLE HIGH PERFORMANCE CARBON NANOTUBE FIELD EFFECT TRANSISTOR

Patent #:	7319340	Issue Dt:	01/15/2008	Application #:	11195514	Filing Dt:	08/01/2005
Publication #:	US20070024306	Pub Dt:	02/01/2007
Title:	INTEGRATED CIRCUIT LOAD BOARD AND METHOD HAVING ON-BOARD TEST CIRCUIT

Patent #:	7518212	Issue Dt:	04/14/2009	Application #:	11195642	Filing Dt:	08/03/2005
Publication #:	US20050266635	Pub Dt:	12/01/2005
Title:	GRADED GEXSE100-X CONCENTRATION IN PCRAM

Patent #:	7969488	Issue Dt:	06/28/2011	Application #:	11195688	Filing Dt:	08/03/2005
Publication #:	US20070030365	Pub Dt:	02/08/2007
Title:	CORRECTION OF CLUSTER DEFECTS IN IMAGERS

Patent #:	7496235	Issue Dt:	02/24/2009	Application #:	11195689	Filing Dt:	08/03/2005
Publication #:	US20070031044	Pub Dt:	02/08/2007
Title:	SCAN LINE TO BLOCK RE-ORDERING BUFFER FOR IMAGE COMPRESSION

Patent #:	7251173	Issue Dt:	07/31/2007	Application #:	11195878	Filing Dt:	08/02/2005
Publication #:	US20070030742	Pub Dt:	02/08/2007
Title:	COMBINATION COLUMN REDUNDANCY SYSTEM FOR A MEMORY ARRAY

Patent #:	7560956	Issue Dt:	07/14/2009	Application #:	11195897	Filing Dt:	08/03/2005
Publication #:	US20070030030	Pub Dt:	02/08/2007
Title:	METHOD AND APPARATUS FOR SELECTING AN OPERATING MODE BASED ON A DETERMINATION OF THE AVAILABILITY OF INTERNAL CLOCK SIGNALS

Patent #:	7245538	Issue Dt:	07/17/2007	Application #:	11195904	Filing Dt:	08/03/2005
Publication #:	US20050265111	Pub Dt:	12/01/2005
Title:	HIGH VOLTAGE GENERATION AND REGULATION CIRCUIT IN A MEMORY DEVICE

Patent #:	7462534	Issue Dt:	12/09/2008	Application #:	11196051	Filing Dt:	08/02/2005
Publication #:	US20070032011	Pub Dt:	02/08/2007
Title:	METHODS OF FORMING MEMORY CIRCUITRY

Patent #:	7230479	Issue Dt:	06/12/2007	Application #:	11196117	Filing Dt:	08/03/2005
Publication #:	US20070030059	Pub Dt:	02/08/2007
Title:	TECHNIQUE TO IMPROVE THE GAIN AND SIGNAL TO NOISE RATIO IN CMOS SWITCHED CAPACITOR AMPLIFIERS

Patent #:	7259604	Issue Dt:	08/21/2007	Application #:	11196581	Filing Dt:	08/03/2005
Publication #:	US20070030754	Pub Dt:	02/08/2007
Title:	INITIALIZATION SCHEME FOR A REDUCED-FREQUENCY, FIFTY PERCENT DUTY CYCLE CORRECTOR

Patent #:	7271057	Issue Dt:	09/18/2007	Application #:	11196583	Filing Dt:	08/02/2005
Publication #:	US20060043431	Pub Dt:	03/02/2006
Title:	MEMORY ARRAY WITH OVERLAPPING BURIED DIGIT LINE AND ACTIVE AREA AND METHOD FOR FORMING SAME

Patent #:	7190074	Issue Dt:	03/13/2007	Application #:	11196584	Filing Dt:	08/02/2005
Publication #:	US20050275116	Pub Dt:	12/15/2005
Title:	RECONSTRUCTED SEMICONDUCTOR WAFERS INCLUDING ALIGNMENT DROPLETS CONTACTING ALIGNMENT VIAS

Patent #:	7199005	Issue Dt:	04/03/2007	Application #:	11196593	Filing Dt:	08/02/2005
Publication #:	US20070032014	Pub Dt:	02/08/2007
Title:	METHODS OF FORMING PLURALITIES OF CAPACITORS

Patent #:	7573006	Issue Dt:	08/11/2009	Application #:	11196757	Filing Dt:	08/02/2005
Publication #:	US20050263517	Pub Dt:	12/01/2005
Title:	APPARATUS RELATING TO THE RECONSTRUCTION OF SEMICONDUCTOR WAFERS FOR WAFER-LEVEL PROCESSING

Patent #:	7154800	Issue Dt:	12/26/2006	Application #:	11196913	Filing Dt:	08/04/2005
Publication #:	US20050270879	Pub Dt:	12/08/2005
Title:	NO-PRECHARGE FAMOS CELL AND LATCH CIRCUIT IN A MEMORY DEVICE

Patent #:	7256643	Issue Dt:	08/14/2007	Application #:	11196978	Filing Dt:	08/04/2005
Publication #:	US20070030053	Pub Dt:	02/08/2007
Title:	DEVICE AND METHOD FOR GENERATING A LOW-VOLTAGE REFERENCE

Patent #:	7575978	Issue Dt:	08/18/2009	Application #:	11197184	Filing Dt:	08/04/2005
Publication #:	US20070092989	Pub Dt:	04/26/2007
Title:	METHOD FOR MAKING CONDUCTIVE NANOPARTICLE CHARGE STORAGE ELEMENT

Patent #:	7212447	Issue Dt:	05/01/2007	Application #:	11197641	Filing Dt:	08/04/2005
Publication #:	US20070030737	Pub Dt:	02/08/2007
Title:	NAND FLASH MEMORY CELL PROGRAMMING

Patent #:	7473615	Issue Dt:	01/06/2009	Application #:	11197882	Filing Dt:	08/05/2005
Publication #:	US20070029635	Pub Dt:	02/08/2007
Title:	SEMICONDUCTOR PROCESSING METHODS

Patent #:	7236399	Issue Dt:	06/26/2007	Application #:	11198196	Filing Dt:	08/05/2005
Publication #:	US20050270835	Pub Dt:	12/08/2005
Title:	METHOD FOR ERASE-VERIFYING A NON-VOLATILE MEMORY CAPABLE OF IDENTIFYING OVER-ERASED AND UNDER-ERASED MEMORY CELLS

Patent #:	7123513	Issue Dt:	10/17/2006	Application #:	11198197	Filing Dt:	08/05/2005
Publication #:	US20050270836	Pub Dt:	12/08/2005
Title:	Erase verify for nonvolatile memory using a reference current-to-voltage converter with a first and second resistor connected in series with an activation circuit

Patent #:	7123516	Issue Dt:	10/17/2006	Application #:	11198199	Filing Dt:	08/05/2005
Publication #:	US20050270837	Pub Dt:	12/08/2005
Title:	Erase verify for nonvolatile memory using bitline/reference current-to-voltage converters

Patent #:	7167396	Issue Dt:	01/23/2007	Application #:	11198200	Filing Dt:	08/05/2005
Publication #:	US20050270838	Pub Dt:	12/08/2005
Title:	ERASE VERIFY FOR NONVOLATILE MEMORY USING REFERENCE CURRENT-TO-VOLTAGE CONVERTERS

Patent #:	7915735	Issue Dt:	03/29/2011	Application #:	11198208	Filing Dt:	08/05/2005
Publication #:	US20070032069	Pub Dt:	02/08/2007
Title:	SELECTIVE METAL DEPOSITION OVER DIELECTRIC LAYERS

Patent #:	7230855	Issue Dt:	06/12/2007	Application #:	11198212	Filing Dt:	08/05/2005
Publication #:	US20050270839	Pub Dt:	12/08/2005
Title:	ERASE VERIFY FOR NON-VOLATILE MEMORY USING BITLINE/REFERENCE CURRENT-TO-VOLTAGE CONVERTERS

Patent #:	7236400	Issue Dt:	06/26/2007	Application #:	11198256	Filing Dt:	08/05/2005
Publication #:	US20050270860	Pub Dt:	12/08/2005
Title:	ERASE VERIFY FOR NON-VOLATILE MEMORY USING A BITLINE CURRENT-TO-VOLTAGE CONVERTER

Patent #:	7585707	Issue Dt:	09/08/2009	Application #:	11198292	Filing Dt:	08/08/2005
Publication #:	US20060033132	Pub Dt:	02/16/2006
Title:	LOW DARK CURRENT IMAGE SENSORS WITH EPITAXIAL SIC AND/OR CARBONATED CHANNELS FOR ARRAY TRANSISTORS

Patent #:	7429529	Issue Dt:	09/30/2008	Application #:	11198338	Filing Dt:	08/05/2005
Publication #:	US20070032061	Pub Dt:	02/08/2007
Title:	METHODS OF FORMING THROUGH-WAFER INTERCONNECTS AND STRUCTURES RESULTING THEREFROM

Patent #:	7163845	Issue Dt:	01/16/2007	Application #:	11198580	Filing Dt:	08/05/2005
Publication #:	US20050269675	Pub Dt:	12/08/2005
Title:	INTERNAL PACKAGE HEAT DISSIPATOR

Patent #:	7579615	Issue Dt:	08/25/2009	Application #:	11199251	Filing Dt:	08/09/2005
Publication #:	US20070034921	Pub Dt:	02/15/2007
Title:	ACCESS TRANSISTOR FOR MEMORY DEVICE

Patent #:	7317220	Issue Dt:	01/08/2008	Application #:	11199471	Filing Dt:	08/08/2005
Publication #:	US20050269649	Pub Dt:	12/08/2005
Title:	EVEN NUCLEATION BETWEEN SILICON AND OXIDE SURFACES FOR THIN SILICON NITRIDE FILM GROWTH

Patent #:	7454558	Issue Dt:	11/18/2008	Application #:	11199481	Filing Dt:	08/08/2005
Publication #:	US20050273551	Pub Dt:	12/08/2005
Title:	NON-VOLATILE MEMORY WITH ERASE BLOCK STATE INDICATION IN DATA SECTION

Patent #:	7245010	Issue Dt:	07/17/2007	Application #:	11199634	Filing Dt:	08/09/2005
Publication #:	US20050275044	Pub Dt:	12/15/2005
Title:	SYSTEM AND DEVICE INCLUDING A BARRIER ALAYER

Patent #:	7256451	Issue Dt:	08/14/2007	Application #:	11199827	Filing Dt:	08/09/2005
Publication #:	US20050280045	Pub Dt:	12/22/2005
Title:	NROM MEMORY DEVICE WITH A HIGH-PERMITTIVITY GATE DIELECTRIC FORMED BY THE LOW TEMPERATURE OXIDATION OF METALS

Patent #:	7256452	Issue Dt:	08/14/2007	Application #:	11199986	Filing Dt:	08/09/2005
Publication #:	US20050285185	Pub Dt:	12/29/2005
Title:	NROM MEMORY DEVICE WITH A HIGH-PERMITTIVITY GATE DIELECTRIC FORMED BY THE LOW TEMPERATURE OXIDATION OF METALS

Patent #:	7329615	Issue Dt:	02/12/2008	Application #:	11200275	Filing Dt:	08/09/2005
Publication #:	US20060029737	Pub Dt:	02/09/2006
Title:	ATOMIC LAYER DEPOSITION METHOD OF FORMING AN OXIDE COMPRISING LAYER ON A SUBSTRATE

Patent #:	7387940	Issue Dt:	06/17/2008	Application #:	11200286	Filing Dt:	08/09/2005
Publication #:	US20060046426	Pub Dt:	03/02/2006
Title:	METHODS OF FORMING TRENCH ISOLATION IN THE FABRICATION OF INTEGRATED CIRCUITRY, METHODS OF FABRICATING MEMORY CIRCUITRY, INTEGRATED CIRCUITRY AND MEMORY INTEGRATED CIRCUITRY

Patent #:	7265414	Issue Dt:	09/04/2007	Application #:	11200427	Filing Dt:	08/09/2005
Publication #:	US20050269652	Pub Dt:	12/08/2005
Title:	NROM MEMORY DEVICE WITH A HIGH-PERMITTIVITY GATE DIELECTRIC FORMED BY THE LOW TEMPERATURE OXIDATION OF METALS

Patent #:	7660708	Issue Dt:	02/09/2010	Application #:	11200449	Filing Dt:	08/09/2005
Publication #:	US20070038428	Pub Dt:	02/15/2007
Title:	S-MATRIX TECHNIQUE FOR CIRCUIT SIMULATION

Patent #:	7205245	Issue Dt:	04/17/2007	Application #:	11200632	Filing Dt:	08/10/2005
Publication #:	US20060009004	Pub Dt:	01/12/2006
Title:	METHOD OF FORMING TRENCH ISOLATION WITHIN A SEMICONDUCTOR SUBSTRATE

Patent #:	7488664	Issue Dt:	02/10/2009	Application #:	11200667	Filing Dt:	08/10/2005
Publication #:	US20070034928	Pub Dt:	02/15/2007
Title:	CAPACITOR STRUCTURE FOR TWO-TRANSISTOR DRAM MEMORY CELL AND METHOD OF FORMING SAME

Patent #:	7279377	Issue Dt:	10/09/2007	Application #:	11200694	Filing Dt:	08/10/2005
Publication #:	US20070037341	Pub Dt:	02/15/2007
Title:	METHOD AND STRUCTURE FOR SHALLOW TRENCH ISOLATION DURING INTEGRATED CIRCUIT DEVICE MANUFACTURE

Patent #:	7123525	Issue Dt:	10/17/2006	Application #:	11200735	Filing Dt:	08/10/2005
Publication #:	US20050270893	Pub Dt:	12/08/2005
Title:	PHASE DETECTOR FOR ALL-DIGITAL PHASE LOCKED AND DELAY LOCKED LOOPS

Patent #:	7173874	Issue Dt:	02/06/2007	Application #:	11200942	Filing Dt:	08/09/2005
Publication #:	US20060023525	Pub Dt:	02/02/2006
Title:	COMPACT DECODE AND MULTIPLEXING CIRCUITRY FOR A MULTI-PORT MEMORY HAVING A COMMON MEMORY INTERFACE

Patent #:	7075850	Issue Dt:	07/11/2006	Application #:	11200946	Filing Dt:	08/09/2005
Publication #:	US20050265106	Pub Dt:	12/01/2005
Title:	COMPACT DECODE AND MULTIPLEXING CIRCUITRY FOR A MULTI-PORT MEMORY HAVING A COMMON MEMORY INTERFACE

Patent #:	7235468	Issue Dt:	06/26/2007	Application #:	11201038	Filing Dt:	08/10/2005
Title:	FINFET DEVICE WITH REDUCED DIBL

Patent #:	7304368	Issue Dt:	12/04/2007	Application #:	11201338	Filing Dt:	08/11/2005
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Title:	CHALCOGENIDE-BASED ELECTROKINETIC MEMORY ELEMENT AND METHOD OF FORMING THE SAME

Patent #:	7280399	Issue Dt:	10/09/2007	Application #:	11201483	Filing Dt:	08/11/2005
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Title:	SEMICONDUCTOR DEVICE

Patent #:	7441090	Issue Dt:	10/21/2008	Application #:	11201612	Filing Dt:	08/10/2005
Publication #:	US20060020747	Pub Dt:	01/26/2006
Title:	SYSTEM AND METHOD FOR UPDATING DATA SECTORS IN A NON-VOLATILE MEMORY USING LOGICAL BLOCK ADDRESSING

Patent #:	7476556	Issue Dt:	01/13/2009	Application #:	11201668	Filing Dt:	08/11/2005
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Title:	SYSTEMS AND METHODS FOR PLASMA PROCESSING OF MICROFEATURE WORKPIECES

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Title:	SEMICONDUCTOR STRUCTURES AND MEMORY DEVICE CONSTRUCTIONS

Patent #:	7268031	Issue Dt:	09/11/2007	Application #:	11201908	Filing Dt:	08/11/2005
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Title:	MEMORY DEVICE WITH HIGH DIELECTRIC CONSTANT GATE DIELECTRICS AND METAL FLOATING GATES

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Title:	DISCRETE TRAP NON-VOLATILE MULTI-FUNCTIONAL MEMORY DEVICE

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Title:	SERVICE PROGRAMMABLE LOGIC ARRAYS WITH LOW TUNNEL BARRIER INTERPOLY INSULATORS

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Title:	REPRODUCIBLE RESISTANCE VARIABLE INSULATING MEMORY DEVICES HAVING A SHAPED BOTTOM ELECTRODE

100

Patent #:	7251154	Issue Dt:	07/31/2007	Application #:	11203142	Filing Dt:	08/15/2005
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Title:	METHOD AND APPARATUS PROVIDING A CROSS-POINT MEMORY ARRAY USING A VARIABLE RESISTANCE MEMORY CELL AND CAPACITANCE

Assignor

U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT

Exec Dt:

06/29/2018

Assignee

MICRON TECHNOLOGY, INC.

8000 S. FEDERAL WAY

BOISE, IDAHO 83707

Correspondence name and address
	WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
	ONE MARKET, SPEAR TOWER, SUITE 3300
	SAN FRANCISCO, CA 94105

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