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Reel/Frame:047422/0464   Pages: 54
Recorded: 10/05/2018
Attorney Dkt #:106861-9999
Conveyance: MERGER (SEE DOCUMENT FOR DETAILS).
Total properties: 1964
Page 1 of 20
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
1
Patent #:
Issue Dt:
09/21/2004
Application #:
09065115
Filing Dt:
04/23/1998
Title:
SYSTEM AND METHOD FOR SCHEDULING MESSAGE TRANSMISSION AND PROCESSING IN A DIGITAL DATA NETWORK
2
Patent #:
Issue Dt:
05/27/2003
Application #:
09065118
Filing Dt:
04/23/1998
Title:
SYSTEM AND METHOD FOR REGULATING MESSAGE FLOW IN A DIGITAL DATA NETWORK
3
Patent #:
Issue Dt:
11/23/1999
Application #:
09067533
Filing Dt:
04/27/1998
Title:
SYSTEM FOR TRANSFERING INFORMATION BETWEEN DEVICES OVER VIRTUAL CIRCUIT ESTABLISHED THEREBETWEEN USING COMPUTER NETWORK A COMPUTER NETWORK
4
Patent #:
Issue Dt:
05/06/2003
Application #:
09071275
Filing Dt:
05/01/1998
Title:
METHOD AND APPARATUS FOR CONTROL OF SOFT HANDOFF USAGE IN RADIOCOMMUNICATION SYSTEMS
5
Patent #:
Issue Dt:
08/01/2000
Application #:
09071276
Filing Dt:
05/01/1998
Title:
METHOD OF MAPPING FIBRE CHANNEL FRAMES BASED ON CONTROL AND TYPE HEADER FIELDS
6
Patent #:
Issue Dt:
08/08/2000
Application #:
09071288
Filing Dt:
05/01/1998
Title:
AUTOMATIC LOOP SEGMENT FAILURE ISOLATION
7
Patent #:
Issue Dt:
12/26/2000
Application #:
09071431
Filing Dt:
05/01/1998
Title:
PROGRAMMABLE ERROR CONTROL CIRCUIT
8
Patent #:
Issue Dt:
08/28/2001
Application #:
09071508
Filing Dt:
05/01/1998
Title:
SCALABLE HUB
9
Patent #:
Issue Dt:
05/16/2000
Application #:
09071632
Filing Dt:
05/01/1998
Title:
HUB PORT WITHOUT JITTER TRANSFER
10
Patent #:
Issue Dt:
02/13/2001
Application #:
09071678
Filing Dt:
05/01/1998
Title:
AUTOMATIC ISOLATION IN LOOPS
11
Patent #:
Issue Dt:
05/01/2001
Application #:
09071930
Filing Dt:
05/01/1998
Title:
ELIMINATION OF INVALID DATA IN LOOP NETWORK
12
Patent #:
Issue Dt:
12/05/2000
Application #:
09071932
Filing Dt:
05/01/1998
Title:
HUB PORT WITH CONSTANT PHASE
13
Patent #:
Issue Dt:
03/06/2001
Application #:
09161158
Filing Dt:
09/25/1998
Title:
METHOD AND SYSTEM FOR PROGRAMMING FIRMWARE OVER A COMPUTER NETWORK
14
Patent #:
Issue Dt:
04/10/2001
Application #:
09177550
Filing Dt:
10/22/1998
Title:
NODE INSERTION AND REMOVAL IN A LOOP NETWORK
15
Patent #:
Issue Dt:
12/05/2000
Application #:
09204669
Filing Dt:
12/02/1998
Title:
AUTOMATIC DETECTION OF 8B/10B DATA RATES
16
Patent #:
Issue Dt:
05/01/2001
Application #:
09234231
Filing Dt:
01/20/1999
Title:
SANITIZING FIBRE CHANNEL FRAMES
17
Patent #:
Issue Dt:
09/14/2004
Application #:
09347709
Filing Dt:
07/03/1999
Title:
DISTRIBUTED SWITCH AND CONNECTION CONTROL ARRAGEMENT AND METHOD FOR DIGITAL COMMUNICATIONS NETWORK
18
Patent #:
Issue Dt:
10/01/2002
Application #:
09370096
Filing Dt:
08/06/1999
Title:
VARIABLE ACCESS FAIRNESS IN A FIBRE CHANNEL ARBITRATED LOOP
19
Patent #:
Issue Dt:
03/13/2001
Application #:
09398520
Filing Dt:
09/15/1999
Title:
AUTOMATIC LOOP SEGMENT FAILURE ISOLATION
20
Patent #:
Issue Dt:
09/11/2001
Application #:
09398523
Filing Dt:
09/15/1999
Title:
AUTOMATIC ISOLATION IN LOOPS
21
Patent #:
Issue Dt:
05/03/2005
Application #:
09436620
Filing Dt:
11/09/1999
Title:
HIGH PERFORMANCE DIGITAL LOOP DIAGNOSTIC TECHNOLOGY
22
Patent #:
Issue Dt:
02/03/2004
Application #:
09640564
Filing Dt:
08/16/2000
Title:
DETECTING AND COUNTING NODE PORT LOOP INITIALIZATION ORIGINATION
23
Patent #:
Issue Dt:
11/19/2002
Application #:
09687259
Filing Dt:
10/12/2000
Title:
DETECTING AND COUNTING OPEN ORDERED SETS ORIGINATING FROM AN ATTACHED NODE PORT
24
Patent #:
Issue Dt:
06/07/2005
Application #:
09687526
Filing Dt:
10/12/2000
Title:
METHOD FOR DETERMINING VALID BYTES FOR MULTIPLE-BYTE BURST MEMORIES
25
Patent #:
Issue Dt:
12/17/2002
Application #:
09730149
Filing Dt:
12/04/2000
Publication #:
Pub Dt:
06/06/2002
Title:
OLD-PORT NODE DETECTION AND HUB PORT BYPASS
26
Patent #:
Issue Dt:
07/29/2003
Application #:
09774428
Filing Dt:
01/30/2001
Publication #:
Pub Dt:
06/07/2001
Title:
SANITIZING FIBRE CHANNEL FRAMES
27
Patent #:
Issue Dt:
03/28/2006
Application #:
09934977
Filing Dt:
08/21/2001
Publication #:
Pub Dt:
04/18/2002
Title:
PROTOCOL STACK FOR LINKING STORAGE AREA NETWORKS OVER AN EXISTING LAN, MAN, OR WAN
28
Patent #:
Issue Dt:
03/28/2006
Application #:
09944716
Filing Dt:
08/31/2001
Publication #:
Pub Dt:
03/06/2003
Title:
METHOD AND SYSTEM FOR VERIFYING THE HARDWARE IMPLEMENTATION OF TCP/IP
29
Patent #:
Issue Dt:
05/30/2017
Application #:
09969212
Filing Dt:
10/02/2001
Publication #:
Pub Dt:
08/08/2002
Title:
Single chip set-top box system
30
Patent #:
Issue Dt:
03/23/2004
Application #:
10000848
Filing Dt:
11/30/2001
Publication #:
Pub Dt:
01/30/2003
Title:
DATA FORMATTER FOR SHIFTING DATA TO CORRECT DATA LANES
31
Patent #:
Issue Dt:
03/25/2008
Application #:
10057626
Filing Dt:
01/24/2002
Publication #:
Pub Dt:
07/31/2003
Title:
SYSTEM FOR COMMUNICATION WITH A STORAGE AREA NETWORK
32
Patent #:
Issue Dt:
11/01/2005
Application #:
10113147
Filing Dt:
03/28/2002
Title:
SEPARABLE CYCLIC REDUNDANCY CHECK
33
Patent #:
Issue Dt:
07/18/2006
Application #:
10120733
Filing Dt:
04/10/2002
Publication #:
Pub Dt:
06/12/2003
Title:
RECEIVING DATA FROM INTERLEAVED MULTIPLE CONCURRENT TRANSACTIONS IN A FIFO MEMORY HAVING PROGRAMMABLE BUFFER ZONES
34
Patent #:
Issue Dt:
05/23/2006
Application #:
10125101
Filing Dt:
04/17/2002
Publication #:
Pub Dt:
06/12/2003
Title:
TRACKING DEFERRED DATA TRANSFERS ON A SYSTEM-INTERCONNECT BUS
35
Patent #:
Issue Dt:
11/11/2003
Application #:
10161922
Filing Dt:
06/03/2002
Publication #:
Pub Dt:
06/12/2003
Title:
PHASE-LOCKED LOOP (PLL) CIRCUIT FOR SELECTIVELY CORRECTING CLOCK SKEW IN DIFFERENT MODES
36
Patent #:
Issue Dt:
01/02/2007
Application #:
10179816
Filing Dt:
06/24/2002
Publication #:
Pub Dt:
06/12/2003
Title:
DIRECT MEMORY ACCESS (DMA) TRANSFER BUFFER PROCESSOR
37
Patent #:
Issue Dt:
07/06/2004
Application #:
10232819
Filing Dt:
08/30/2002
Publication #:
Pub Dt:
06/19/2003
Title:
APPARATUS AND METHODS FOR TRANSMITTING DATA AT HIGH SPEED USING TCP/IP
38
Patent #:
Issue Dt:
08/22/2006
Application #:
10232821
Filing Dt:
08/30/2002
Publication #:
Pub Dt:
06/19/2003
Title:
APPARATUS AND METHODS FOR RECEIVING DATA AT HIGH SPEED USING TCP/IP
39
Patent #:
Issue Dt:
12/27/2005
Application #:
10233302
Filing Dt:
08/30/2002
Publication #:
Pub Dt:
06/12/2003
Title:
SYSTEMS AND METHODS FOR HIGH SPEED DATA TRANSMISSION USING TCP/IP
40
Patent #:
Issue Dt:
01/09/2007
Application #:
10233303
Filing Dt:
08/30/2002
Publication #:
Pub Dt:
03/27/2003
Title:
SYSTEMS AND METHODS FOR IMPLEMENTING HOST-BASED SECURITY IN A COMPUTER NETWORK
41
Patent #:
Issue Dt:
11/06/2007
Application #:
10233304
Filing Dt:
08/30/2002
Publication #:
Pub Dt:
06/12/2003
Title:
METHODS AND APPARATUS FOR PARTIALLY REORDERING DATA PACKETS
42
Patent #:
Issue Dt:
02/06/2007
Application #:
10245436
Filing Dt:
09/16/2002
Publication #:
Pub Dt:
03/18/2004
Title:
RE-PROGRAMMABLE FINITE STATE MACHINE
43
Patent #:
Issue Dt:
08/31/2004
Application #:
10245437
Filing Dt:
09/16/2002
Publication #:
Pub Dt:
03/18/2004
Title:
METHOD AND APPARATUS FOR IMPROVING NOISE IMMUNITY IN A DDR SDRAM SYSTEM
44
Patent #:
Issue Dt:
05/31/2005
Application #:
10264580
Filing Dt:
10/04/2002
Title:
LINE RATE BUFFER USING SINGLE PORTED MEMORIES FOR VARIABLE LENGTH PACKETS
45
Patent #:
Issue Dt:
03/23/2010
Application #:
10268178
Filing Dt:
10/10/2002
Publication #:
Pub Dt:
04/15/2004
Title:
STRUCTURE AND METHOD FOR MAINTAINING ORDERED LINKED LISTS
46
Patent #:
Issue Dt:
12/11/2007
Application #:
10278189
Filing Dt:
10/21/2002
Publication #:
Pub Dt:
04/22/2004
Title:
SYSTEM WITH MULTIPLE PATH FAIL OVER, FAIL BACK AND LOAD BALANCING
47
Patent #:
Issue Dt:
07/03/2012
Application #:
10280503
Filing Dt:
10/24/2002
Publication #:
Pub Dt:
04/29/2004
Title:
NETWORK CONFIGURATION SYNCHRONIZATION FOR HARDWARE ACCELERATED NETWORK PROTOCOL
48
Patent #:
Issue Dt:
11/23/2004
Application #:
10288616
Filing Dt:
11/04/2002
Publication #:
Pub Dt:
05/06/2004
Title:
MESSAGE LOGGING
49
Patent #:
Issue Dt:
08/30/2016
Application #:
10300234
Filing Dt:
11/20/2002
Publication #:
Pub Dt:
04/22/2004
Title:
A/V system and method supporting a pull data flow scheme
50
Patent #:
Issue Dt:
12/07/2004
Application #:
10316604
Filing Dt:
12/10/2002
Publication #:
Pub Dt:
07/03/2003
Title:
SUPERCHARGE MESSAGE EXCHANGER
51
Patent #:
Issue Dt:
03/29/2005
Application #:
10324310
Filing Dt:
12/19/2002
Publication #:
Pub Dt:
06/24/2004
Title:
DIRECT MEMORY ACCESS CONTROLLER SYSTEM WITH MESSAGE-BASED PROGRAMMING
52
Patent #:
Issue Dt:
09/05/2006
Application #:
10338629
Filing Dt:
01/08/2003
Publication #:
Pub Dt:
07/08/2004
Title:
FLOW-THROUGH REGISTER
53
Patent #:
Issue Dt:
08/16/2005
Application #:
10340078
Filing Dt:
01/09/2003
Publication #:
Pub Dt:
07/15/2004
Title:
SHARED MEMORY MANAGEMENT UTILIZING A FREE LIST OF BUFFER INDICES
54
Patent #:
Issue Dt:
11/15/2016
Application #:
10349705
Filing Dt:
01/22/2003
Publication #:
Pub Dt:
07/24/2003
Title:
SYSTEM AND METHOD OF TRANSMISSION AND RECEPTION OF VIDEO USING COMPRESSED DIFFERENTIAL TIME STAMPS
55
Patent #:
Issue Dt:
06/14/2005
Application #:
10376354
Filing Dt:
02/26/2003
Publication #:
Pub Dt:
08/26/2004
Title:
STRUCTURE AND METHOD FOR MANAGING AVAILABLE MEMORY RESOURCES
56
Patent #:
Issue Dt:
06/07/2005
Application #:
10376659
Filing Dt:
02/28/2003
Publication #:
Pub Dt:
08/07/2003
Title:
SANITIZING FIBRE CHANNEL FRAMES
57
Patent #:
Issue Dt:
07/24/2007
Application #:
10377496
Filing Dt:
02/28/2003
Publication #:
Pub Dt:
04/29/2004
Title:
ABSTRACTED NODE DISCOVERY
58
Patent #:
Issue Dt:
06/05/2007
Application #:
10379776
Filing Dt:
03/03/2003
Publication #:
Pub Dt:
08/21/2003
Title:
PHASE-LOCKED LOOP (PLL) CIRCUIT FOR SELECTIVELY CORRECTING CLOCK SKEW IN DIFFERENT MODES
59
Patent #:
Issue Dt:
04/27/2004
Application #:
10382728
Filing Dt:
03/04/2003
Title:
METHOD OF QUEUING FIBRE CHANNEL RECEIVE FRAMES
60
Patent #:
Issue Dt:
10/16/2007
Application #:
10386642
Filing Dt:
03/11/2003
Publication #:
Pub Dt:
09/18/2003
Title:
SYSTEM AND METHOD FOR REGULATING MESSAGE FLOW IN A DIGITAL DATA NETWORK
61
Patent #:
Issue Dt:
03/14/2006
Application #:
10396985
Filing Dt:
03/24/2003
Publication #:
Pub Dt:
09/30/2004
Title:
DIRECT DATA PLACEMENT
62
Patent #:
Issue Dt:
04/12/2005
Application #:
10401459
Filing Dt:
03/28/2003
Publication #:
Pub Dt:
09/30/2004
Title:
LOCAL EMULATION OF DATA RAM UTILIZING WRITE-THROUGH CACHE HARDWARE WITHIN A CPU MODULE
63
Patent #:
Issue Dt:
06/28/2005
Application #:
10402182
Filing Dt:
03/28/2003
Publication #:
Pub Dt:
09/30/2004
Title:
HARDWARE ASSISTED FIRMWARE TASK SCHEDULING AND MANAGEMENT
64
Patent #:
Issue Dt:
09/12/2006
Application #:
10407031
Filing Dt:
04/03/2003
Publication #:
Pub Dt:
10/07/2004
Title:
VIRTUAL PERIPHERAL COMPONENT INTERCONNECT MULTIPLE-FUNCTION DEVICE
65
Patent #:
Issue Dt:
03/02/2010
Application #:
10421495
Filing Dt:
04/22/2003
Title:
AVOIDING PORT COLLISIONS IN HARDWARE-ACCELERATED NETWORK PROTOCOL
66
Patent #:
Issue Dt:
04/11/2006
Application #:
10422581
Filing Dt:
04/23/2003
Title:
REVERSE MESSAGE WRITES AND READS
67
Patent #:
Issue Dt:
09/25/2007
Application #:
10431647
Filing Dt:
05/06/2003
Publication #:
Pub Dt:
03/25/2004
Title:
LOOP NETWORK HUB USING LOOP INITIALIZATION INSERTION
68
Patent #:
Issue Dt:
09/27/2005
Application #:
10434626
Filing Dt:
05/09/2003
Publication #:
Pub Dt:
11/11/2004
Title:
HOT SWAP COMPACT PCI POWER SUPPLY
69
Patent #:
Issue Dt:
08/16/2005
Application #:
10440681
Filing Dt:
05/19/2003
Publication #:
Pub Dt:
11/25/2004
Title:
DYNAMICALLY SELF-ADJUSTING POLLING MECHANISM
70
Patent #:
Issue Dt:
05/17/2005
Application #:
10440855
Filing Dt:
05/19/2003
Publication #:
Pub Dt:
11/25/2004
Title:
MEMORY DATA INTERFACE
71
Patent #:
Issue Dt:
06/06/2006
Application #:
10452330
Filing Dt:
06/02/2003
Publication #:
Pub Dt:
12/02/2004
Title:
METHOD AND APPARATUS FOR LOCAL AND DISTRIBUTED DATA MEMORY ACCESS ("DMA") CONTROL
72
Patent #:
Issue Dt:
04/26/2016
Application #:
10562618
Filing Dt:
05/15/2006
Publication #:
Pub Dt:
03/15/2007
Title:
Method and apparatus for communicating symbols in a multiple input multiple output communication system using interleaved subcarriers across a plurality of antennas
73
Patent #:
Issue Dt:
04/01/2008
Application #:
10602529
Filing Dt:
06/23/2003
Publication #:
Pub Dt:
07/15/2004
Title:
INTEGRATED-CIRCUIT IMPLEMENTATION OF A STORAGE-SHELF ROUTER AND A PATH CONTROLLER CARD FOR COMBINED USE IN HIGH-AVAILABILITY MASS-STORAGE-DEVICE SHELVES THAT MAY BE INCORPORATED WITHIN DISK ARRAYS
74
Patent #:
Issue Dt:
03/07/2006
Application #:
10609289
Filing Dt:
06/27/2003
Publication #:
Pub Dt:
12/30/2004
Title:
SPARSE AND NON-SPARSE DATA MANAGEMENT METHOD AND SYSTEM
75
Patent #:
Issue Dt:
10/24/2006
Application #:
10609291
Filing Dt:
06/27/2003
Publication #:
Pub Dt:
12/30/2004
Title:
READ/WRITE COMMAND BUFFER POOL RESOURCE MANAGEMENT USING READ-PATH PREDICTION OF FUTURE RESOURCES
76
Patent #:
Issue Dt:
02/16/2010
Application #:
10612753
Filing Dt:
07/01/2003
Publication #:
Pub Dt:
04/29/2004
Title:
METHODS AND APPARATUS FOR SWITCHING FIBRE CHANNEL ARBITRATED LOOP DEVICES
77
Patent #:
Issue Dt:
02/09/2010
Application #:
10616862
Filing Dt:
07/10/2003
Publication #:
Pub Dt:
05/06/2004
Title:
METHODS AND APPARATUS FOR DEVICE ACCESS FAIRNESS IN FIBRE CHANNEL ARBITRATED LOOP SYSTEMS
78
Patent #:
Issue Dt:
07/08/2008
Application #:
10616866
Filing Dt:
07/10/2003
Publication #:
Pub Dt:
05/06/2004
Title:
METHODS AND APPARATUS FOR DEVICE ZONING IN FIBRE CHANNEL ARBITRATED LOOP SYSTEMS
79
Patent #:
Issue Dt:
06/03/2008
Application #:
10617148
Filing Dt:
07/10/2003
Publication #:
Pub Dt:
04/29/2004
Title:
METHODS AND APPARATUS FOR SWITCHING FIBRE CHANNEL ARBITRATED LOOP SYSTEMS
80
Patent #:
Issue Dt:
12/08/2009
Application #:
10617149
Filing Dt:
07/10/2003
Publication #:
Pub Dt:
05/06/2004
Title:
METHODS AND APPARATUS FOR TRUNKING IN FIBRE CHANNEL ARBITRATED LOOP SYSTEMS
81
Patent #:
Issue Dt:
05/31/2011
Application #:
10651426
Filing Dt:
08/28/2003
Title:
VIRTUAL INTERFACE OVER A TRANSPORT PROTOCOL
82
Patent #:
Issue Dt:
12/12/2006
Application #:
10651887
Filing Dt:
08/29/2003
Publication #:
Pub Dt:
03/03/2005
Title:
SYSTEM AND METHOD FOR DIRECT MEMORY ACCESS FROM HOST WITHOUT PROCESSOR INTERVENTION WHEREIN AUTOMATIC ACCESS TO MEMORY DURING HOST START UP DOES NOT OCCUR
83
Patent #:
Issue Dt:
06/13/2006
Application #:
10651890
Filing Dt:
08/29/2003
Publication #:
Pub Dt:
03/03/2005
Title:
MULTI-CHANNEL MEMORY ACCESS ARBITRATION METHOD AND SYSTEM
84
Patent #:
Issue Dt:
08/15/2006
Application #:
10668138
Filing Dt:
09/22/2003
Publication #:
Pub Dt:
03/24/2005
Title:
GENERALIZED QUEUE AND SPECIALIZED REGISTER CONFIGURATION FOR COORDINATING COMMUNICATIONS BETWEEN TIGHTLY COUPLED PROCESSORS
85
Patent #:
Issue Dt:
01/23/2007
Application #:
10702065
Filing Dt:
11/04/2003
Publication #:
Pub Dt:
07/29/2004
Title:
INTEGRATED-CIRCUIT IMPLEMENTATION OF A STORAGE-SHELF ROUTER AND A PATH CONTROLLER CARD FOR COMBINED USE IN HIGH-AVAILABILITY MASS-STORAGE-DEVICE SHELVES THAT MAY BE INCORPORATED WITHIN DISK ARRAYS, AND A STORAGE-SHELF-INTERFACE TUNNELING METHOD AND SYSTEM
86
Patent #:
Issue Dt:
12/15/2009
Application #:
10702137
Filing Dt:
11/04/2003
Publication #:
Pub Dt:
07/29/2004
Title:
INTEGRATED-CIRCUIT IMPLEMENTATION OF A STORAGE-SHELF ROUTER AND A PATH CONTROLLER CARD FOR COMBINED USE IN HIGH-AVAILABILITY MASS-STORAGE-DEVICE SHELVES AND THAT SUPPORT VIRTUAL DISK FORMATTING
87
Patent #:
Issue Dt:
07/22/2008
Application #:
10769580
Filing Dt:
01/30/2004
Title:
METHODOLOGY AND APPARATUS FOR SOLVING LOCKUP CONDITIONS WHILE TRUNKING IN FIBRE CHANNEL SWITCHED ARBITRATED LOOP SYSTEMS
88
Patent #:
Issue Dt:
05/26/2009
Application #:
10778857
Filing Dt:
02/13/2004
Publication #:
Pub Dt:
07/07/2005
Title:
MULTICASTING IN A SHARED ADDRESS SPACE
89
Patent #:
Issue Dt:
11/16/2010
Application #:
10802532
Filing Dt:
03/16/2004
Publication #:
Pub Dt:
10/21/2004
Title:
SHARED INPUT/OUTPUT LOAD-STORE ARCHITECTURE
90
Patent #:
Issue Dt:
09/23/2008
Application #:
10816312
Filing Dt:
03/31/2004
Publication #:
Pub Dt:
10/06/2005
Title:
METHOD OF WRITING NON-VOLATILE MEMORY THAT AVOIDS CORRUPTING THE VITAL INITIALIZATION CODE
91
Patent #:
Issue Dt:
05/06/2008
Application #:
10817290
Filing Dt:
04/02/2004
Publication #:
Pub Dt:
10/27/2005
Title:
PREREQUISITE-BASED SCHEDULER
92
Patent #:
Issue Dt:
03/06/2007
Application #:
10827117
Filing Dt:
04/19/2004
Publication #:
Pub Dt:
12/23/2004
Title:
APPARATUS AND METHOD FOR SHARING I/O ENDPOINTS WITHIN A LOAD STORE FABRIC BY ENCAPSULATION OF DOMAIN INFORMATION IN TRANSACTION LAYER PACKETS
93
Patent #:
Issue Dt:
01/24/2012
Application #:
10827620
Filing Dt:
04/19/2004
Publication #:
Pub Dt:
12/30/2004
Title:
SWITCHING APPARATUS AND METHOD FOR PROVIDING SHARED I/O WITHIN A LOAD-STORE FABRIC
94
Patent #:
Issue Dt:
05/15/2007
Application #:
10827622
Filing Dt:
04/19/2004
Publication #:
Pub Dt:
02/03/2005
Title:
SWITCHING APPARATUS AND METHOD FOR PROVIDING SHARED I/O WITHIN A LOAD-STORE FABRIC
95
Patent #:
Issue Dt:
01/15/2008
Application #:
10830419
Filing Dt:
04/22/2004
Publication #:
Pub Dt:
01/27/2005
Title:
MANAGEMENT OF ERROR CONDITIONS IN HIGH-AVAILABILITY MASS-STORAGE-DEVICE SHELVES BY STORAGE-SHELF ROUTERS
96
Patent #:
Issue Dt:
11/13/2007
Application #:
10841009
Filing Dt:
05/07/2004
Publication #:
Pub Dt:
10/21/2004
Title:
SYSTEM AND METHOD FOR SCHEDULING MESSAGE TRANSMISSION AND PROCESSING IN A DIGITAL DATA NETWORK
97
Patent #:
Issue Dt:
02/05/2008
Application #:
10856162
Filing Dt:
05/27/2004
Publication #:
Pub Dt:
11/04/2004
Title:
HARDWARE INITIALIZATION WITH OR WITHOUT PROCESSOR INTERVENTION
98
Patent #:
Issue Dt:
12/06/2016
Application #:
10857540
Filing Dt:
05/28/2004
Publication #:
Pub Dt:
08/25/2005
Title:
WIRELESS COMMUNICATION BETWEEN STATIONS OF DIFFERING PROTOCOLS
99
Patent #:
Issue Dt:
08/30/2005
Application #:
10886880
Filing Dt:
07/07/2004
Publication #:
Pub Dt:
01/06/2005
Title:
DIGITAL LOOP DIAGNOSTIC LOOP INITIALIZATION SEQUENCING.
100
Patent #:
Issue Dt:
04/04/2006
Application #:
10886966
Filing Dt:
07/07/2004
Publication #:
Pub Dt:
12/30/2004
Title:
DIGITAL LOOP DIAGNOSTIC PORT CONTROL MONITOR
Assignor
1
Exec Dt:
05/09/2018
Assignee
1
1 YISHUN AVENUE 7
SINGAPORE, SINGAPORE 768923
Correspondence name and address
FOLEY & LARDNER LLP/ BROADCOM CORPORATIO
3000 K STREET N.W.
SUITE 600
WASHINGTON, DC 20007-5109

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