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Reel/Frame:047540/0001   Pages: 843
Recorded: 07/13/2018
Attorney Dkt #:509265/2155
Conveyance: SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 16531
Page 12 of 166
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166
1
Patent #:
7253047
Issue Dt:
08/07/2007
Application #:
09388857
Filing Dt:
09/01/1999
Publication #:
US20030020106
Pub Dt:
01/30/2003
Title:
SEMICONDUCTOR PROCESSING METHODS OF FORMING TRANSISTORS, SEMICONDUCTOR PROCESSING METHODS OF FORMING DYNAMIC RANDOM ACCESS MEMORY CIRCUITRY, AND RELATED INTEGRATED CIRCUITRY
2
Patent #:
6114868
Issue Dt:
09/05/2000
Application #:
09389285
Filing Dt:
09/02/1999
Title:
UNIFORM TEMPERATURE ENVIRONMENTAL TESTING METHOD FOR SEMICONDUCTOR DEVICES
3
Patent #:
6162693
Issue Dt:
12/19/2000
Application #:
09389295
Filing Dt:
09/02/1999
Title:
CHANNEL IMPLANT THROUGH GATE POLYSILICON
4
Patent #:
6194319
Issue Dt:
02/27/2001
Application #:
09389526
Filing Dt:
09/02/1999
Title:
SEMICONDUCTOR PROCESSING METHOD OF REDUCING AN ETCH RATE OF ONE PORTION OF A DOPED MATERIAL RELATIVE TO ANOTHER PORTION, AND METHODS OF FORMING OPENINGS
5
Patent #:
6254928
Issue Dt:
07/03/2001
Application #:
09389536
Filing Dt:
09/02/1999
Title:
LASER PYROLYSIS PARTICLE FORMING METHOD AND PARTICLE FORMING METHOD
6
Patent #:
6204156
Issue Dt:
03/20/2001
Application #:
09389656
Filing Dt:
09/02/1999
Title:
METHOD TO FABRICATE AN INTRINSIC POLYCRYSTALLINE SILICON FILM
7
Patent #:
6285215
Issue Dt:
09/04/2001
Application #:
09389662
Filing Dt:
09/02/1999
Title:
OUTPUT DRIVER HAVING A PROGRAMMABLE EDGE RATE
8
Patent #:
6238273
Issue Dt:
05/29/2001
Application #:
09389664
Filing Dt:
08/31/1999
Title:
METHODS FOR PREDICTING POLISHING PARAMETERS OF POLISHING PADS AND METHODS AND MACHINES FOR PLANARIZING MICROELECTRONIC SUBSTRATE ASSEMBLIES IN MECHANICAL OR CHEMICAL-MECHANICAL PLANARIZATION
9
Patent #:
6500744
Issue Dt:
12/31/2002
Application #:
09389670
Filing Dt:
09/02/1999
Publication #:
US20020072208
Pub Dt:
06/13/2002
Title:
METHODS OF FORMING DRAM ASSEMBLIES, TRANSISTOR DEVICES, AND OPENINGS IN SUBSTRATES
10
Patent #:
6825550
Issue Dt:
11/30/2004
Application #:
09389844
Filing Dt:
09/02/1999
Publication #:
US20020060369
Pub Dt:
05/23/2002
Title:
BOARD-ON-CHIP PACKAGES WITH CONDUCTIVE FOIL ON THE CHIP SURFACE
11
Patent #:
6159818
Issue Dt:
12/12/2000
Application #:
09389866
Filing Dt:
09/02/1999
Title:
METHOD OF FORMING A CONTAINER CAPACITOR STRUCTURE
12
Patent #:
6440613
Issue Dt:
08/27/2002
Application #:
09389870
Filing Dt:
09/02/1999
Title:
METHOD OF FABRICATING ATTENUATED PHASE SHIFT MASK
13
Patent #:
6141249
Issue Dt:
10/31/2000
Application #:
09389994
Filing Dt:
09/03/1999
Title:
ORGANIZATION OF BLOCKS WITHIN A NONVOLATILE MEMORY UNIT TO EFFECTIVELY DECREASE SECTOR WRITE OPERATION TIME
14
Patent #:
6410453
Issue Dt:
06/25/2002
Application #:
09391078
Filing Dt:
09/02/1999
Title:
METHOD OF PROCESSING A SUBSTRATE
15
Patent #:
6281077
Issue Dt:
08/28/2001
Application #:
09392937
Filing Dt:
09/09/1999
Title:
METHOD FOR MANUFACTURING ELECTRONIC DEVICES COMPRISING NON-VOLATILE MEMORY CELLS AND LV TRANSISTORS WITH SALICIDED JUNCTIONS
16
Patent #:
6239459
Issue Dt:
05/29/2001
Application #:
09393078
Filing Dt:
09/07/1999
Title:
CAPACITORS, METHODS OF FORMING CAPACITORS, AND INTEGRATED CIRCUITRY
17
Patent #:
6400370
Issue Dt:
06/04/2002
Application #:
09393477
Filing Dt:
09/10/1999
Title:
STOCHASTIC SAMPLING WITH CONSTANT DENSITY IN OBJECT SPACE FOR ANISOTROPIC TEXTURE MAPPING
18
Patent #:
6108130
Issue Dt:
08/22/2000
Application #:
09393757
Filing Dt:
09/10/1999
Title:
STEREOSCOPIC IMAGE SENSOR
19
Patent #:
6384872
Issue Dt:
05/07/2002
Application #:
09395000
Filing Dt:
09/13/1999
Title:
METHOD AND APPARATUS FOR INTERLACED IMAGE ENHANCEMENT
20
Patent #:
6224713
Issue Dt:
05/01/2001
Application #:
09395777
Filing Dt:
09/14/1999
Title:
METHOD AND APPARATUS FOR ULTRASONIC WET ETCHING OF SILICON
21
Patent #:
6169691
Issue Dt:
01/02/2001
Application #:
09397387
Filing Dt:
09/15/1999
Title:
METHOD FOR MAINTAINING THE MEMORY CONTENT OF NON-VOLATILE MEMORY CELLS
22
Patent #:
6562545
Issue Dt:
05/13/2003
Application #:
09398575
Filing Dt:
09/17/1999
Title:
METHOD OF MAKING A SOCKET ASSEMBLY FOR USE WITH A SOLDER BALL
23
Patent #:
6281161
Issue Dt:
08/28/2001
Application #:
09399591
Filing Dt:
09/20/1999
Title:
PLATINUM -CONTAINING MATERIALS AND CATALYSTS
24
Patent #:
6210984
Issue Dt:
04/03/2001
Application #:
09399640
Filing Dt:
09/20/1999
Title:
METHOD AND APPARATUS FOR AUTOMATICALLY POSITIONING ELECTRONIC DICE WITHIN COMPONENT PACKAGES
25
Patent #:
6395597
Issue Dt:
05/28/2002
Application #:
09405091
Filing Dt:
09/27/1999
Publication #:
US20010053575
Pub Dt:
12/20/2001
Title:
TRENCH DRAM CELL WITH VERTICAL DEVICE AND BURIED WORD LINES
26
Patent #:
6255896
Issue Dt:
07/03/2001
Application #:
09406329
Filing Dt:
09/27/1999
Title:
METHOD AND APPARATUS FOR RAPID INITIALIZATION OF CHARGE PUMP CIRCUITS
27
Patent #:
6795931
Issue Dt:
09/21/2004
Application #:
09409367
Filing Dt:
09/30/1999
Title:
METHOD AND APPARATUS FOR AN ADJUSTABLE DELAY CIRCUIT HAVING ARRANGED SERIALLY COARSE STAGES RECEIVED BY A FINE DELAY STAGE
28
Patent #:
6321315
Issue Dt:
11/20/2001
Application #:
09409523
Filing Dt:
09/30/1999
Title:
METHOD AND APPARATUS TO REDUCE MEMORY READ LATENCY
29
Patent #:
6364331
Issue Dt:
04/02/2002
Application #:
09410400
Filing Dt:
10/01/1999
Title:
METHOD AND APPARATUS FOR TRANSFERRING WAFER CASSETTES IN MICROELECTRONIC MANUFACTURING ENVIRONMENT
30
Patent #:
6232247
Issue Dt:
05/15/2001
Application #:
09410969
Filing Dt:
10/04/1999
Publication #:
US20010002339
Pub Dt:
05/31/2001
Title:
SUBSTRATE COATING APPARATUS AND SEMICONDUCTOR PROCESSING METHOD OF IMPROVING UNIFORMITY OF LIQUID DEPOSITION
31
Patent #:
6162295
Issue Dt:
12/19/2000
Application #:
09411498
Filing Dt:
10/04/1999
Title:
SPIN COATING SPINDLE AND CHUCK ASSEMBLY
32
Patent #:
6212128
Issue Dt:
04/03/2001
Application #:
09413382
Filing Dt:
10/06/1999
Title:
ADDRESS TRANSITION DETECTOR IN SEMICONDUCTOR MEMORIES
33
Patent #:
6246110
Issue Dt:
06/12/2001
Application #:
09415739
Filing Dt:
10/12/1999
Title:
DOWNSET LEAD FRAME FOR SEMICONDUCTOR PACKAGES
34
Patent #:
6292407
Issue Dt:
09/18/2001
Application #:
09416301
Filing Dt:
10/12/1999
Title:
METHOD AND APPARATUS FOR CIRCUIT VARIABLE UPDATES
35
Patent #:
6204072
Issue Dt:
03/20/2001
Application #:
09417029
Filing Dt:
10/12/1999
Title:
CIRCUIT AND A METHOD FOR CONFIGURING PAD CONNECTIONS IN AN INTEGRATED DEVICE
36
Patent #:
6421813
Issue Dt:
07/16/2002
Application #:
09417964
Filing Dt:
10/13/1999
Title:
METHOD AND APPARATUS FOR PROVIDING VISIBILITY AND CONTROL OVER COMPONENTS WITHIN A PROGRAMMABLE LOGIC CIRCUIT FOR EMULATION PURPOSES
37
Patent #:
6389492
Issue Dt:
05/14/2002
Application #:
09418465
Filing Dt:
10/15/1999
Title:
APPARATUS FOR FLEXIBLY ALLOCATING REQUEST/GRANT PINS BETWEEN MULTIPLE BUS CONTROLLERS
38
Patent #:
6275913
Issue Dt:
08/14/2001
Application #:
09418466
Filing Dt:
10/15/1999
Title:
METHOD FOR PRESERVING MEMORY REQUEST ORDERING ACROSS MULTIPLE MEMORY CONTROLLERS
39
Patent #:
6275914
Issue Dt:
08/14/2001
Application #:
09418467
Filing Dt:
10/15/1999
Title:
APPARATUS FOR PRESERVING MEMORY REQUEST ORDERING ACROSS MULTIPLE MEMORY CONTROLLERS
40
Patent #:
6385680
Issue Dt:
05/07/2002
Application #:
09418468
Filing Dt:
10/15/1999
Title:
METHOD FOR FLEXIBLY ALLOCATING REQUEST/GRANT PINS BETWEEN MULTIPLE BUS CONTROLLERS
41
Patent #:
6444526
Issue Dt:
09/03/2002
Application #:
09419403
Filing Dt:
10/14/1999
Title:
SIMPLIFIED PROCESS FOR DEFINING THE TUNNEL AREA IN NON-ALIGNED, NON-VOLATILE SEMICONDUCTOR MEMORY CELLS
42
Patent #:
6569574
Issue Dt:
05/27/2003
Application #:
09420205
Filing Dt:
10/18/1999
Publication #:
US20020142228
Pub Dt:
10/03/2002
Title:
METHODS OF PATTERNING RADIATION , METHODS OF FORMING RADIATION- PATTERNING TOOLS, AND RADIATION-PATTERNING TOOLS
43
Patent #:
6214707
Issue Dt:
04/10/2001
Application #:
09420964
Filing Dt:
10/20/1999
Title:
METHOD OF FORMING A DOPED REGION IN A SEMICONDUCTOR SUBSTRATE
44
Patent #:
6194308
Issue Dt:
02/27/2001
Application #:
09421165
Filing Dt:
10/19/1999
Title:
METHOD OF FORMING WIRE LINE
45
Patent #:
6884657
Issue Dt:
04/26/2005
Application #:
09422887
Filing Dt:
10/21/1999
Title:
ANGULARLY OFFSET STACKED DIE MULTICHIP DEVICE AND METHOD OF MANUFACTURE
46
Patent #:
6273786
Issue Dt:
08/14/2001
Application #:
09425115
Filing Dt:
10/20/1999
Title:
TUNGSTEN CHEMICAL-MECHANICAL POLISHING PROCESS USING A FIXED ABRASIVE POLISHING PAD AND A TUNGSTEN LAYER CHEMICAL-MECHANICAL POLISHING SOLUTION SPECIFICALLY ADAPTED FOR CHEMICAL-MECHANICAL POLISHING WITH A FIXED ABRASIVE PAD
47
Patent #:
6195289
Issue Dt:
02/27/2001
Application #:
09425446
Filing Dt:
10/22/1999
Title:
DEVICE FOR READING ANALOG NONVOLATILE MEMORY CELLS, IN PARTICULAR FLASH CELLS
48
Patent #:
6243777
Issue Dt:
06/05/2001
Application #:
09426634
Filing Dt:
10/26/1999
Title:
CIRCUIT FOR PREVENTING BUS CONTENTION
49
Patent #:
6128219
Issue Dt:
10/03/2000
Application #:
09428683
Filing Dt:
10/27/1999
Title:
NONVOLATILE MEMORY TEST STRUCTURE AND NONVOLATILE MEMORY RELIABILITY TEST METHOD
50
Patent #:
6452666
Issue Dt:
09/17/2002
Application #:
09429882
Filing Dt:
10/29/1999
Title:
OPTICAL RANGE FINDER
51
Patent #:
6594329
Issue Dt:
07/15/2003
Application #:
09432050
Filing Dt:
11/01/1999
Title:
ELASTIC BUFFER
52
Patent #:
6525726
Issue Dt:
02/25/2003
Application #:
09432134
Filing Dt:
11/02/1999
Title:
METHOD AND APPARATUS FOR ADAPTIVE HIERARCHICAL VISIBILITY IN A TILED THREE-DIMENSIONAL GRAPHICS ARCHITECTURE
53
Patent #:
6678803
Issue Dt:
01/13/2004
Application #:
09432687
Filing Dt:
11/03/1999
Publication #:
US20010042180
Pub Dt:
11/15/2001
Title:
METHOD AND DEVICE TO USE MEMORY ACCESS REQUEST TAGS
54
Patent #:
6600359
Issue Dt:
07/29/2003
Application #:
09433513
Filing Dt:
11/03/1999
Title:
CIRCUIT HAVING A LONG L DEVICE CONFIGURED FOR TESTING
55
Patent #:
6268774
Issue Dt:
07/31/2001
Application #:
09434250
Filing Dt:
11/05/1999
Title:
SELF-TUNING AMPLIFIER
56
Patent #:
6114252
Issue Dt:
09/05/2000
Application #:
09435237
Filing Dt:
11/05/1999
Title:
PLASMA PROCESSING TOOLS, DUAL-SOURCE PLASMA ETCHERS, DUAL-SOURCE PLASMA ETCHING METHODS, AND METHODS OF FORMING PLANAR COIL DUAL-SOURCE PLASMA ETCHERS
57
Patent #:
6278286
Issue Dt:
08/21/2001
Application #:
09436483
Filing Dt:
11/08/1999
Title:
INTERCONNECT AND SYSTEM FOR MAKING TEMPORARY ELECTRICAL CONNECTIONS TO SEMICONDUCTOR COMPONENTS
58
Patent #:
6570322
Issue Dt:
05/27/2003
Application #:
09436967
Filing Dt:
11/09/1999
Title:
ANODE SCREEN FOR A PHOSPHOR DISPLAY WITH A PLURALITY OF PIXEL REGIONS DEFINING PHOSPHOR LAYER HOLES
59
Patent #:
6207467
Issue Dt:
03/27/2001
Application #:
09437595
Filing Dt:
11/10/1999
Title:
MULTI-CHIP MODULE WITH STACKED DICE
60
Patent #:
6453547
Issue Dt:
09/24/2002
Application #:
09437870
Filing Dt:
11/10/1999
Title:
COUPLING SPACED BOND PADS TO A CONTACT
61
Patent #:
6292048
Issue Dt:
09/18/2001
Application #:
09438186
Filing Dt:
11/11/1999
Title:
GATE ENHANCEMENT CHARGE PUMP FOR LOW VOLTAGE POWER SUPPLY
62
Patent #:
6466481
Issue Dt:
10/15/2002
Application #:
09438232
Filing Dt:
11/12/1999
Title:
DEVICE AND METHOD FOR PROGRAMMING NONVOLATILE MEMORY CELLS WITH AUTOMATIC GENERATION OF PROGRAMMING VOLTAGE
63
Patent #:
6128228
Issue Dt:
10/03/2000
Application #:
09438823
Filing Dt:
11/12/1999
Title:
CIRCUIT FOR HIGH-PRECISION ANALOG READING OF NONVOLATILE MEMORY CELLS, IN PARTICULAR ANALOG OR MULTILEVEL FLASH OR EEPROM MEMORY CELLS
64
Patent #:
6180504
Issue Dt:
01/30/2001
Application #:
09440380
Filing Dt:
11/15/1999
Title:
METHOD FOR FABRICATING A SEMICONDUCTOR COMPONENT WITH EXTERNAL POLYMER SUPPORT LAYER
65
Patent #:
6092851
Issue Dt:
07/25/2000
Application #:
09440839
Filing Dt:
11/15/1999
Title:
WAFER CARRIER HAVING BOTH A RIGID STRUCTURE AND RESISTANCE TO CORROSIVE ENVIRONMENTS
66
Patent #:
6374337
Issue Dt:
04/16/2002
Application #:
09440986
Filing Dt:
11/16/1999
Title:
DATA PIPELINING METHOD AND APPARATUS FOR MEMORY CONTROL CIRCUIT
67
Patent #:
6570244
Issue Dt:
05/27/2003
Application #:
09441524
Filing Dt:
11/16/1999
Title:
MULTI-PART LEAD FRAME WITH DISSIMILAR MATERIALS
68
Patent #:
6387763
Issue Dt:
05/14/2002
Application #:
09442834
Filing Dt:
11/18/1999
Title:
IMPROVED FIELD-EFFECT TRANSISTOR AND CORRESPONDING MANUFACTURING METHOD
69
Patent #:
6417546
Issue Dt:
07/09/2002
Application #:
09444024
Filing Dt:
11/19/1999
Publication #:
US20010040256
Pub Dt:
11/15/2001
Title:
MOSFET WITH NITROGEN ATOMS IN THE GATE OXIDE
70
Patent #:
6232229
Issue Dt:
05/15/2001
Application #:
09444280
Filing Dt:
11/19/1999
Title:
MICROELECTRONIC DEVICE FABRICATING METHOD, INTEGRATED CIRCUIT, AND INTERMEDIATE CONSTRUCTION
71
Patent #:
6163483
Issue Dt:
12/19/2000
Application #:
09447531
Filing Dt:
11/23/1999
Title:
CIRCUIT FOR PARALLEL PROGRAMMING NONVOLATILE MEMORY CELLS, WITH ADJUSTABLE PROGRAMMING SPEED
72
Patent #:
6214641
Issue Dt:
04/10/2001
Application #:
09447983
Filing Dt:
11/23/1999
Title:
METHOD OF FABRICATING A MULTI-CHIP MODULE
73
Patent #:
6210489
Issue Dt:
04/03/2001
Application #:
09448020
Filing Dt:
11/23/1999
Title:
METHODS AND ETCHANTS FOR ETCHING OXIDES OF SILICON WITH LOW SELECTIVITY
74
Patent #:
6706565
Issue Dt:
03/16/2004
Application #:
09449026
Filing Dt:
11/24/1999
Publication #:
US20010036686
Pub Dt:
11/01/2001
Title:
METHODS OF FORMING AN INTEGRATED CIRCUIT DEVICE
75
Patent #:
6410387
Issue Dt:
06/25/2002
Application #:
09449044
Filing Dt:
11/24/1999
Title:
PROCESS FOR INTEGRATING IN A SAME CHIP A NON-VOLATILE MEMORY AND A HIGH-PERFORMANCE LOGIC CIRCUITRY
76
Patent #:
6392931
Issue Dt:
05/21/2002
Application #:
09449168
Filing Dt:
11/24/1999
Title:
METHOD FOR HIGH PRECISION PROGRAMMING NONVOLATILE MEMORY CELLS, WITH OPTIMIZED PROGRAMMING SPEED
77
Patent #:
7958491
Issue Dt:
06/07/2011
Application #:
09449782
Filing Dt:
11/26/1999
Title:
COMMAND LINE OUTPUT REDIRECTION
78
Patent #:
6482693
Issue Dt:
11/19/2002
Application #:
09452725
Filing Dt:
11/30/1999
Title:
METHODS OF FORMING DIODES
79
Patent #:
6404679
Issue Dt:
06/11/2002
Application #:
09453753
Filing Dt:
12/02/1999
Title:
MULTIPLE LEVEL FLOATING-GATE MEMORY
80
Patent #:
6120339
Issue Dt:
09/19/2000
Application #:
09453848
Filing Dt:
12/01/1999
Title:
METHODS OF FABRICATING FLAT PANEL EVACUATED DISPLAYS
81
Patent #:
6337274
Issue Dt:
01/08/2002
Application #:
09454536
Filing Dt:
12/06/1999
Title:
BURIED BIT LINE MEMORY CIRCUITRY, METHOD OF FORMING BURIED BIT LINE MEMORY CIRCUITRY, AND SEMICONDUCTOR PROCESSING METHOD OF FORMING A CONDUCTIVE LINE
82
Patent #:
6530045
Issue Dt:
03/04/2003
Application #:
09454808
Filing Dt:
12/03/1999
Title:
APPARATUS AND METHOD FOR TESTING RAMBUS DRAMS
83
Patent #:
6392458
Issue Dt:
05/21/2002
Application #:
09455537
Filing Dt:
12/07/1999
Publication #:
US20020024367
Pub Dt:
02/28/2002
Title:
METHOD AND APPARATUS FOR DIGITAL DELAY LOCKED LOOP CIRCUITS
84
Patent #:
6178111
Issue Dt:
01/23/2001
Application #:
09455850
Filing Dt:
12/07/1999
Title:
METHOD AND APPARATUS FOR WRITING DATA STATES TO NON-VOLATILE STORAGE DEVICES
85
Patent #:
6580837
Issue Dt:
06/17/2003
Application #:
09457058
Filing Dt:
12/07/1999
Title:
UP-SAMPLING DECIMATED COLOR PLANE DATA
86
Patent #:
6291280
Issue Dt:
09/18/2001
Application #:
09457264
Filing Dt:
12/09/1999
Title:
CMOS IMAGER CELL HAVING A BURIED CONTACT AND METHOD OF FABRICATION
87
Patent #:
6317381
Issue Dt:
11/13/2001
Application #:
09457429
Filing Dt:
12/07/1999
Title:
METHOD AND SYSTEM FOR ADAPTIVELY ADJUSTING CONTROL SIGNAL TIMING IN A MEMORY DEVICE
88
Patent #:
6249463
Issue Dt:
06/19/2001
Application #:
09457500
Filing Dt:
12/08/1999
Title:
ADDRESS LATCH ENABLE SIGNAL CONTROL CIRCUIT FOR ELECTRONIC MEMORIES
89
Patent #:
6555412
Issue Dt:
04/29/2003
Application #:
09458902
Filing Dt:
12/10/1999
Title:
PACKAGED SEMICONDUCTOR CHIP AND METHOD OF MAKING SAME
90
Patent #:
6629172
Issue Dt:
09/30/2003
Application #:
09459720
Filing Dt:
12/13/1999
Title:
MULTI-CHIP ADDRESSING FOR THE I2C BUS
91
Patent #:
6376306
Issue Dt:
04/23/2002
Application #:
09459754
Filing Dt:
12/10/1999
Title:
METHOD FOR FORMING NON VOLATILE MEMORY STRUCTURES ON A SEMICONDUCTOR SUBSTRATE
92
Patent #:
6461922
Issue Dt:
10/08/2002
Application #:
09464066
Filing Dt:
12/15/1999
Title:
METHOD FOR THE INTEGRATION OF RESISTORS AND ESD SELF-PROTECTED TRANSISTORS IN AN INTEGRATED DEVICE WITH A MEMORY MATRIX MANUFACTURED BY MEANS OF A PROCESS FEATURING SELF-ALIGNED SOURCE (SAS) FORMATION AND JUNCTION SALICIDATION
93
Patent #:
6331453
Issue Dt:
12/18/2001
Application #:
09465350
Filing Dt:
12/16/1999
Title:
METHOD FOR FABRICATING SEMICONDUCTOR PACKAGES USING MOLD TOOLING FIXTURE WITH FLASH CONTROL CAVITIES
94
Patent #:
6738240
Issue Dt:
05/18/2004
Application #:
09466134
Filing Dt:
12/21/1999
Title:
MICROTRANSFORMER FOR SYSTEM-ON-CHIP POWER SUPPLY
95
Patent #:
6272047
Issue Dt:
08/07/2001
Application #:
09466269
Filing Dt:
12/17/1999
Title:
FLASH MEMORY CELL
96
Patent #:
6403285
Issue Dt:
06/11/2002
Application #:
09466364
Filing Dt:
12/17/1999
Title:
METHOD FOR EXPOSING SEMICONDUCTOR WAFERS IN A MANNER THAT PROMOTES RADIAL PROCESSING UNIFORMITY
97
Patent #:
6232753
Issue Dt:
05/15/2001
Application #:
09467726
Filing Dt:
12/20/1999
Title:
VOLTAGE REGULATOR FOR DRIVING PLURAL LOADS BASED ON THE NUMBER OF LOADS BEING DRIVEN
98
Patent #:
6432833
Issue Dt:
08/13/2002
Application #:
09468239
Filing Dt:
12/20/1999
Title:
METHOD OF FORMING A SELF-ALIGNED CONTACT OPENING
99
Patent #:
6671771
Issue Dt:
12/30/2003
Application #:
09468477
Filing Dt:
12/21/1999
Publication #:
US20030188089
Pub Dt:
10/02/2003
Title:
HASH CAM HAVING A REDUCED WIDTH COMPARISON CIRCUITRY AND ITS APPLICATION
100
Patent #:
6754764
Issue Dt:
06/22/2004
Application #:
09468965
Filing Dt:
12/21/1999
Title:
METHOD AND APPARATUS FOR MAINTAINING ORDER IN A PIPELINED PROCESS AND ITS APPLICATION
Assignors
1
MICRON TECHNOLOGY, INC.
Exec Dt:
07/03/2018
2
MICRON SEMICONDUCTOR PRODUCTS, INC.
Exec Dt:
07/03/2018
Assignee
1
JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
10 S. DEARBORN
7TH FLOOR
CHICAGO, ILLINOIS 60603
Correspondence name and address
MARCELA ROBLEDO
2475 HANOVER STREET
PALO ALTO, CA 94304

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