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Reel/Frame:047540/0001   Pages: 843
Recorded: 07/13/2018
Attorney Dkt #:509265/2155
Conveyance: SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 16531
Page 148 of 166
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1
Patent #:
9805772
Issue Dt:
10/31/2017
Application #:
15298798
Filing Dt:
10/20/2016
Title:
APPARATUSES AND METHODS TO SELECTIVELY PERFORM LOGICAL OPERATIONS
2
Patent #:
9966406
Issue Dt:
05/08/2018
Application #:
15299103
Filing Dt:
10/20/2016
Publication #:
US20170040375
Pub Dt:
02/09/2017
Title:
SEMICONDUCTOR DEVICES INCLUDING BACK-SIDE INTEGRATED CIRCUITRY
3
Patent #:
10446195
Issue Dt:
10/15/2019
Application #:
15312010
Filing Dt:
11/17/2016
Publication #:
US20180226107
Pub Dt:
08/09/2018
Title:
VOLTAGE GENERATION CIRCUIT
4
Patent #:
9793884
Issue Dt:
10/17/2017
Application #:
15332811
Filing Dt:
10/24/2016
Publication #:
US20170040986
Pub Dt:
02/09/2017
Title:
APPARATUSES AND METHODS FOR PHASE INTERPOLATING CLOCK SIGNALS AND FOR PROVIDING DUTY CYCLE CORRECTED CLOCK SIGNALS
5
Patent #:
9875786
Issue Dt:
01/23/2018
Application #:
15333507
Filing Dt:
10/25/2016
Publication #:
US20170040049
Pub Dt:
02/09/2017
Title:
OUTPUT BUFFER CIRCUIT WITH LOW SUB-THRESHOLD LEAKAGE CURRENT
6
Patent #:
10374156
Issue Dt:
08/06/2019
Application #:
15333774
Filing Dt:
10/25/2016
Publication #:
US20170040533
Pub Dt:
02/09/2017
Title:
MEMORY CELLS INCLUDING A METAL CHALCOGENIDE MATERIAL AND RELATED METHODS
7
Patent #:
9978730
Issue Dt:
05/22/2018
Application #:
15334069
Filing Dt:
10/25/2016
Publication #:
US20170040303
Pub Dt:
02/09/2017
Title:
METHOD OF ASSEMBLY SEMICONDUCTOR DEVICE WITH THROUGH-PACKAGE INTERCONNECT
8
Patent #:
10388871
Issue Dt:
08/20/2019
Application #:
15334186
Filing Dt:
10/25/2016
Publication #:
US20170040534
Pub Dt:
02/09/2017
Title:
Memory Cells and Methods of Forming Memory Cells
9
Patent #:
9666573
Issue Dt:
05/30/2017
Application #:
15335259
Filing Dt:
10/26/2016
Title:
Methods of Forming Integrated Circuitry
10
Patent #:
10048887
Issue Dt:
08/14/2018
Application #:
15336071
Filing Dt:
10/27/2016
Publication #:
US20180121128
Pub Dt:
05/03/2018
Title:
APPARATUSES AND METHODS FOR SINGLE LEVEL CELL CACHING
11
Patent #:
10157670
Issue Dt:
12/18/2018
Application #:
15338154
Filing Dt:
10/28/2016
Publication #:
US20180122468
Pub Dt:
05/03/2018
Title:
APPARATUSES INCLUDING MEMORY CELLS AND METHODS OF OPERATION OF SAME
12
Patent #:
10453704
Issue Dt:
10/22/2019
Application #:
15339290
Filing Dt:
10/31/2016
Publication #:
US20170047231
Pub Dt:
02/16/2017
Title:
METHOD FOR PACKAGING CIRCUITS
13
Patent #:
9997247
Issue Dt:
06/12/2018
Application #:
15339374
Filing Dt:
10/31/2016
Publication #:
US20170047120
Pub Dt:
02/16/2017
Title:
MEMORY DEVICES HAVING SOURCE LINES DIRECTLY COUPLED TO BODY REGIONS AND METHODS
14
Patent #:
10424553
Issue Dt:
09/24/2019
Application #:
15339693
Filing Dt:
10/31/2016
Publication #:
US20180122762
Pub Dt:
05/03/2018
Title:
SEMICONDUCTOR DEVICES WITH UNDERFILL CONTROL FEATURES, AND ASSOCIATED SYSTEMS AND METHODS
15
Patent #:
10290456
Issue Dt:
05/14/2019
Application #:
15339699
Filing Dt:
10/31/2016
Publication #:
US20170047187
Pub Dt:
02/16/2017
Title:
Methods of Forming and Using Fuses
16
Patent #:
10163917
Issue Dt:
12/25/2018
Application #:
15340682
Filing Dt:
11/01/2016
Publication #:
US20180122816
Pub Dt:
05/03/2018
Title:
CELL DISTURB PREVENTION USING A LEAKER DEVICE TO REDUCE EXCESS CHARGE FROM AN ELECTRONIC DEVICE
17
Patent #:
10014305
Issue Dt:
07/03/2018
Application #:
15340838
Filing Dt:
11/01/2016
Publication #:
US20180122817
Pub Dt:
05/03/2018
Title:
Methods of Forming an Array Comprising Pairs of Vertically Opposed Capacitors and Arrays Comprising Pairs of Vertically Opposed Capacitors
18
Patent #:
9761580
Issue Dt:
09/12/2017
Application #:
15340842
Filing Dt:
11/01/2016
Title:
METHODS OF FORMING AN ARRAY COMPRISING PAIRS OF VERTICALLY OPPOSED CAPACITORS AND ARRAYS COMPRISING PAIRS OF VERTICALLY OPPOSED CAPACITORS
19
Patent #:
10109351
Issue Dt:
10/23/2018
Application #:
15341410
Filing Dt:
11/02/2016
Publication #:
US20170053701
Pub Dt:
02/23/2017
Title:
PROGRAM AND READ TRIM SETTING
20
Patent #:
9922845
Issue Dt:
03/20/2018
Application #:
15342124
Filing Dt:
11/03/2016
Title:
SEMICONDUCTOR PACKAGE AND FABRICATION METHOD THEREOF
21
Patent #:
9875802
Issue Dt:
01/23/2018
Application #:
15342255
Filing Dt:
11/03/2016
Publication #:
US20170076806
Pub Dt:
03/16/2017
Title:
ACCESS LINE MANAGEMENT IN A MEMORY DEVICE
22
Patent #:
10126967
Issue Dt:
11/13/2018
Application #:
15342287
Filing Dt:
11/03/2016
Publication #:
US20170075613
Pub Dt:
03/16/2017
Title:
SENSE OPERATION FLAGS IN A MEMORY DEVICE
23
Patent #:
10347614
Issue Dt:
07/09/2019
Application #:
15342495
Filing Dt:
11/03/2016
Publication #:
US20170125390
Pub Dt:
05/04/2017
Title:
SOLID STATE TRANSDUCERS WITH STATE DETECTION, AND ASSOCIATED SYSTEMS AND METHODS
24
Patent #:
10020252
Issue Dt:
07/10/2018
Application #:
15344211
Filing Dt:
11/04/2016
Publication #:
US20180130739
Pub Dt:
05/10/2018
Title:
WIRING WITH EXTERNAL TERMINAL
25
Patent #:
10163830
Issue Dt:
12/25/2018
Application #:
15344893
Filing Dt:
11/07/2016
Publication #:
US20170053881
Pub Dt:
02/23/2017
Title:
BONDING PADS WITH THERMAL PATHWAYS
26
Patent #:
9941466
Issue Dt:
04/10/2018
Application #:
15345636
Filing Dt:
11/08/2016
Publication #:
US20170077393
Pub Dt:
03/16/2017
Title:
MAGNETIC TUNNEL JUNCTIONS, METHODS USED WHILE FORMING MAGNETIC TUNNEL JUNCTIONS, AND METHODS OF FORMING MAGNETIC TUNNEL JUNCTIONS
27
Patent #:
10430085
Issue Dt:
10/01/2019
Application #:
15345783
Filing Dt:
11/08/2016
Publication #:
US20180129423
Pub Dt:
05/10/2018
Title:
MEMORY OPERATIONS ON DATA
28
Patent #:
10261876
Issue Dt:
04/16/2019
Application #:
15345862
Filing Dt:
11/08/2016
Publication #:
US20180129575
Pub Dt:
05/10/2018
Title:
MEMORY MANAGEMENT
29
Patent #:
10649665
Issue Dt:
05/12/2020
Application #:
15345919
Filing Dt:
11/08/2016
Publication #:
US20180129424
Pub Dt:
05/10/2018
Title:
DATA RELOCATION IN HYBRID MEMORY
30
Patent #:
10074633
Issue Dt:
09/11/2018
Application #:
15345973
Filing Dt:
11/08/2016
Publication #:
US20180130773
Pub Dt:
05/10/2018
Title:
SEMICONDUCTOR DIE ASSEMBLIES HAVING MOLDED UNDERFILL STRUCTURES AND RELATED TECHNOLOGY
31
Patent #:
10490257
Issue Dt:
11/26/2019
Application #:
15346526
Filing Dt:
11/08/2016
Publication #:
US20170053693
Pub Dt:
02/23/2017
Title:
COMPARISON OPERATIONS IN MEMORY
32
Patent #:
10141508
Issue Dt:
11/27/2018
Application #:
15347271
Filing Dt:
11/09/2016
Publication #:
US20170062715
Pub Dt:
03/02/2017
Title:
CLAMP ELEMENTS FOR PHASE CHANGE MEMORY ARRAYS
33
Patent #:
9842840
Issue Dt:
12/12/2017
Application #:
15347623
Filing Dt:
11/09/2016
Title:
Transistors and Memory Arrays
34
Patent #:
9911469
Issue Dt:
03/06/2018
Application #:
15348578
Filing Dt:
11/10/2016
Title:
APPARATUSES AND METHODS FOR POWER EFFICIENT DRIVER CIRCUITS
35
Patent #:
10423353
Issue Dt:
09/24/2019
Application #:
15349492
Filing Dt:
11/11/2016
Publication #:
US20180136871
Pub Dt:
05/17/2018
Title:
APPARATUSES AND METHODS FOR MEMORY ALIGNMENT
36
Patent #:
9972628
Issue Dt:
05/15/2018
Application #:
15349808
Filing Dt:
11/11/2016
Publication #:
US20180138182
Pub Dt:
05/17/2018
Title:
CONDUCTIVE STRUCTURES, WORDLINES AND TRANSISTORS
37
Patent #:
10049750
Issue Dt:
08/14/2018
Application #:
15350229
Filing Dt:
11/14/2016
Publication #:
US20180137922
Pub Dt:
05/17/2018
Title:
METHODS INCLUDING ESTABLISHING A NEGATIVE BODY POTENTIAL IN A MEMORY CELL
38
Patent #:
9881886
Issue Dt:
01/30/2018
Application #:
15350926
Filing Dt:
11/14/2016
Publication #:
US20170062365
Pub Dt:
03/02/2017
Title:
SEMICONDUCTOR DEVICE ASSEMBLIES INCLUDING INTERMETALLIC COMPOUND INTERCONNECT STRUCTURES
39
Patent #:
10236040
Issue Dt:
03/19/2019
Application #:
15351586
Filing Dt:
11/15/2016
Publication #:
US20180137899
Pub Dt:
05/17/2018
Title:
TWO-STEP DATA-LINE PRECHARGE SCHEME
40
Patent #:
10074724
Issue Dt:
09/11/2018
Application #:
15351977
Filing Dt:
11/15/2016
Publication #:
US20170062577
Pub Dt:
03/02/2017
Title:
APPARATUS INCLUDING GETTERING AGENTS IN MEMORY CHARGE STORAGE STRUCTURES
41
Patent #:
10191788
Issue Dt:
01/29/2019
Application #:
15353473
Filing Dt:
11/16/2016
Publication #:
US20170060649
Pub Dt:
03/02/2017
Title:
PROGRAMMABLE DEVICE, HEIRARCHICAL PARALLEL MACHINES, AND METHODS FOR PROVIDING STATE INFORMATION
42
Patent #:
10083937
Issue Dt:
09/25/2018
Application #:
15354467
Filing Dt:
11/17/2016
Publication #:
US20170069603
Pub Dt:
03/09/2017
Title:
SEMICONDUCTOR DEVICES AND PACKAGES AND METHODS OF FORMING SEMICONDUCTOR DEVICE PACKAGES
43
Patent #:
NONE
Issue Dt:
Application #:
15354572
Filing Dt:
11/17/2016
Publication #:
US20170069732
Pub Dt:
03/09/2017
Title:
Methods of Forming Diodes
44
Patent #:
9852794
Issue Dt:
12/26/2017
Application #:
15354822
Filing Dt:
11/17/2016
Publication #:
US20170069381
Pub Dt:
03/09/2017
Title:
SYSTEMS, METHODS AND DEVICES FOR PROGRAMMING A MULTILEVEL RESISTIVE MEMORY CELL
45
Patent #:
10152414
Issue Dt:
12/11/2018
Application #:
15355621
Filing Dt:
11/18/2016
Publication #:
US20170068617
Pub Dt:
03/09/2017
Title:
LINE TERMINATION METHODS
46
Patent #:
10157208
Issue Dt:
12/18/2018
Application #:
15357593
Filing Dt:
11/21/2016
Publication #:
US20170068707
Pub Dt:
03/09/2017
Title:
METHODS AND APPARATUSES FOR REDUCING POWER CONSUMPTION IN A PATTERN RECOGNITION PROCESSOR
47
Patent #:
10020228
Issue Dt:
07/10/2018
Application #:
15357602
Filing Dt:
11/21/2016
Publication #:
US20170069538
Pub Dt:
03/09/2017
Title:
Integrated Circuitry and Methods of Forming Transistors
48
Patent #:
10909452
Issue Dt:
02/02/2021
Application #:
15357703
Filing Dt:
11/21/2016
Publication #:
US20170124453
Pub Dt:
05/04/2017
Title:
METHODS AND SYSTEMS FOR POWER MANAGEMENT IN A PATTERN RECOGNITION PROCESSING SYSTEM
49
Patent #:
9761300
Issue Dt:
09/12/2017
Application #:
15358673
Filing Dt:
11/22/2016
Title:
DATA SHIFT APPARATUSES AND METHODS
50
Patent #:
9870941
Issue Dt:
01/16/2018
Application #:
15359218
Filing Dt:
11/22/2016
Publication #:
US20170076977
Pub Dt:
03/16/2017
Title:
STAIR STEP FORMATION USING AT LEAST TWO MASKS
51
Patent #:
9977622
Issue Dt:
05/22/2018
Application #:
15359306
Filing Dt:
11/22/2016
Publication #:
US20180143784
Pub Dt:
05/24/2018
Title:
BUFFER OPERATIONS IN MEMORY
52
Patent #:
9935085
Issue Dt:
04/03/2018
Application #:
15361659
Filing Dt:
11/28/2016
Publication #:
US20170077067
Pub Dt:
03/16/2017
Title:
SEMICONDUCTOR SUBSTRATES WITH UNITARY VIAS AND VIA TERMINALS, AND ASSOCIATED SYSTEMS AND METHODS
53
Patent #:
9866218
Issue Dt:
01/09/2018
Application #:
15362232
Filing Dt:
11/28/2016
Publication #:
US20170077930
Pub Dt:
03/16/2017
Title:
BOOLEAN LOGIC IN A STATE MACHINE LATTICE
54
Patent #:
9934868
Issue Dt:
04/03/2018
Application #:
15362435
Filing Dt:
11/28/2016
Publication #:
US20170076808
Pub Dt:
03/16/2017
Title:
METHODS AND APPARATUSES HAVING STRINGS OF MEMORY CELLS AND SELECT GATES WITH DOUBLE GATES
55
Patent #:
9715070
Issue Dt:
07/25/2017
Application #:
15362578
Filing Dt:
11/28/2016
Publication #:
US20170139163
Pub Dt:
05/18/2017
Title:
APPARATUS PROVIDING SIMPLIFIED ALIGNMENT OF OPTICAL FIBER IN PHOTONIC INTEGRATED CIRCUITS
56
Patent #:
10319903
Issue Dt:
06/11/2019
Application #:
15364153
Filing Dt:
11/29/2016
Publication #:
US20180151798
Pub Dt:
05/31/2018
Title:
MULTIFERROIC MAGNETIC TUNNEL JUNCTION DEVICES
57
Patent #:
9922885
Issue Dt:
03/20/2018
Application #:
15365126
Filing Dt:
11/30/2016
Title:
Semiconductor Devices Comprising Nitrogen-Doped Gate Dielectric
58
Patent #:
10027523
Issue Dt:
07/17/2018
Application #:
15365326
Filing Dt:
11/30/2016
Publication #:
US20180152330
Pub Dt:
05/31/2018
Title:
WIRELESS DEVICES AND SYSTEMS INCLUDING EXAMPLES OF MIXING INPUT DATA WITH COEFFICIENT DATA
59
Patent #:
9942074
Issue Dt:
04/10/2018
Application #:
15365397
Filing Dt:
11/30/2016
Title:
WIRELESS DEVICES AND SYSTEMS INCLUDING EXAMPLES OF MIXING COEFFICIENT DATA SPECIFIC TO A PROCESSING MODE SELECTION
60
Patent #:
10163469
Issue Dt:
12/25/2018
Application #:
15365563
Filing Dt:
11/30/2016
Publication #:
US20180151207
Pub Dt:
05/31/2018
Title:
SYSTEM AND METHOD FOR WRITE DATA BUS CONTROL IN A STACKED MEMORY DEVICE
61
Patent #:
9978437
Issue Dt:
05/22/2018
Application #:
15366198
Filing Dt:
12/01/2016
Publication #:
US20170169875
Pub Dt:
06/15/2017
Title:
APPARATUSES AND METHODS FOR DYNAMIC VOLTAGE AND FREQUENCY SWITCHING FOR DYNAMIC RANDOM ACCESS MEMORY
62
Patent #:
10585624
Issue Dt:
03/10/2020
Application #:
15366504
Filing Dt:
12/01/2016
Publication #:
US20180157439
Pub Dt:
06/07/2018
Title:
MEMORY PROTOCOL
63
Patent #:
9710192
Issue Dt:
07/18/2017
Application #:
15367631
Filing Dt:
12/02/2016
Publication #:
US20170083263
Pub Dt:
03/23/2017
Title:
APPARATUSES AND METHODS FOR PROVIDING DATA FROM A BUFFER
64
Patent #:
10062667
Issue Dt:
08/28/2018
Application #:
15368158
Filing Dt:
12/02/2016
Publication #:
US20170084585
Pub Dt:
03/23/2017
Title:
STACKED MICROFEATURE DEVICES AND ASSOCIATED METHODS
65
Patent #:
9917002
Issue Dt:
03/13/2018
Application #:
15369089
Filing Dt:
12/05/2016
Publication #:
US20170213760
Pub Dt:
07/27/2017
Title:
SEMICONDUCTOR WITH THROUGH-SUBSTRATE INTERCONNECT
66
Patent #:
9893282
Issue Dt:
02/13/2018
Application #:
15369427
Filing Dt:
12/05/2016
Publication #:
US20170133587
Pub Dt:
05/11/2017
Title:
METHODS OF FORMING RESISTIVE MEMORY ELEMENTS
67
Patent #:
9922924
Issue Dt:
03/20/2018
Application #:
15369834
Filing Dt:
12/05/2016
Title:
INTERPOSER AND SEMICONDUCTOR PACKAGE
68
Patent #:
10089242
Issue Dt:
10/02/2018
Application #:
15371044
Filing Dt:
12/06/2016
Publication #:
US20170083452
Pub Dt:
03/23/2017
Title:
MEMORY MANAGEMENT FOR A HIERARCHICAL MEMORY SYSTEM
69
Patent #:
10170448
Issue Dt:
01/01/2019
Application #:
15372246
Filing Dt:
12/07/2016
Publication #:
US20180158800
Pub Dt:
06/07/2018
Title:
APPARATUS AND METHOD OF POWER TRANSMISSION SENSING FOR STACKED DEVICES
70
Patent #:
10425064
Issue Dt:
09/24/2019
Application #:
15373158
Filing Dt:
12/08/2016
Publication #:
US20180167057
Pub Dt:
06/14/2018
Title:
APPARATUS AND METHOD FOR A PVT INDEPENDENT RC DELAY
71
Patent #:
10333693
Issue Dt:
06/25/2019
Application #:
15374831
Filing Dt:
12/09/2016
Publication #:
US20180167194
Pub Dt:
06/14/2018
Title:
WIRELESS DEVICES AND SYSTEMS INCLUDING EXAMPLES OF CROSS CORRELATING WIRELESS TRANSMISSIONS
72
Patent #:
9865812
Issue Dt:
01/09/2018
Application #:
15375457
Filing Dt:
12/12/2016
Publication #:
US20170092855
Pub Dt:
03/30/2017
Title:
METHODS OF FORMING CONDUCTIVE ELEMENTS OF SEMICONDUCTOR DEVICES AND OF FORMING MEMORY CELLS
73
Patent #:
10068947
Issue Dt:
09/04/2018
Application #:
15375507
Filing Dt:
12/12/2016
Publication #:
US20170092695
Pub Dt:
03/30/2017
Title:
ARRAYS OF MEMORY CELLS AND METHODS OF FORMING AN ARRAY OF MEMORY CELLS
74
Patent #:
11476304
Issue Dt:
10/18/2022
Application #:
15375976
Filing Dt:
12/12/2016
Publication #:
US20170092696
Pub Dt:
03/30/2017
Title:
PHASE CHANGE MEMORY DEVICE WITH VOLTAGE CONTROL ELEMENTS
75
Patent #:
9858978
Issue Dt:
01/02/2018
Application #:
15377767
Filing Dt:
12/13/2016
Publication #:
US20170263302
Pub Dt:
09/14/2017
Title:
OFFSET COMPENSATION FOR FERROELECTRIC MEMORY CELL SENSING
76
Patent #:
10257944
Issue Dt:
04/09/2019
Application #:
15378570
Filing Dt:
12/14/2016
Publication #:
US20180166811
Pub Dt:
06/14/2018
Title:
BOARD EDGE CONNECTOR
77
Patent #:
9786684
Issue Dt:
10/10/2017
Application #:
15379933
Filing Dt:
12/15/2016
Publication #:
US20170098660
Pub Dt:
04/06/2017
Title:
APPARATUSES HAVING A FERROELECTRIC FIELD-EFFECT TRANSISTOR MEMORY ARRAY AND RELATED METHOD
78
Patent #:
9905527
Issue Dt:
02/27/2018
Application #:
15380877
Filing Dt:
12/15/2016
Title:
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Title:
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Title:
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Title:
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Title:
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Assignors
1
MICRON TECHNOLOGY, INC.
Exec Dt:
07/03/2018
2
MICRON SEMICONDUCTOR PRODUCTS, INC.
Exec Dt:
07/03/2018
Assignee
1
JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
10 S. DEARBORN
7TH FLOOR
CHICAGO, ILLINOIS 60603
Correspondence name and address
MARCELA ROBLEDO
2475 HANOVER STREET
PALO ALTO, CA 94304

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