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Patent #:
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|
Issue Dt:
|
10/09/2001
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Application #:
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09575964
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Filing Dt:
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05/23/2000
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Title:
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Reduced cell voltage for memory device
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Patent #:
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|
Issue Dt:
|
07/10/2001
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Application #:
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09576018
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Filing Dt:
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05/23/2000
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Title:
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Electrode structures, display devices containing the same, and methods for making the same
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Patent #:
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|
Issue Dt:
|
10/16/2001
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Application #:
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09576445
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Filing Dt:
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05/22/2000
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Title:
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Differential correlated double sampling dram sense amplifier
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Patent #:
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|
Issue Dt:
|
05/01/2001
|
Application #:
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09576503
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Filing Dt:
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05/23/2000
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Title:
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Method and structure for improved alignment tolerance in multiple, singularized plugs
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Patent #:
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Issue Dt:
|
09/17/2002
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Application #:
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09576881
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Filing Dt:
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05/22/2000
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Title:
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TEST INTERPOSER FOR USE WITH BALL GRID ARRAY PACKAGES, ASSEMBLIES AND BALL GRID ARRAY PACKAGES INCLUDING SAME, AND METHODS
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Patent #:
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Issue Dt:
|
07/15/2003
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Application #:
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09578255
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Filing Dt:
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05/24/2000
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Title:
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APPARATUS FOR REDUCING WARPAGE DURING APPLICATION AND CURING OF ENCAPSULANT MATERIALS ON A PRINTED CIRCUIT BOARD
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Patent #:
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Issue Dt:
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04/16/2002
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Application #:
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09578778
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Filing Dt:
|
05/25/2000
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Title:
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Oscillator and switch-over control circuit for a high-voltage generator
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Patent #:
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Issue Dt:
|
11/25/2003
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Application #:
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09579333
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Filing Dt:
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05/25/2000
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Publication #:
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Pub Dt:
|
04/10/2003
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Title:
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METHODS OF CLEANING SURFACES OF COPPER-CONTAINING MATERIALS, AND METHODS OF FORMING OPENINGS TO COPPER-CONTAINING SUBSTRATES
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Patent #:
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Issue Dt:
|
08/21/2001
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Application #:
|
09579538
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Filing Dt:
|
05/24/2000
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Title:
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Microelectronic device fabricating method, method of forming a pair of conductive device components of different base widths from a common deposited conductive layer
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Patent #:
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|
Issue Dt:
|
06/24/2003
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Application #:
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09579567
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Filing Dt:
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05/26/2000
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Title:
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LEAKAGE DETECTION IN FLASH MEMORY CELL
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Patent #:
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|
Issue Dt:
|
05/08/2001
|
Application #:
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09580662
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Filing Dt:
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05/26/2000
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Title:
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Apparatus for reducing induced switching transients
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Patent #:
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|
Issue Dt:
|
04/24/2001
|
Application #:
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09580860
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Filing Dt:
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05/30/2000
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Title:
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Vertical gate transistors in pass transistor logic decode circuits
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Patent #:
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Issue Dt:
|
06/01/2004
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Application #:
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09580901
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Filing Dt:
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05/30/2000
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Title:
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STATIC PASS TRANSISTOR LOGIC WITH TRANSISTORS WITH MULTIPLE VERTICAL GATES
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Patent #:
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|
Issue Dt:
|
07/16/2002
|
Application #:
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09583584
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Filing Dt:
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05/31/2000
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Title:
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FIELD PROGRAMMABLE LOGIC ARRAYS WITH TRANSISTORS WITH VERTICAL GATES
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Patent #:
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|
Issue Dt:
|
11/08/2005
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Application #:
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09583883
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Filing Dt:
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05/31/2000
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Title:
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HIGH SPEED BUS TOPOLOGY FOR EXPANDABLE SYSTEMS
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Patent #:
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Issue Dt:
|
06/24/2003
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Application #:
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09584005
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Filing Dt:
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05/30/2000
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Title:
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SURFACE CHANNEL MOS TRANSISTORS, METHODS FOR MAKING THE SAME, AND SEMICONDUCTOR DEVICES CONTAINING THE SAME
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Patent #:
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Issue Dt:
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01/06/2004
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Application #:
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09584157
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Filing Dt:
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05/31/2000
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Title:
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MULTILEVEL COPPER INTERCONNECT WITH DOUBLE PASSIVATION
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Patent #:
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Issue Dt:
|
07/03/2001
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Application #:
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09584240
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Filing Dt:
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05/30/2000
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Title:
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Method for removing contaminants from a semiconductor wafer
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Patent #:
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|
Issue Dt:
|
06/01/2010
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Application #:
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09584520
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Filing Dt:
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05/31/2000
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Title:
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REMOTELY MANAGING AND CONTROLLING A CONSUMER APPLIANCE
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Patent #:
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Issue Dt:
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11/26/2002
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Application #:
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09584552
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Filing Dt:
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05/31/2000
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Title:
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CLEANING COMPOSITION USEFUL IN SEMICONDUCTOR INTEGRATED CIRCUIT FABRICATION
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Patent #:
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Issue Dt:
|
04/17/2001
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Application #:
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09584564
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Filing Dt:
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05/31/2000
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Title:
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Programmable memory decode circuits with transistors with vertical gates
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Patent #:
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Issue Dt:
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02/06/2007
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Application #:
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09585682
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Filing Dt:
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06/01/2000
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Title:
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SEMICONDUCTOR DEVICE HAVING A SUBSTRATE AN UNDOPED SILICON OXIDE STRUCTURE AND AN OVERLAYING DOPED SILICON OXIDE STRUCTURE WITH A SIDEWALL TERMINATING AT THE UNDOPED SILICON OXIDE STRUCTURE
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Patent #:
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Issue Dt:
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08/13/2002
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Application #:
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09585916
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Filing Dt:
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06/02/2000
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Title:
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CMOS switch circuit for transferring high voltages, in particular for line decoding in nonvolatile memories, with reduced consumption during switching
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Patent #:
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Issue Dt:
|
10/29/2002
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Application #:
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09586048
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Filing Dt:
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06/02/2000
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Title:
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GATE AREA RELIEF STRIP FOR A MOLDED I/C PACKAGE
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Patent #:
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Issue Dt:
|
08/17/2004
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Application #:
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09586050
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Filing Dt:
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06/02/2000
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Title:
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STACKABLE BALL GRID ARRAY
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Patent #:
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Issue Dt:
|
04/06/2004
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Application #:
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09586243
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Filing Dt:
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06/02/2000
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Title:
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CHIP SCALE PACKAGES FORMED BY WAFER LEVEL PROCESSING
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Patent #:
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Issue Dt:
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11/20/2001
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Application #:
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09586399
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Filing Dt:
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06/02/2000
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Title:
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Biasing stage for biasing the drain terminal of a nonvolatile memory cell during the read phase
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Patent #:
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Issue Dt:
|
07/09/2002
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Application #:
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09586952
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Filing Dt:
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06/05/2000
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Title:
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AUTOMATED COMBI DEPOSITION APPARATUS AND METHOD
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Patent #:
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Issue Dt:
|
04/03/2001
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Application #:
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09587105
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Filing Dt:
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06/01/2000
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Title:
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Methods of identifying defects in an array of memory cells and related integrated circuitry
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Patent #:
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Issue Dt:
|
08/20/2002
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Application #:
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09587190
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Filing Dt:
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06/05/2000
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Title:
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PD-SOI SUBSTRATE WITH SUPPRESSED FLOATING BODY EFFECT AND METHOD FOR ITS FABRICATION
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Patent #:
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Issue Dt:
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04/08/2003
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Application #:
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09587297
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Filing Dt:
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06/05/2000
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Title:
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OVERLAY ERROR REDUCTION BY MINIMIZATION OF UNPATTERNED WAFER AREA
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Patent #:
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Issue Dt:
|
09/09/2003
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Application #:
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09589671
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Filing Dt:
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06/07/2000
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Title:
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METHOD OF FORMING A CAPACITOR STRUCTURE
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Patent #:
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Issue Dt:
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03/26/2002
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Application #:
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09589723
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Filing Dt:
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06/08/2000
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Title:
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Reading method for non-volatile memories with sensing ratio variable with the reading voltage, and device to realize said method
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Patent #:
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Issue Dt:
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10/08/2002
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Application #:
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09589848
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Filing Dt:
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06/08/2000
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Title:
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STEREOLITHOGRAPHIC METHOD AND APPARATUS FOR FABRICATING SPACERS FOR SEMICONDUCTOR DEVICES AND RESULTING STRUCTURES
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Patent #:
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Issue Dt:
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04/15/2003
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Application #:
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09590023
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Filing Dt:
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06/07/2000
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Title:
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SEMICONDUCTOR PACKAGES AND METHODS FOR MAKING THE SAME
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Patent #:
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Issue Dt:
|
05/27/2003
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Application #:
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09590418
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Filing Dt:
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06/08/2000
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Title:
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COLLAR POSITIONABLE ABOUT A PERIPHERY OF A CONTACT PAD AND AROUND A CONDUCTIVE STRUCTURE SECURED TO THE CONTACT PADS, SEMICONDUCTOR DEVICE COMPONENTS INCLUDING SAME, AND METHODS FOR FABRICATING SAME
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Patent #:
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Issue Dt:
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11/21/2006
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Application #:
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09590527
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Filing Dt:
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06/08/2000
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Title:
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STRUCTURES FOR STABILIZING SEMICONDUCTOR DEVICES RELATIVE TO TEST SUBSTRATES AND METHODS FOR FABRICATING THE STABILIZERS
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Patent #:
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Issue Dt:
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11/12/2002
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Application #:
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09590612
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Filing Dt:
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06/09/2000
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Title:
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METHOD FOR USE OF BUS PARKING STATES TO COMMUNICATE DIAGNOSTIC INFORMATION
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Patent #:
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Issue Dt:
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11/19/2002
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Application #:
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09590791
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Filing Dt:
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06/08/2000
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Title:
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METHODS FOR FORMING AND INTEGRATED CIRCUIT STRUCTURES CONTAINING ENHANCED-SURFACE-AREA CONDUCTIVE LAYERS
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Patent #:
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Issue Dt:
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12/31/2002
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Application #:
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09591144
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Filing Dt:
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06/09/2000
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Title:
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PRE-APPLIED ADHESION PROMOTER
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Patent #:
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Issue Dt:
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05/08/2001
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Application #:
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09592057
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Filing Dt:
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06/12/2000
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Title:
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Method of constructing a wafer carrier
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Patent #:
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Issue Dt:
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05/29/2001
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Application #:
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09592356
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Filing Dt:
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06/12/2000
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Title:
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Wafer carrier having both a rigid structure and resistance to corrosive environments
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Patent #:
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Issue Dt:
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10/21/2003
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Application #:
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09592604
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Filing Dt:
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06/12/2000
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Title:
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METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS
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Patent #:
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Issue Dt:
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11/11/2003
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Application #:
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09592933
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Filing Dt:
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06/13/2000
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Title:
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REFERENCE VOLTAGE FILTER FOR MEMORY MODULES
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Patent #:
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Issue Dt:
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01/07/2003
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Application #:
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09594050
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Filing Dt:
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06/14/2000
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Title:
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TIMER CIRCUIT WITH PROGRAMMABLE DECODE CIRCUITRY
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Patent #:
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Issue Dt:
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07/16/2002
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Application #:
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09594817
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Filing Dt:
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06/16/2000
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Title:
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FERROELECTRIC MEMORY TRANSISTOR WITH HIGH-K GATE INSULATOR AND METHOD OF FABRICATION
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Patent #:
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Issue Dt:
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07/08/2003
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Application #:
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09595623
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Filing Dt:
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06/16/2000
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Title:
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METHOD AND APPARATUS FOR PACKAGING A MICROELECTRONIC DIE
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Patent #:
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Issue Dt:
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09/11/2001
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Application #:
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09595680
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Filing Dt:
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06/16/2000
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Title:
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High-voltage bidirectional switch made using high-voltage MOS transistors
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Patent #:
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Issue Dt:
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01/28/2003
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Application #:
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09595922
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Filing Dt:
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06/16/2000
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Title:
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INTERCONNECT LINE SELECTIVELY ISOLATED FROM AN UNDERLYING CONTACT PLUG
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Patent #:
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Issue Dt:
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07/29/2003
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Application #:
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09596272
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Filing Dt:
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06/16/2000
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Title:
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FORCE APPLYING PROBE CARD AND TEST SYSTEM FOR SEMICONDUCTOR WAFERS
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Patent #:
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Issue Dt:
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02/06/2001
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Application #:
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09598589
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Filing Dt:
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06/20/2000
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Title:
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Plasma producing tools, dual-source plasma etchers, dual-source plasma etching methods, and method of forming planar coil dual-source plasma etchers
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Patent #:
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Issue Dt:
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04/20/2004
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Application #:
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09598934
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Filing Dt:
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06/22/2000
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Title:
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PAD AND CODEC DETECTION
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Patent #:
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Issue Dt:
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04/24/2001
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Application #:
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09599356
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Filing Dt:
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06/21/2000
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Title:
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Flash compatible EEPROM
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Patent #:
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Issue Dt:
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07/03/2001
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Application #:
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09599557
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Filing Dt:
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06/23/2000
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Title:
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Adjustable driver pre-equalization for memory subsystems
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Patent #:
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Issue Dt:
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11/02/2004
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Application #:
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09600708
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Filing Dt:
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09/06/2000
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Title:
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FLASH MEMORY SYSTEM
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Patent #:
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Issue Dt:
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11/29/2005
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Application #:
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09601695
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Filing Dt:
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08/07/2000
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Title:
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SCHEDULING MEANS FOR DATA SWITCHING APPARATUS
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Patent #:
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Issue Dt:
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08/06/2002
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Application #:
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09602203
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Filing Dt:
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06/22/2000
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Title:
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SYSTEM AND METHOD FOR ALIGNING OUTPUT SIGNALS IN MASSIVELY PARALLEL TESTERS AND OTHER ELECTRONIC DEVICES
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Patent #:
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Issue Dt:
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11/18/2003
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Application #:
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09602381
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Filing Dt:
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06/22/2000
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Title:
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METHODS OF FORMING SILICON NITRIDE, METHODS OF FORMING TRANSISTOR DEVICES, AND TRANSISTOR DEVICES
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Patent #:
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Issue Dt:
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12/21/2004
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Application #:
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09602395
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Filing Dt:
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06/22/2000
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Title:
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METHODS OF FORMING OXIDE REGIONS OVER SEMICONDUCTOR SUBSTRATES
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Patent #:
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Issue Dt:
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09/04/2001
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Application #:
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09602669
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Filing Dt:
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06/26/2000
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Title:
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Voltage regulator for single feed voltage memory circuits, and flash type memory in particular
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Patent #:
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Issue Dt:
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09/24/2002
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Application #:
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09602680
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Filing Dt:
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06/26/2000
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Title:
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NONVOLATILE MEMORY DEVICE WITH HIERARCHICAL SECTOR DECODING
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Patent #:
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Issue Dt:
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11/08/2005
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Application #:
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09602901
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Filing Dt:
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06/23/2000
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Title:
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APPARATUS AND METHOD FOR DYNAMICALLY DISABLING FAULTY EMBEDDED MEMORY IN A GRAPHIC PROCESSING SYSTEM
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Patent #:
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Issue Dt:
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12/25/2001
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Application #:
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09603275
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Filing Dt:
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06/26/2000
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Title:
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Circuit for reading a semiconductor memory
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Patent #:
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Issue Dt:
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08/07/2001
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Application #:
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09603848
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Filing Dt:
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06/26/2000
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Title:
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Semiconductor processing method and trench isolation method
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Patent #:
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Issue Dt:
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10/16/2012
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Application #:
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09605293
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Filing Dt:
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06/28/2000
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Title:
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SEMICONDUCTOR DEVICES INCLUDING A LAYER OF POLYCRYSTALLINE SILICON HAVING A SMOOTH MORPHOLOGY
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Patent #:
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Issue Dt:
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08/13/2002
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Application #:
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09605580
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Filing Dt:
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06/28/2000
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Title:
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METHOD AND APPARATUS FOR MARKING MICROELECTRONIC DIES AND MICROELECTRONIC DEVICES
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Patent #:
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Issue Dt:
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04/02/2002
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Application #:
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09605582
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Filing Dt:
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06/28/2000
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Title:
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Method and apparatus for reduced flash encapsulation of microelectronic devices
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Issue Dt:
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06/10/2003
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Application #:
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09606428
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Filing Dt:
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06/28/2000
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Title:
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RECESSED ENCAPSULATED MICROELECTRONIC DEVICES AND METHODS FOR FORMATION
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Patent #:
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Issue Dt:
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04/22/2003
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Application #:
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09606432
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Filing Dt:
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06/28/2000
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Title:
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STACKED-DIE ASSEMBLIES WITH A PLURALITY OF MICROELECTRONIC DEVICES AND METHODS OF MANUFACTURE
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Patent #:
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Issue Dt:
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08/14/2001
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Application #:
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09606480
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Filing Dt:
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06/29/2000
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Title:
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Multi-chip module with stacked dice
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Patent #:
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Issue Dt:
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04/16/2002
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Application #:
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09606754
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Filing Dt:
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06/29/2000
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Title:
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Voltage and temperature compensated ring oscillator frequency stabilizer
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Patent #:
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Issue Dt:
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08/13/2002
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Application #:
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09606969
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Filing Dt:
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06/28/2000
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Title:
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METHODOLOGY OF REMOVING MISPLACED ENCAPSULANT FOR ATTACHMENT OF HEAT SINKS IN A CHIP ON BOARD PACKAGE
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Patent #:
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Issue Dt:
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02/24/2004
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Application #:
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09607846
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Filing Dt:
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06/30/2000
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Title:
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HARDWARE INITIALIZATION OF A SYNCHRONOUS MEMORY
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Issue Dt:
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05/21/2002
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Application #:
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09608239
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Filing Dt:
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06/30/2000
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Title:
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METHOD AND APPARATUS FOR GENERATING FROM A SINGLE SUPPLY LINE VOLTAGES INTERNAL TO A FLASH MEMORY WITH REDUCED SETTLING TIMES
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Patent #:
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Issue Dt:
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06/19/2001
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Application #:
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09608445
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Filing Dt:
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06/29/2000
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Title:
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Voltage regulating circuit for a capacitive load
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Patent #:
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Issue Dt:
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01/13/2004
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Application #:
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09608544
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Filing Dt:
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06/30/2000
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Title:
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METHOD AND APPARATUS FOR APPENDING MEMORY COMMANDS DURING A DIRECT MEMORY ACCESS OPERATION
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Patent #:
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Issue Dt:
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07/03/2007
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09608616
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Filing Dt:
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06/30/2000
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Title:
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USER TRANSPARENT CONTINUOUS COMPILATION
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Issue Dt:
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01/14/2003
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Application #:
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09608847
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Filing Dt:
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06/29/2000
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Title:
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METHOD AND A DEVICE FOR MEASURING AN ANALOG VOLTAGE IN A NON-VOLATILE MEMORY
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Patent #:
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Issue Dt:
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04/29/2008
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Application #:
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09609496
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Filing Dt:
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06/30/2000
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Title:
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METHODS AND APPARATUS FOR FAST ARGUMENT REDUCTION IN A COMPUTING SYSTEM
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Patent #:
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Issue Dt:
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11/20/2001
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Application #:
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09610373
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Filing Dt:
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07/05/2000
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Title:
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LOW VOLTAGE LEVEL POWER-UP DETECTION CIRCUIT
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Patent #:
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Issue Dt:
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07/17/2001
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Application #:
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09610545
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Filing Dt:
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06/30/2000
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Title:
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Space management for managing high capacity nonvolatile memory
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Patent #:
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Issue Dt:
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07/10/2001
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Application #:
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09610760
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Filing Dt:
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07/06/2000
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Title:
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Method and apparatus for minimization of data line coupling in a semiconductor memory device
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Patent #:
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Issue Dt:
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04/13/2004
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Application #:
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09611676
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Filing Dt:
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07/07/2000
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Title:
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FLASH MEMORY ARCHITECTURE IMPLEMENTING SIMULTANEOUSLY PROGRAMMABLE MULTIPLE FLASH MEMORY BANKS THAT ARE HOST COMPATIBLE
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Patent #:
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Issue Dt:
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06/18/2002
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Application #:
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09611720
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Filing Dt:
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07/05/2000
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Title:
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RADIO FREQUENCY AMPLIFIER
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Patent #:
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Issue Dt:
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09/25/2001
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Application #:
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09611769
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Filing Dt:
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07/06/2000
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Title:
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Voltage pump with diode for pre-charge
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Patent #:
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Issue Dt:
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11/19/2002
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Application #:
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09612155
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Filing Dt:
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07/07/2000
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Title:
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METHOD AND APPARATUS FOR PCB ARRAY WITH COMPENSATED SIGNAL PROPAGATION
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Patent #:
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Issue Dt:
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08/06/2002
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Application #:
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09614117
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Filing Dt:
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07/11/2000
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Title:
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SOI DRAM WITH BURIED CAPACITOR UNDER THE DIGIT LINES UTILIZING A SELF ALIGNING PENETRATING STORAGE NODE CONTACT FORMATION
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Patent #:
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Issue Dt:
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10/15/2002
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Application #:
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09614119
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Filing Dt:
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07/11/2000
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Title:
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DRAM SENSE AMPLIFIER HAVING PRE-CHARGED TRANSISTOR BODY NODES
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Patent #:
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Issue Dt:
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11/26/2002
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Application #:
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09614359
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Filing Dt:
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07/12/2000
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Title:
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METHODS OF MASKING AND ETCHING A SEMICONDUCTOR SUBSTRATE, AND ION IMPLANT LITHOGRAPHY METHODS OF PROCESSING A SEMICONDUCTOR SUBSTRATE
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Patent #:
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Issue Dt:
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07/10/2001
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Application #:
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09614403
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Filing Dt:
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07/12/2000
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Title:
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Transverse hybrid loc package
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Patent #:
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Issue Dt:
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02/25/2003
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Application #:
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09615009
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Filing Dt:
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07/12/2000
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Title:
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DIE TO DIE CONNECTION METHOD AND ASSEMBLIES AND PACKAGES INCLUDING DICE SO CONNECTED
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Patent #:
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Issue Dt:
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08/27/2002
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Application #:
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09616540
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Filing Dt:
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07/14/2000
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Title:
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METHOD OF CONTROLLING OUTDIFFUSION IN A DOPED THREE-DIMENSIONAL FILM
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Patent #:
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Issue Dt:
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04/01/2003
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Application #:
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09616959
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Filing Dt:
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07/13/2000
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Title:
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"SEMICONDUCTOR PROCESSING METHOD OF FORMING FIELD EFFECT TRANSISTORS"
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Patent #:
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Issue Dt:
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04/08/2003
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Application #:
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09617967
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Filing Dt:
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10/02/2000
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Title:
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METHOD OF SUPPRESSING VOID FORMATION IN A METAL LINE
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Patent #:
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Issue Dt:
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12/10/2002
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Application #:
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09618237
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Filing Dt:
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07/18/2000
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Title:
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Magneto-resistive memory array
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Patent #:
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Issue Dt:
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05/28/2002
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Application #:
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09618256
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Filing Dt:
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07/17/2000
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Title:
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Magneto-resistive memory having sense amplifier with offset control
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Patent #:
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Issue Dt:
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12/30/2003
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Application #:
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09618492
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Filing Dt:
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07/18/2000
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Title:
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MEMORY REDUNDANCY WITH PROGRAMMABLE NON-VOLATILE CONTROL
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Patent #:
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Issue Dt:
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10/01/2002
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Application #:
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09619449
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Filing Dt:
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07/19/2000
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Title:
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DEPOSITION METHODS
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Patent #:
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Issue Dt:
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08/27/2002
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Application #:
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09619589
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Filing Dt:
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07/19/2000
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Title:
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NON-VOLATILE MEMORY WITH FUNCTIONAL CAPABILITY OF BURST MODE READ AND PAGE MODE READ DURING SUSPENSION OF AN OPERATION OF ELECTRICAL ALTERATION
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Patent #:
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Issue Dt:
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09/11/2001
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Application #:
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09619777
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Filing Dt:
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07/20/2000
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Title:
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Method for simultaneous dopant driving and dielectric densification in making a semiconductor structure
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