|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/17/2020
|
Application #:
|
15925536
|
Filing Dt:
|
03/19/2018
|
|
Publication #:
|
|
Pub Dt:
|
09/19/2019
| | | | |
|
Title:
|
SELF-SELECTING MEMORY ARRAY WITH HORIZONTAL BIT LINES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/07/2020
|
Application #:
|
15926427
|
Filing Dt:
|
03/20/2018
|
|
Publication #:
|
|
Pub Dt:
|
06/27/2019
| | | | |
|
Title:
|
Assemblies Comprising Memory Cells and Select Gates
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/13/2018
|
Application #:
|
15926505
|
Filing Dt:
|
03/20/2018
|
|
Publication #:
|
|
Pub Dt:
|
11/08/2018
| | | | |
|
Title:
|
STRUCTURE OF INTEGRATED CIRCUITRY AND A METHOD OF FORMING A CONDUCTIVE VIA
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/27/2019
|
Application #:
|
15926548
|
Filing Dt:
|
03/20/2018
|
|
Title:
|
BOOSTED HIGH-SPEED LEVEL SHIFTER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/23/2020
|
Application #:
|
15926661
|
Filing Dt:
|
03/20/2018
|
|
Publication #:
|
|
Pub Dt:
|
09/26/2019
| | | | |
|
Title:
|
RE-ROUTING AUTONOMOUS VEHICLES USING DYNAMIC ROUTING AND MEMORY MANAGEMENT FOR BORDER SECURITY PURPOSES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/13/2020
|
Application #:
|
15926973
|
Filing Dt:
|
03/20/2018
|
|
Publication #:
|
|
Pub Dt:
|
09/26/2019
| | | | |
|
Title:
|
HIERARCHICAL BUFFERING SCHEME TO NORMALIZE NON-VOLATILE MEDIA RAW BIT ERROR RATE TRANSIENTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/13/2019
|
Application #:
|
15926986
|
Filing Dt:
|
03/20/2018
|
|
Title:
|
CONVERGED STRUCTURE SUPPORTING BUFFERING OF RECENT WRITES AND OVERWRITE DISTURB REMEDIATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/20/2019
|
Application #:
|
15927150
|
Filing Dt:
|
03/21/2018
|
|
Publication #:
|
|
Pub Dt:
|
07/26/2018
| | | | |
|
Title:
|
CHARGE PUMPS AND METHODS OF OPERATING CHARGE PUMPS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/07/2020
|
Application #:
|
15927339
|
Filing Dt:
|
03/21/2018
|
|
Publication #:
|
|
Pub Dt:
|
09/26/2019
| | | | |
|
Title:
|
LATENCY-BASED STORAGE IN A HYBRID MEMORY SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/20/2020
|
Application #:
|
15927383
|
Filing Dt:
|
03/21/2018
|
|
Publication #:
|
|
Pub Dt:
|
09/26/2019
| | | | |
|
Title:
|
LATENCY-BASED STORAGE IN A HYBRID MEMORY SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/07/2020
|
Application #:
|
15927530
|
Filing Dt:
|
03/21/2018
|
|
Publication #:
|
|
Pub Dt:
|
09/26/2019
| | | | |
|
Title:
|
LATENCY-BASED STORAGE IN A HYBRID MEMORY SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/09/2019
|
Application #:
|
15927679
|
Filing Dt:
|
03/21/2018
|
|
Publication #:
|
|
Pub Dt:
|
12/27/2018
| | | | |
|
Title:
|
MEMORY DEVICES AND METHODS FOR MANAGING ERROR REGIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/19/2021
|
Application #:
|
15927916
|
Filing Dt:
|
03/21/2018
|
|
Publication #:
|
|
Pub Dt:
|
09/26/2019
| | | | |
|
Title:
|
Personalization of a Vehicle Based on User Settings
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/15/2021
|
Application #:
|
15928410
|
Filing Dt:
|
03/22/2018
|
|
Publication #:
|
|
Pub Dt:
|
09/26/2019
| | | | |
|
Title:
|
Integrated Circuit Constructions Comprising Memory And Methods Used In The Formation Of Integrated Circuitry Comprising Memory
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/31/2020
|
Application #:
|
15928831
|
Filing Dt:
|
03/22/2018
|
|
Publication #:
|
|
Pub Dt:
|
09/26/2019
| | | | |
|
Title:
|
SUB-THRESHOLD VOLTAGE LEAKAGE CURRENT TRACKING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/01/2019
|
Application #:
|
15928856
|
Filing Dt:
|
03/22/2018
|
|
Publication #:
|
|
Pub Dt:
|
10/25/2018
| | | | |
|
Title:
|
BOOSTED CHANNEL PROGRAMMING OF MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/12/2019
|
Application #:
|
15928956
|
Filing Dt:
|
03/22/2018
|
|
Title:
|
Arrays Of Memory Cells Individually Comprising A Capacitor And A Transistor And Methods Of Forming Such Arrays
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/18/2020
|
Application #:
|
15933087
|
Filing Dt:
|
03/22/2018
|
|
Publication #:
|
|
Pub Dt:
|
09/26/2019
| | | | |
|
Title:
|
MEMORY BLOCK SELECT CIRCUITRY INCLUDING VOLTAGE BOOTSTRAPPING CONTROL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/18/2018
|
Application #:
|
15933167
|
Filing Dt:
|
03/22/2018
|
|
Publication #:
|
|
Pub Dt:
|
07/26/2018
| | | | |
|
Title:
|
APPARATUSES AND METHODS FOR STORING AND WRITING MULTIPLE PARAMETER CODES FOR MEMORY OPERATING PARAMETERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/08/2019
|
Application #:
|
15933218
|
Filing Dt:
|
03/22/2018
|
|
Publication #:
|
|
Pub Dt:
|
06/27/2019
| | | | |
|
Title:
|
Memory Arrays, and Methods of Forming Memory Arrays
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/01/2020
|
Application #:
|
15933260
|
Filing Dt:
|
03/22/2018
|
|
Publication #:
|
|
Pub Dt:
|
09/26/2019
| | | | |
|
Title:
|
POWER MANAGEMENT, DYNAMIC ROUTING AND MEMORY MANAGEMENT FOR AUTONOMOUS DRIVING VEHICLES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/04/2018
|
Application #:
|
15933498
|
Filing Dt:
|
03/23/2018
|
|
Publication #:
|
|
Pub Dt:
|
07/26/2018
| | | | |
|
Title:
|
APPARATUS CONFIGURED TO PROGRAM MEMORY CELLS USING AN INTERMEDIATE LEVEL FOR MULTIPLE DATA STATES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/12/2019
|
Application #:
|
15933678
|
Filing Dt:
|
03/23/2018
|
|
Publication #:
|
|
Pub Dt:
|
09/26/2019
| | | | |
|
Title:
|
METHODS FOR DETECTING AND MITIGATING MEMORY MEDIA DEGRADATION AND MEMORY DEVICES EMPLOYING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/05/2020
|
Application #:
|
15933687
|
Filing Dt:
|
03/23/2018
|
|
Publication #:
|
|
Pub Dt:
|
09/26/2019
| | | | |
|
Title:
|
MEMORY WITH NON-VOLATILE CONFIGURATIONS FOR EFFICIENT POWER MANAGEMENT AND OPERATION OF THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/04/2018
|
Application #:
|
15933820
|
Filing Dt:
|
03/23/2018
|
|
Publication #:
|
|
Pub Dt:
|
07/26/2018
| | | | |
|
Title:
|
HYBRID MEMORY DRIVES, COMPUTER SYSTEM, AND RELATED METHOD FOR OPERATING A MULTI-MODE HYBRID DRIVE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/13/2018
|
Application #:
|
15934663
|
Filing Dt:
|
03/23/2018
|
|
Title:
|
OUTPUT IMPEDANCE CALIBRATION FOR SIGNALING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/01/2019
|
Application #:
|
15935126
|
Filing Dt:
|
03/26/2018
|
|
Publication #:
|
|
Pub Dt:
|
07/26/2018
| | | | |
|
Title:
|
APPARATUS AND METHODS OF OPERATING MEMORY FOR NEGATIVE GATE TO BODY CONDITIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/19/2020
|
Application #:
|
15936033
|
Filing Dt:
|
03/26/2018
|
|
Publication #:
|
|
Pub Dt:
|
08/09/2018
| | | | |
|
Title:
|
APPARATUS PROVIDING SIMPLIFIED ALIGNMENT OF OPTICAL FIBER IN PHOTONIC INTEGRATED CIRCUITS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/04/2019
|
Application #:
|
15936715
|
Filing Dt:
|
03/27/2018
|
|
Publication #:
|
|
Pub Dt:
|
07/26/2018
| | | | |
|
Title:
|
PACKAGED SEMICONDUCTOR COMPONENTS HAVING SUBSTANTIALLY RIGID SUPPORT MEMBERS AND METHODS OF PACKAGING SEMICONDUCTOR COMPONENTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/31/2023
|
Application #:
|
15937146
|
Filing Dt:
|
03/27/2018
|
|
Publication #:
|
|
Pub Dt:
|
10/03/2019
| | | | |
|
Title:
|
SPECIFYING MEDIA TYPE IN WRITE COMMANDS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/02/2019
|
Application #:
|
15937552
|
Filing Dt:
|
03/27/2018
|
|
Title:
|
APPARATUSES AND METHODS FOR PROVIDING CLOCK SIGNALS IN A SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/24/2019
|
Application #:
|
15938305
|
Filing Dt:
|
03/28/2018
|
|
Publication #:
|
|
Pub Dt:
|
08/02/2018
| | | | |
|
Title:
|
METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE ASSEMBLY WITH THROUGH-MOLD COOLING CHANNEL FORMED IN ENCAPSULANT
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
15938504
|
Filing Dt:
|
03/28/2018
|
|
Publication #:
|
|
Pub Dt:
|
10/03/2019
| | | | |
|
Title:
|
Black Box Data Recorder with Artificial Intelligence Processor in Autonomous Driving Vehicle
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/11/2021
|
Application #:
|
15938819
|
Filing Dt:
|
03/28/2018
|
|
Publication #:
|
|
Pub Dt:
|
10/03/2019
| | | | |
|
Title:
|
METHODS AND APPARATUSES FOR ALIGNING READ DATA IN A STACKED SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
15938965
|
Filing Dt:
|
03/28/2018
|
|
Publication #:
|
|
Pub Dt:
|
10/03/2019
| | | | |
|
Title:
|
APPARATUSES AND METHODS FOR COUPLING DATA LINES IN MEMORY DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/16/2021
|
Application #:
|
15938977
|
Filing Dt:
|
03/28/2018
|
|
Publication #:
|
|
Pub Dt:
|
10/03/2019
| | | | |
|
Title:
|
MEMORY MANAGEMENT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/20/2019
|
Application #:
|
15939459
|
Filing Dt:
|
03/29/2018
|
|
Publication #:
|
|
Pub Dt:
|
08/02/2018
| | | | |
|
Title:
|
MEMORY DEVICE CONFIGURATION COMMANDS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/10/2019
|
Application #:
|
15939939
|
Filing Dt:
|
03/29/2018
|
|
Publication #:
|
|
Pub Dt:
|
08/09/2018
| | | | |
|
Title:
|
METHODS OF FORMING ELECTRONIC DEVICES INCLUDING MAGNETIC CELL CORE STRUCTURES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/01/2019
|
Application #:
|
15940351
|
Filing Dt:
|
03/29/2018
|
|
Publication #:
|
|
Pub Dt:
|
08/02/2018
| | | | |
|
Title:
|
BUFFER OPERATIONS IN MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/19/2019
|
Application #:
|
15941532
|
Filing Dt:
|
03/30/2018
|
|
Publication #:
|
|
Pub Dt:
|
08/09/2018
| | | | |
|
Title:
|
WIRELESS DEVICES AND SYSTEMS INCLUDING EXAMPLES OF MIXING COEFFICIENT DATA SPECIFIC TO A PROCESSING MODE SELECTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/07/2020
|
Application #:
|
15941611
|
Filing Dt:
|
03/30/2018
|
|
Publication #:
|
|
Pub Dt:
|
08/09/2018
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE ASSEMBLY WITH THROUGH-PACKAGE INTERCONNECT AND ASSOCIATED SYSTEMS, DEVICES, AND METHODS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/28/2020
|
Application #:
|
15941896
|
Filing Dt:
|
03/30/2018
|
|
Publication #:
|
|
Pub Dt:
|
08/09/2018
| | | | |
|
Title:
|
APPARATUSES AND METHODS FOR COMPARING DATA PATTERNS IN MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/13/2018
|
Application #:
|
15941964
|
Filing Dt:
|
03/30/2018
|
|
Publication #:
|
|
Pub Dt:
|
09/20/2018
| | | | |
|
Title:
|
APPARATUSES AND METHODS FOR PARTIAL BIT DE-EMPHASIS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/09/2019
|
Application #:
|
15942938
|
Filing Dt:
|
04/02/2018
|
|
Publication #:
|
|
Pub Dt:
|
08/09/2018
| | | | |
|
Title:
|
APPARATUSES INCLUDING BURIED DIGIT LINES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/01/2020
|
Application #:
|
15942997
|
Filing Dt:
|
04/02/2018
|
|
Publication #:
|
|
Pub Dt:
|
10/03/2019
| | | | |
|
Title:
|
Resource Allocation in Memory Systems based on Operation Modes
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/27/2020
|
Application #:
|
15943227
|
Filing Dt:
|
04/02/2018
|
|
Publication #:
|
|
Pub Dt:
|
08/09/2018
| | | | |
|
Title:
|
Adaptive Rate Compression Hash Processor
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/03/2019
|
Application #:
|
15943230
|
Filing Dt:
|
04/02/2018
|
|
Publication #:
|
|
Pub Dt:
|
10/03/2019
| | | | |
|
Title:
|
Grouping Requests to Reduce Inter-Process Communication in Memory Systems
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/09/2020
|
Application #:
|
15943296
|
Filing Dt:
|
04/02/2018
|
|
Publication #:
|
|
Pub Dt:
|
10/03/2019
| | | | |
|
Title:
|
Optimization of Memory Systems based on Performance Goals
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/25/2019
|
Application #:
|
15944270
|
Filing Dt:
|
04/03/2018
|
|
Publication #:
|
|
Pub Dt:
|
08/09/2018
| | | | |
|
Title:
|
Memory Cells Comprising A Programmable Field Effect Transistor Having A Reversibly Programmable Gate Insulator
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/03/2020
|
Application #:
|
15944455
|
Filing Dt:
|
04/03/2018
|
|
Publication #:
|
|
Pub Dt:
|
10/11/2018
| | | | |
|
Title:
|
MEMORY DEVICE LOOPBACK SYSTEMS AND METHODS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/10/2019
|
Application #:
|
15944497
|
Filing Dt:
|
04/03/2018
|
|
Publication #:
|
|
Pub Dt:
|
10/03/2019
| | | | |
|
Title:
|
APPARATUSES AND METHODS FOR COUPLING CONTACT PADS TO A CIRCUIT IN A SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/17/2019
|
Application #:
|
15945215
|
Filing Dt:
|
04/04/2018
|
|
Publication #:
|
|
Pub Dt:
|
08/09/2018
| | | | |
|
Title:
|
Integrated Structures Comprising Channel Material Extending into source material
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/16/2019
|
Application #:
|
15945316
|
Filing Dt:
|
04/04/2018
|
|
Publication #:
|
|
Pub Dt:
|
08/09/2018
| | | | |
|
Title:
|
CONFIGURABLE OPERATING MODE MEMORY DEVICE AND METHODS OF OPERATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/23/2019
|
Application #:
|
15945343
|
Filing Dt:
|
04/04/2018
|
|
Publication #:
|
|
Pub Dt:
|
08/09/2018
| | | | |
|
Title:
|
APPARATUSES AND METHODS FOR REFRESH CONTROL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/22/2022
|
Application #:
|
15945533
|
Filing Dt:
|
04/04/2018
|
|
Publication #:
|
|
Pub Dt:
|
10/10/2019
| | | | |
|
Title:
|
Determination of Workload Distribution across Processors in a Memory System
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/21/2020
|
Application #:
|
15946139
|
Filing Dt:
|
04/05/2018
|
|
Publication #:
|
|
Pub Dt:
|
10/10/2019
| | | | |
|
Title:
|
THROUGH-CORE VIA
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/24/2020
|
Application #:
|
15946456
|
Filing Dt:
|
04/05/2018
|
|
Publication #:
|
|
Pub Dt:
|
10/10/2019
| | | | |
|
Title:
|
METHODS AND APPARATUSES FOR SELF-TRIMMING OF A SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/26/2019
|
Application #:
|
15946957
|
Filing Dt:
|
04/06/2018
|
|
Publication #:
|
|
Pub Dt:
|
08/16/2018
| | | | |
|
Title:
|
MEMORY DEVICE AND METHOD HAVING ON-BOARD PROCESSING LOGIC FOR FACILITATING INTERFACE WITH MULTIPLE PROCESSORS, AND COMPUTER SYSTEM USING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/21/2021
|
Application #:
|
15947428
|
Filing Dt:
|
04/06/2018
|
|
Publication #:
|
|
Pub Dt:
|
10/10/2019
| | | | |
|
Title:
|
Meta Data Protection against Unexpected Power Loss in a Memory System
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/06/2019
|
Application #:
|
15948422
|
Filing Dt:
|
04/09/2018
|
|
Title:
|
TECHNIQUES FOR CLOCK SIGNAL JITTER GENERATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/03/2019
|
Application #:
|
15948585
|
Filing Dt:
|
04/09/2018
|
|
Title:
|
POST-PACKAGING REPAIR OF REDUNDANT ROWS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/03/2019
|
Application #:
|
15948639
|
Filing Dt:
|
04/09/2018
|
|
Publication #:
|
|
Pub Dt:
|
06/27/2019
| | | | |
|
Title:
|
Memory Arrays
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/01/2019
|
Application #:
|
15948740
|
Filing Dt:
|
04/09/2018
|
|
Publication #:
|
|
Pub Dt:
|
08/09/2018
| | | | |
|
Title:
|
STRUCTURE AND METHODS OF FORMING THE STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/04/2019
|
Application #:
|
15950041
|
Filing Dt:
|
04/10/2018
|
|
Title:
|
APPARATUSES AND METHODS FOR INPUT SIGNAL RECEIVER CIRCUITS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/08/2019
|
Application #:
|
15950131
|
Filing Dt:
|
04/10/2018
|
|
Publication #:
|
|
Pub Dt:
|
10/10/2019
| | | | |
|
Title:
|
AREA EFFICIENT IMPLEMENTATION OF A PRODUCT CODE ERROR CORRECTING CODE DECODER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/24/2020
|
Application #:
|
15950137
|
Filing Dt:
|
04/10/2018
|
|
Publication #:
|
|
Pub Dt:
|
10/10/2019
| | | | |
|
Title:
|
HIGH THROUGHPUT BIT CORRECTION OF DATA INSIDE A WORD BUFFER FOR A PRODUCT CODE DECODER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/07/2019
|
Application #:
|
15951006
|
Filing Dt:
|
04/11/2018
|
|
Publication #:
|
|
Pub Dt:
|
10/11/2018
| | | | |
|
Title:
|
COMPENSATING FOR VARIATIONS IN SELECTOR THRESHOLD VOLTAGES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/04/2021
|
Application #:
|
15951087
|
Filing Dt:
|
04/11/2018
|
|
Publication #:
|
|
Pub Dt:
|
10/17/2019
| | | | |
|
Title:
|
Determining Autonomous Vehicle Status Based on Mapping of Crowdsourced Object Data
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/28/2020
|
Application #:
|
15951896
|
Filing Dt:
|
04/12/2018
|
|
Publication #:
|
|
Pub Dt:
|
10/17/2019
| | | | |
|
Title:
|
COMMAND SELECTION POLICY WITH READ PRIORITY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/23/2024
|
Application #:
|
15952087
|
Filing Dt:
|
04/12/2018
|
|
Publication #:
|
|
Pub Dt:
|
10/17/2019
| | | | |
|
Title:
|
Address Map Caching for a Memory System
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/15/2020
|
Application #:
|
15952166
|
Filing Dt:
|
04/12/2018
|
|
Publication #:
|
|
Pub Dt:
|
10/17/2019
| | | | |
|
Title:
|
Defective Memory Unit Screening in a Memory System
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/30/2019
|
Application #:
|
15952507
|
Filing Dt:
|
04/13/2018
|
|
Publication #:
|
|
Pub Dt:
|
08/16/2018
| | | | |
|
Title:
|
MAGNETORESISTIVE STRUCTURES, SEMICONDUCTOR DEVICES, AND RELATED SYSTEMS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/15/2021
|
Application #:
|
15952569
|
Filing Dt:
|
04/13/2018
|
|
Publication #:
|
|
Pub Dt:
|
10/17/2019
| | | | |
|
Title:
|
CLOCK CHARACTERISTIC DETERMINATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/30/2020
|
Application #:
|
15954149
|
Filing Dt:
|
04/16/2018
|
|
Publication #:
|
|
Pub Dt:
|
08/16/2018
| | | | |
|
Title:
|
DATA ENCODING USING SPARE CHANNELS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/02/2018
|
Application #:
|
15954282
|
Filing Dt:
|
04/16/2018
|
|
Publication #:
|
|
Pub Dt:
|
08/16/2018
| | | | |
|
Title:
|
APPARATUS, SYSTEMS, AND METHODS TO OPERATE A MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/23/2021
|
Application #:
|
15954328
|
Filing Dt:
|
04/16/2018
|
|
Publication #:
|
|
Pub Dt:
|
08/16/2018
| | | | |
|
Title:
|
MOLDING COMPOUND INCLUDING A CARBON NANO-TUBE DISPERSION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/31/2020
|
Application #:
|
15955330
|
Filing Dt:
|
04/17/2018
|
|
Publication #:
|
|
Pub Dt:
|
08/22/2019
| | | | |
|
Title:
|
TIMING CIRCUIT FOR COMMAND PATH IN A MEMORY DEVICE
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
15956601
|
Filing Dt:
|
04/18/2018
|
|
Publication #:
|
|
Pub Dt:
|
08/23/2018
| | | | |
|
Title:
|
APPARATUSES AND METHODS FOR DUTY CYCLE ADJUSTMENT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/06/2020
|
Application #:
|
15957098
|
Filing Dt:
|
04/19/2018
|
|
Publication #:
|
|
Pub Dt:
|
10/24/2019
| | | | |
|
Title:
|
PERMUTATION CODING FOR IMPROVED MEMORY CELL OPERATIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/24/2019
|
Application #:
|
15957173
|
Filing Dt:
|
04/19/2018
|
|
Title:
|
APPARATUSES AND METHODS FOR SENSING MEMORY CELLS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/09/2019
|
Application #:
|
15957589
|
Filing Dt:
|
04/19/2018
|
|
Title:
|
Integrated Assemblies, and Methods of Forming Integrated Assemblies
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/19/2019
|
Application #:
|
15957594
|
Filing Dt:
|
04/19/2018
|
|
Publication #:
|
|
Pub Dt:
|
10/24/2019
| | | | |
|
Title:
|
METHODS OF FORMING Si3NX, METHODS OF FORMING INSULATOR MATERIAL BETWEEN A CONTROL GATE AND CHARGE-STORAGE MATERIAL OF A PROGRAMMABLE CHARGE-STORAGE TRANSISTOR, AND METHODS OF FORMING AN ARRAY OF ELEVATIONALLY-EXTENDING STRINGS OF MEMORY CELLS AND A PROGRAMMABLE CHARGE-STORAGE TRANSISTOR MANUFACTURED IN ACCORDANCE WITH METHODS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/31/2019
|
Application #:
|
15957631
|
Filing Dt:
|
04/19/2018
|
|
Publication #:
|
|
Pub Dt:
|
10/24/2019
| | | | |
|
Title:
|
Systems and Methods for Automatically Warning nearby Vehicles of Potential Hazards
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/02/2020
|
Application #:
|
15957742
|
Filing Dt:
|
04/19/2018
|
|
Publication #:
|
|
Pub Dt:
|
10/25/2018
| | | | |
|
Title:
|
MULTI-STAGE MEMORY SENSING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/15/2019
|
Application #:
|
15957790
|
Filing Dt:
|
04/19/2018
|
|
Publication #:
|
|
Pub Dt:
|
10/24/2019
| | | | |
|
Title:
|
SENSE AMPLIFIER WITH LOWER OFFSET AND INCREASED SPEED
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/04/2020
|
Application #:
|
15958401
|
Filing Dt:
|
04/20/2018
|
|
Publication #:
|
|
Pub Dt:
|
10/24/2019
| | | | |
|
Title:
|
TRANSACTION METADATA
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/31/2020
|
Application #:
|
15958496
|
Filing Dt:
|
04/20/2018
|
|
Publication #:
|
|
Pub Dt:
|
10/24/2019
| | | | |
|
Title:
|
ERROR CORRECTION USING HIERARCHICAL DECODERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/21/2020
|
Application #:
|
15958506
|
Filing Dt:
|
04/20/2018
|
|
Publication #:
|
|
Pub Dt:
|
10/24/2019
| | | | |
|
Title:
|
APPARATUSES AND METHODS FOR IMPLEMENTING ACCESS LINE LOADS FOR SENSE AMPLIFIERS FOR OPEN ACCESS LINE SENSING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/21/2020
|
Application #:
|
15958614
|
Filing Dt:
|
04/20/2018
|
|
Publication #:
|
|
Pub Dt:
|
10/24/2019
| | | | |
|
Title:
|
APPARATUSES AND METHODS FOR COUNTER UPDATE OPERATIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/15/2020
|
Application #:
|
15958973
|
Filing Dt:
|
04/20/2018
|
|
Publication #:
|
|
Pub Dt:
|
10/24/2019
| | | | |
|
Title:
|
ACCESS SCHEMES FOR PROTECTING STORED DATA IN A MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/29/2021
|
Application #:
|
15959868
|
Filing Dt:
|
04/23/2018
|
|
Publication #:
|
|
Pub Dt:
|
10/24/2019
| | | | |
|
Title:
|
NON-VOLATILE MEMORY DEVICES AND SYSTEMS WITH VOLATILE MEMORY FEATURES AND METHODS FOR OPERATING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/15/2019
|
Application #:
|
15959921
|
Filing Dt:
|
04/23/2018
|
|
Publication #:
|
|
Pub Dt:
|
10/24/2019
| | | | |
|
Title:
|
NON-VOLATILE MEMORY DEVICES AND SYSTEMS WITH READ-ONLY MEMORY FEATURES AND METHODS FOR OPERATING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/11/2018
|
Application #:
|
15959978
|
Filing Dt:
|
04/23/2018
|
|
Publication #:
|
|
Pub Dt:
|
08/23/2018
| | | | |
|
Title:
|
ERROR CODE CALCULATION ON SENSING CIRCUITRY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/19/2020
|
Application #:
|
15960960
|
Filing Dt:
|
04/24/2018
|
|
Publication #:
|
|
Pub Dt:
|
08/23/2018
| | | | |
|
Title:
|
STACKED SEMICONDUCTOR DIE ASSEMBLIES WITH DIE SUPPORT MEMBERS AND ASSOCIATED SYSTEMS AND METHODS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/17/2019
|
Application #:
|
15961374
|
Filing Dt:
|
04/24/2018
|
|
Publication #:
|
|
Pub Dt:
|
08/23/2018
| | | | |
|
Title:
|
APPARATUSES AND METHODS TO REVERSE DATA STORED IN MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/09/2019
|
Application #:
|
15961473
|
Filing Dt:
|
04/24/2018
|
|
Publication #:
|
|
Pub Dt:
|
08/30/2018
| | | | |
|
Title:
|
SOLID STATE LIGHTING DEVICES WITH ACCESSIBLE ELECTRODES AND METHODS OF MANUFACTURING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/03/2020
|
Application #:
|
15961540
|
Filing Dt:
|
04/24/2018
|
|
Publication #:
|
|
Pub Dt:
|
10/24/2019
| | | | |
|
Title:
|
CROSS-POINT MEMORY ARRAY AND RELATED FABRICATION TECHNIQUES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/16/2021
|
Application #:
|
15961547
|
Filing Dt:
|
04/24/2018
|
|
Publication #:
|
|
Pub Dt:
|
10/24/2019
| | | | |
|
Title:
|
CROSS-POINT MEMORY ARRAY AND RELATED FABRICATION TECHNIQUES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/28/2020
|
Application #:
|
15961550
|
Filing Dt:
|
04/24/2018
|
|
Publication #:
|
|
Pub Dt:
|
10/24/2019
| | | | |
|
Title:
|
BURIED LINES AND RELATED FABRICATION TECHNIQUES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/21/2021
|
Application #:
|
15962648
|
Filing Dt:
|
04/25/2018
|
|
Publication #:
|
|
Pub Dt:
|
10/31/2019
| | | | |
|
Title:
|
TESTING SEMICONDUCTOR DEVICES BASED ON WARPAGE AND ASSOCIATED METHODS
|
|
