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Reel/Frame:	047540/0001			Pages:	843
		Recorded:	07/13/2018
Attorney Dkt #:	509265/2155
Conveyance:	SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 16531
Page 17 of 166
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Patent #:	6432591	Issue Dt:	08/13/2002	Application #:	09649907	Filing Dt:	08/30/2000
Title:	OVERLAY TARGET DESIGN METHOD WITH PTICH DETERMINATION TO MINIMIZE IMPACT OF LENS ABERRATIONS

Patent #:	6698416	Issue Dt:	03/02/2004	Application #:	09649964	Filing Dt:	08/29/2000
Title:	FILM FRAME SUBSTRATE FIXTURE

Patent #:	6701910	Issue Dt:	03/09/2004	Application #:	09649966	Filing Dt:	08/29/2000
Title:	FILM FRAME SUBSTRATE FIXTURE

Patent #:	6420920	Issue Dt:	07/16/2002	Application #:	09649970	Filing Dt:	08/28/2000
Title:	METHOD AND APPARATUS FOR PHASE-SPLITTING A CLOCK SIGNAL

Patent #:	6583460	Issue Dt:	06/24/2003	Application #:	09650071	Filing Dt:	08/29/2000
Title:	METHOD OF FORMING A METAL TO POLYSILICON CONTACT IN OXYGEN ENVIRONMENT

Patent #:	6245646	Issue Dt:	06/12/2001	Application #:	09650080	Filing Dt:	08/29/2000
Title:	Film frame substrate fixture

Patent #:	6537891	Issue Dt:	03/25/2003	Application #:	09650081	Filing Dt:	08/29/2000
Title:	SILICON ON INSULATOR DRAM PROCESS UTILIZING BOTH FULLY AND PARTIALLY DEPLETED DEVICES

Patent #:	6486536	Issue Dt:	11/26/2002	Application #:	09650125	Filing Dt:	08/29/2000
Title:	U-SHAPE TAPE FOR BOC FBGA PACKAGE TO IMPROVE MOLDABILITY

Patent #:	6444537	Issue Dt:	09/03/2002	Application #:	09650215	Filing Dt:	08/29/2000
Title:	A METHOD OF PREPARING A CAPACITOR ON INTEGRATED CIRCUIT DEVICE CONTAINING ISOLATED DIELECTRIC MATERIAL

Patent #:	6576778	Issue Dt:	06/10/2003	Application #:	09650231	Filing Dt:	08/29/2000
Title:	METHODS FOR PREPARING RUTHENIUM AND OSMIUM COMPOUNDS

Patent #:	6304511	Issue Dt:	10/16/2001	Application #:	09650475	Filing Dt:	08/29/2000
Title:	Method and apparatus for adjusting control signal timing in a memory device

Patent #:	6353521	Issue Dt:	03/05/2002	Application #:	09650534	Filing Dt:	08/30/2000
Title:	Device and method for protecting an integrated circuit during an ESD event

Patent #:	6448756	Issue Dt:	09/10/2002	Application #:	09650552	Filing Dt:	08/30/2000
Title:	DELAY LINE TAP SETTING OVERRIDE FOR DELAY LOCKED LOOP (DLL) TESTABILITY

Patent #:	6356506	Issue Dt:	03/12/2002	Application #:	09650567	Filing Dt:	08/30/2000
Title:	Full page increment/decrement burst for DDR SDRAM/SGRAM

Patent #:	6498065	Issue Dt:	12/24/2002	Application #:	09650600	Filing Dt:	08/30/2000
Title:	MEMORY ADDRESS DECODE ARRAY WITH VERTICAL TRANSISTORS

Patent #:	6359482	Issue Dt:	03/19/2002	Application #:	09650720	Filing Dt:	08/30/2000
Title:	Method and apparatus for digital delay locked loop circuits

Patent #:	6327209	Issue Dt:	12/04/2001	Application #:	09650721	Filing Dt:	08/30/2000
Title:	Multi stage refresh control of a memory device

Patent #:	6417113	Issue Dt:	07/09/2002	Application #:	09650778	Filing Dt:	08/29/2000
Title:	MATERIAL REMOVAL METHOD USING GERMANIUM

Patent #:	6518172	Issue Dt:	02/11/2003	Application #:	09650779	Filing Dt:	08/29/2000
Title:	METHOD FOR APPLYING UNIFORM PRESSURIZED FILM ACROSS WAFER

Patent #:	6544908	Issue Dt:	04/08/2003	Application #:	09650784	Filing Dt:	08/30/2000
Title:	AMMONIA GAS PASSIVATION ON NITRIDE ENCAPSULATED DEVICES

Patent #:	6415977	Issue Dt:	07/09/2002	Application #:	09650796	Filing Dt:	08/30/2000
Title:	METHOD AND APPARATUS FOR MARKING AND IDENTIFYING A DEFECTIVE DIE SITE

Patent #:	6439115	Issue Dt:	08/27/2002	Application #:	09650840	Filing Dt:	08/30/2000
Title:	UPHILL SCREEN PRINTING IN THE MANUFACTURING OF MICROELECTRONIC COMPONENTS

Patent #:	6632343	Issue Dt:	10/14/2003	Application #:	09651040	Filing Dt:	08/30/2000
Title:	METHOD AND APPARATUS FOR ELECTROLYTIC PLATING OF SUREFACE METALS

Patent #:	7206800	Issue Dt:	04/17/2007	Application #:	09651159	Filing Dt:	08/30/2000
Title:	OVERFLOW DETECTION AND CLAMPING WITH PARALLEL OPERAND PROCESSING FOR FIXED-POINT MULTIPLIERS

Patent #:	6426875	Issue Dt:	07/30/2002	Application #:	09651330	Filing Dt:	08/29/2000
Title:	HEAT SINK CHIP PACKAGE

Patent #:	6461931	Issue Dt:	10/08/2002	Application #:	09651380	Filing Dt:	08/29/2000
Title:	THIN DIELECTRIC FILMS FOR DRAM STORAGE CAPACITORS

Patent #:	6570804	Issue Dt:	05/27/2003	Application #:	09651391	Filing Dt:	08/29/2000
Title:	FUSE READ SEQUENCE FOR AUTO REFRESH POWER REDUCTION

Patent #:	6734071	Issue Dt:	05/11/2004	Application #:	09651422	Filing Dt:	08/30/2000
Title:	METHODS OF FORMING INSULATIVE MATERIAL AGAINST CONDUCTIVE STRUCTURES

Patent #:	6576495	Issue Dt:	06/10/2003	Application #:	09651448	Filing Dt:	08/30/2000
Title:	MICROELECTRONIC ASSEMBLY WITH PRE-DISPOSED FILL MATERIAL AND ASSOCIATED METHOD OF MANUFACTURE

Patent #:	6461963	Issue Dt:	10/08/2002	Application #:	09651462	Filing Dt:	08/30/2000
Title:	UTILIZATION OF DISAPPEARING SILICON HARD MASK FOR FABRICATION OF SEMICONDUCTOR STRUCTURES

Patent #:	6426910	Issue Dt:	07/30/2002	Application #:	09651472	Filing Dt:	08/30/2000
Title:	ENHANCED FUSE CONFIGURATIONS FOR LOW-VOLTAGE FLASH MEMORIES

Patent #:	6451646	Issue Dt:	09/17/2002	Application #:	09651475	Filing Dt:	08/30/2000
Title:	NOVEL HIGH-K DIELECTRIC MATERIALS AND PROCESSES FOR MANUFACTURING THEM

Patent #:	6628142	Issue Dt:	09/30/2003	Application #:	09651478	Filing Dt:	08/30/2000
Title:	ENHANCED PROTECTION FOR INPUT BUFFERS OF LOW-VOLTAGE FLASH MEMORIES

Patent #:	6512400	Issue Dt:	01/28/2003	Application #:	09651631	Filing Dt:	08/30/2000
Title:	INTEGRATED CIRCUIT COMPARATOR OR AMPLIFIER

Patent #:	6690055	Issue Dt:	02/10/2004	Application #:	09651699	Filing Dt:	08/30/2000
Title:	DEVICES CONTAINING PLATINUM-RHODIUM LAYERS AND METHODS

Patent #:	7074113	Issue Dt:	07/11/2006	Application #:	09651779	Filing Dt:	08/30/2000
Title:	METHODS AND APPARATUS FOR REMOVING CONDUCTIVE MATERIAL FROM A MICROELECTRONIC SUBSTRATE

Patent #:	6914017	Issue Dt:	07/05/2005	Application #:	09651790	Filing Dt:	08/30/2000
Title:	RESIDUE FREE OVERLAY TARGET

Patent #:	6667219	Issue Dt:	12/23/2003	Application #:	09651815	Filing Dt:	08/30/2000
Title:	METHODS FOR FORMING VOID REGIONS, DIELECTRIC REGIONS AND CAPACITOR CONSTRUCTIONS

Patent #:	6829737	Issue Dt:	12/07/2004	Application #:	09651858	Filing Dt:	08/30/2000
Title:	METHOD AND SYSTEM FOR STORING DEVICE TEST INFORMATION ON A SEMICONDUCTOR DEVICE USING ON-DEVICE LOGIC FOR DETERMINATION OF TEST RESULTS

Patent #:	6452223	Issue Dt:	09/17/2002	Application #:	09651861	Filing Dt:	08/30/2000
Title:	METHODS OF FABRICATING BURIED DIGIT LINES AND SEMICONDUCTOR DEVICES INCLUDING SAME

Patent #:	6784108	Issue Dt:	08/31/2004	Application #:	09651871	Filing Dt:	08/31/2000
Title:	GAS PULSING FOR ETCH PROFILE CONTROL

Patent #:	6452253	Issue Dt:	09/17/2002	Application #:	09651997	Filing Dt:	08/31/2000
Title:	METHOD AND APPARATUS FOR MAGNETIC SHIELDING OF AN INTEGRATED CIRCUIT

Patent #:	6912626	Issue Dt:	06/28/2005	Application #:	09652003	Filing Dt:	08/31/2000
Title:	METHOD AND APPARATUS FOR CONNECTING A MASSIVELY PARALLEL PROCESSOR ARRAY TO A MEMORY ARRAY IN A BIT SERIAL MANNER

Patent #:	6656754	Issue Dt:	12/02/2003	Application #:	09652060	Filing Dt:	08/31/2000
Title:	METHOD OF FORMING A SEMICONDUCTOR CHIP CARRIER

Patent #:	6535413	Issue Dt:	03/18/2003	Application #:	09652070	Filing Dt:	08/31/2000
Title:	METHOD OF SELECTIVELY FORMING LOCAL INTERCONNECTS USING DESIGN RULES

Patent #:	6897903	Issue Dt:	05/24/2005	Application #:	09652071	Filing Dt:	08/31/2000
Title:	APPARATUS FOR DETECTING MIXED INTERLACED AND PROGRESSIVE ORIGINAL SOURCES IN A VIDEO SEQUENCE

Patent #:	6537853	Issue Dt:	03/25/2003	Application #:	09652076	Filing Dt:	08/31/2000
Title:	OVERMOLDING ENCAPSULATION PROCESS

Patent #:	6368986	Issue Dt:	04/09/2002	Application #:	09652188	Filing Dt:	08/31/2000
Title:	Use of selective ozone TEOS oxide to create variable thickness layers and spacers

Patent #:	6518198	Issue Dt:	02/11/2003	Application #:	09652208	Filing Dt:	08/31/2000
Title:	ELECTROLESS DEPOSITION OF DOPED NOBLE METALS AND NOBLE METAL ALLOYS

Patent #:	6788552	Issue Dt:	09/07/2004	Application #:	09652216	Filing Dt:	08/30/2000
Title:	METHOD AND APPARATUS FOR REDUCING SUBSTRATE BIAS VOLTAGE DROP

Patent #:	6275443	Issue Dt:	08/14/2001	Application #:	09652217	Filing Dt:	08/30/2000
Title:	Latched row or column select enable driver

Patent #:	6708131	Issue Dt:	03/16/2004	Application #:	09652218	Filing Dt:	08/30/2000
Title:	WAFER ALIGNMENT SYSTEM

Patent #:	6562277	Issue Dt:	05/13/2003	Application #:	09652225	Filing Dt:	08/29/2000
Title:	METHOD AND APPARATUS FOR ATTACHING A WORKPIECE TO A WORKPIECE SUPPORT

Patent #:	6495406	Issue Dt:	12/17/2002	Application #:	09652320	Filing Dt:	08/31/2000
Title:	METHOD OF FORMING LIGHTLY DOPED DRAIN MOS TRANSISTOR INCLUDING FORMING SPACERS ON GATE ELECTRODE PATTERN BEFORE EXPOSING GATE INSULATOR

Patent #:	6779126	Issue Dt:	08/17/2004	Application #:	09652364	Filing Dt:	08/31/2000
Title:	PHASE DETECTOR FOR ALL-DIGITAL PHASE LOCKED AND DELAY LOCKED LOOPS

Patent #:	6630724	Issue Dt:	10/07/2003	Application #:	09652429	Filing Dt:	08/31/2000
Title:	GATE DIELECTRIC ANTIFUSE CIRCUITS AND METHODS FOR OPERATING SAME

Patent #:	7271491	Issue Dt:	09/18/2007	Application #:	09652495	Filing Dt:	08/31/2000
Title:	CARRIER FOR WAFER-SCALE PACKAGE AND WAFER-SCALE PACKAGE INCLUDING THE CARRIER

Patent #:	6547979	Issue Dt:	04/15/2003	Application #:	09652530	Filing Dt:	08/31/2000
Title:	METHODS OF ENHANCING SELECTIVITY OF ETCHING SILICON DIOXIDE RELATIVE TO ONE OR MORE ORGANIC SUBSTANCES

Patent #:	6416402	Issue Dt:	07/09/2002	Application #:	09652531	Filing Dt:	08/31/2000
Title:	METHODS OF POLISHING MICROELECTRONIC SUBSTRATES, AND METHODS OF POLISHING WAFERS

Patent #:	6420230	Issue Dt:	07/16/2002	Application #:	09652532	Filing Dt:	08/31/2000
Title:	CAPACITOR FABRICATION METHODS AND CAPACITOR CONSTRUCTIONS

Patent #:	6830977	Issue Dt:	12/14/2004	Application #:	09652550	Filing Dt:	08/31/2000
Title:	METHODS OF FORMING AN ISOLATION TRENCH IN A SEMICONDUCTOR, METHODS OF FORMING AN ISOLATION TRENCH IN A SURFACE OF A SILICON WAFER, METHODS OF FORMING AN ISOLATION TRENCH-ISOLATED TRANSISTOR, TRENCH-ISOLATED TRANSISTOR, TRENCH ISOLATION STRUCTURES FORMED IN A SEMICO

Patent #:	6515889	Issue Dt:	02/04/2003	Application #:	09652557	Filing Dt:	08/31/2000
Title:	JUNCTION-ISOLATED DEPLETION MODE FERROELECTRIC MEMORY

Patent #:	6438023	Issue Dt:	08/20/2002	Application #:	09652622	Filing Dt:	08/31/2000
Title:	Double-edged clocked storage device and method

Patent #:	6652764	Issue Dt:	11/25/2003	Application #:	09652639	Filing Dt:	08/31/2000
Title:	METHODS AND APPARATUSES FOR MAKING AND USING PLANARIZING PADS FOR MECHANICAL AND CHEMICAL-MECHANICAL PLANARIZATION OF MICROELECTRONIC SUBSTRATES

Patent #:	6425791	Issue Dt:	07/30/2002	Application #:	09652746	Filing Dt:	08/31/2000
Title:	METHOD OF MAKING A FIELD EMISSION DEVICE WITH BUFFER LAYER

Patent #:	6451488	Issue Dt:	09/17/2002	Application #:	09652774	Filing Dt:	08/31/2000
Title:	SINGLE-LEVEL MASKING WITH PARTIAL USE OF ATTENUATED PHASE-SHIFT TECHNOLOGY

Patent #:	6569774	Issue Dt:	05/27/2003	Application #:	09652835	Filing Dt:	08/31/2000
Title:	METHOD TO ELIMINATE STRIATIONS AND SURFACE ROUGHNESS CAUSED BY DRY ETCH

Patent #:	6503783	Issue Dt:	01/07/2003	Application #:	09652864	Filing Dt:	08/31/2000
Title:	SOI CMOS DEVICE WITH REDUCED DIBL

Patent #:	6574131	Issue Dt:	06/03/2003	Application #:	09652877	Filing Dt:	08/31/2000
Title:	DEPLETION MODE FERROELECTRIC MEMORY DEVICE AND METHOD OF WRITING TO AND READING FROM THE SAME

Patent #:	7077733	Issue Dt:	07/18/2006	Application #:	09652878	Filing Dt:	08/31/2000
Title:	SUBPAD SUPPORT WITH A RELEASABLE SUBPAD SECURING ELEMENTAND POLISHING APPARATUS INCLUDING THE SUBPAD SUPPORT

Patent #:	6525365	Issue Dt:	02/25/2003	Application #:	09652907	Filing Dt:	08/31/2000
Title:	DIELECTICE FILMS AND CAPACITOR STRUCTURES INCLUDING SAME

Patent #:	6762132	Issue Dt:	07/13/2004	Application #:	09652991	Filing Dt:	08/31/2000
Title:	COMPOSITIONS FOR DISSOLUTION OF LOW-K DIELECTRIC FILMS, AND METHODS OF USE

Patent #:	6587365	Issue Dt:	07/01/2003	Application #:	09653074	Filing Dt:	08/31/2000
Title:	ARRAY ARCHITECTURE FOR DEPLETION MODE FERROELECTRIC MEMORY DEVICES

Patent #:	6576964	Issue Dt:	06/10/2003	Application #:	09653096	Filing Dt:	08/31/2000
Title:	DIELECTRIC LAYER FOR A SEMICONDUCTOR DEVICE HAVING LESS CURRENT LEAKAGE AND INCREASED CAPACITANCE

Patent #:	6559537	Issue Dt:	05/06/2003	Application #:	09653127	Filing Dt:	08/31/2000
Title:	BALL GRID ARRAY PACKAGES WITH THERMALLY CONDUCTIVE CONTAINERS

Patent #:	6617689	Issue Dt:	09/09/2003	Application #:	09653138	Filing Dt:	08/31/2000
Title:	METAL LINE AND METHOD OF SUPPRESSING VOID FORMATION THEREIN

Patent #:	7217615	Issue Dt:	05/15/2007	Application #:	09653149	Filing Dt:	08/31/2000
Title:	CAPACITOR FABRICATION METHODS INCLUDING FORMING A CONDUCTIVE LAYER

Patent #:	6531352	Issue Dt:	03/11/2003	Application #:	09653151	Filing Dt:	08/31/2000
Title:	METHODS OF FORMING CONDUCTIVE INTERCONNECTS

Patent #:	6531407	Issue Dt:	03/11/2003	Application #:	09653153	Filing Dt:	08/31/2000
Title:	METHOD, STRUCTURE AND PROCESS FLOW TO REDUCE LINE-LINE CAPACITANCE WITH LOW-K MATERIAL

Patent #:	6411553	Issue Dt:	06/25/2002	Application #:	09653249	Filing Dt:	08/31/2000
Title:	SINGLE ENDED DATA BUS EQUILIBRATION SCHEME

Patent #:	6521544	Issue Dt:	02/18/2003	Application #:	09653298	Filing Dt:	08/31/2000
Title:	METHOD OF FORMING AN ULTRA THIN DIELECTRIC FILM

Patent #:	6335892	Issue Dt:	01/01/2002	Application #:	09653356	Filing Dt:	08/31/2000
Title:	Method to electrically program antifuses

Patent #:	6756253	Issue Dt:	06/29/2004	Application #:	09653366	Filing Dt:	09/01/2000
Title:	METHOD FOR FABRICATING A SEMICONDUCTOR COMPONENT WITH EXTERNAL CONTACT POLYMER SUPPORT LAYER

Patent #:	6551935	Issue Dt:	04/22/2003	Application #:	09653392	Filing Dt:	08/31/2000
Title:	SLURRY FOR USE IN POLISHING SEMICONDUCTOR DEVICE CONDUCTIVE STRUCTURES THAT INCLUDE COPPER AND TUNGSTEN AND POLISHING METHODS

Patent #:	6426291	Issue Dt:	07/30/2002	Application #:	09653423	Filing Dt:	08/31/2000
Title:	METHOD OF CO-DEPOSITION TO FORM ULTRA-SHALLOW JUNCTIONS IN MOS DEVICES USING ELECTROLESS OR ELECTRODELPOSITION

Patent #:	6638831	Issue Dt:	10/28/2003	Application #:	09653473	Filing Dt:	08/31/2000
Title:	USE OF A REFERENCE FIDUCIAL ON A SEMICONDUCTOR PACKAGE TO MONITOR AND CONTROL A SINGULATION METHOD

Patent #:	6594192	Issue Dt:	07/15/2003	Application #:	09653495	Filing Dt:	08/31/2000
Title:	INTEGRATED VOLATILE AND NON-VOLATILE MEMORY

Patent #:	6642567	Issue Dt:	11/04/2003	Application #:	09653513	Filing Dt:	08/31/2000
Title:	DEVICES CONTAINING ZIRCONIUM-PLATINUM-CONTAINING MATERIALS AND METHODS FOR PREPARING SUCH MATERIALS AND DEVICES

Patent #:	6451705	Issue Dt:	09/17/2002	Application #:	09653522	Filing Dt:	08/31/2000
Title:	SELF-ALIGNED PECVD ETCH MASK

Patent #:	6465373	Issue Dt:	10/15/2002	Application #:	09653523	Filing Dt:	08/31/2000
Title:	ULTRA THIN TCS (SIC14) CELL NITRIDE FOR DRAM CAPACITOR WITH DCS (SIH2C12) INTERFACE SEEDING LAYER

Patent #:	6496421	Issue Dt:	12/17/2002	Application #:	09653539	Filing Dt:	08/31/2000
Title:	DISTRIBUTED CELL PLATE AND/OR DIGIT EQUILIBRATE VOLTAGE GENERATOR

Patent #:	6717241	Issue Dt:	04/06/2004	Application #:	09653541	Filing Dt:	08/31/2000
Title:	MAGNETIC SHIELDING FOR INTEGRATED CIRCUITS

Patent #:	6541353	Issue Dt:	04/01/2003	Application #:	09653553	Filing Dt:	08/31/2000
Title:	ATOMIC LAYER DOPING APPARATUS AND METHOD

Patent #:	6372657	Issue Dt:	04/16/2002	Application #:	09653554	Filing Dt:	08/31/2000
Title:	METHOD FOR SELECTIVE ETCHING OF OXIDES

Patent #:	6625040	Issue Dt:	09/23/2003	Application #:	09653558	Filing Dt:	08/31/2000
Title:	SHIELDED PC BOARD FOR MAGNETICALLY SENSITIVE INTEGRATED CIRCUITS

Patent #:	6617239	Issue Dt:	09/09/2003	Application #:	09653560	Filing Dt:	08/31/2000
Title:	SUBTRACTIVE METALLIZATION STRUCTURE AND METHOD OF MAKING

Patent #:	7125809	Issue Dt:	10/24/2006	Application #:	09653561	Filing Dt:	08/31/2000
Title:	METHOD AND MATERIAL FOR REMOVING ETCH RESIDUE FROM HIGH ASPECT RATIO CONTACT SURFACES

Patent #:	6455441	Issue Dt:	09/24/2002	Application #:	09653596	Filing Dt:	08/31/2000
Title:	SPUTTERED INSULATING LAYER FOR WORDLINE STACKS

Patent #:	6380576	Issue Dt:	04/30/2002	Application #:	09653638	Filing Dt:	08/31/2000
Title:	SELECTIVE POLYSILICON STUD GROWTH

100

Patent #:	6787833	Issue Dt:	09/07/2004	Application #:	09653640	Filing Dt:	08/31/2000
Title:	INTEGRATED CIRCUIT HAVING A BARRIER STRUCTURE

Assignors

MICRON TECHNOLOGY, INC.

Exec Dt:

07/03/2018

MICRON SEMICONDUCTOR PRODUCTS, INC.

Exec Dt:

07/03/2018

Assignee

JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT

10 S. DEARBORN

7TH FLOOR

CHICAGO, ILLINOIS 60603

Correspondence name and address
	MARCELA ROBLEDO
	2475 HANOVER STREET
	PALO ALTO, CA 94304

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