skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:047540/0001   Pages: 843
Recorded: 07/13/2018
Attorney Dkt #:509265/2155
Conveyance: SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
11/28/2006
Application #:
09855532
Filing Dt:
05/16/2001
Publication #:
Pub Dt:
03/31/2005
Title:
METHOD OF FORMING MIRRORS BY SURFACE TRANSFORMATION OF EMPTY SPACES IN SOLID STATE MATERIALS AND STRUCTURES THEREON
2
Patent #:
Issue Dt:
01/14/2003
Application #:
09855731
Filing Dt:
05/15/2001
Publication #:
Pub Dt:
09/19/2002
Title:
SEMICONDUCTOR/PRINTED CIRCUIT BOARD ASSEMBLY
3
Patent #:
Issue Dt:
08/30/2005
Application #:
09855903
Filing Dt:
05/15/2001
Publication #:
Pub Dt:
11/22/2001
Title:
APPARATUS AND METHOD FOR RESOURCE ARBITRATION
4
Patent #:
Issue Dt:
08/12/2003
Application #:
09858121
Filing Dt:
05/15/2001
Title:
STRUCTURE FOR AN ELECTRICAL CONTACT TO A THIN FILM IN A SEMICONDUCTOR STRUCTURE AND METHOD FOR MAKING THE SAME
5
Patent #:
Issue Dt:
09/16/2003
Application #:
09858224
Filing Dt:
05/15/2001
Publication #:
Pub Dt:
11/21/2002
Title:
CONNECTOR ASSEMBLY WITH DECOUPLING CAPACITORS
6
Patent #:
Issue Dt:
09/17/2002
Application #:
09858335
Filing Dt:
05/15/2001
Publication #:
Pub Dt:
01/24/2002
Title:
MANUFACTURING PROCESS FOR THE INTEGRATION IN A SEMICONDUCTOR CHIP OF AN INTEGRATED CIRCUIT INCLUDING A HIGH-DENSITY INTEGRATED CIRCUIT COMPONENTS PORTION AND A HIGH-PERFORMANCE LOGIC INTEGRATED CIRCUIT COMPONENTS PORTION
7
Patent #:
Issue Dt:
02/21/2006
Application #:
09858437
Filing Dt:
05/16/2001
Publication #:
Pub Dt:
01/03/2002
Title:
METHOD AND ARBITRATION UNIT FOR DIGITAL SWITCH
8
Patent #:
Issue Dt:
02/10/2004
Application #:
09858617
Filing Dt:
05/16/2001
Publication #:
Pub Dt:
11/21/2002
Title:
COMPOUND STRUCTURE FOR REDUCED CONTACT RESISTANCE
9
Patent #:
Issue Dt:
11/14/2006
Application #:
09858934
Filing Dt:
05/16/2001
Publication #:
Pub Dt:
05/30/2002
Title:
METHODS AND APPARATUS FOR REGULATING PROCESS STATE CONTROL MESSAGES
10
Patent #:
Issue Dt:
03/18/2003
Application #:
09860131
Filing Dt:
05/17/2001
Publication #:
Pub Dt:
11/21/2002
Title:
CMOS VOLTAGE CONTROLLED PHASE SHIFT OSCILLATOR
11
Patent #:
Issue Dt:
07/23/2002
Application #:
09861286
Filing Dt:
05/18/2001
Title:
METHODS OF FORMING CAPACITORS ON A WAFER, PHOTOLITHOGRAPHIC METHODS OF FORMING CAPACITORS ON A WAFER, AND SEMICONDUCTOR WAFER
12
Patent #:
Issue Dt:
07/16/2002
Application #:
09861404
Filing Dt:
05/18/2001
Publication #:
Pub Dt:
09/27/2001
Title:
METHOD FOR MANUFACTURING ELECTRONIC DEVICES HAVING HV TRANSISTORS AND LV TRANSISTORS WITH SALICIDED JUNCTIONS
13
Patent #:
Issue Dt:
09/10/2002
Application #:
09862392
Filing Dt:
05/21/2001
Publication #:
Pub Dt:
09/20/2001
Title:
ADJUSTABLE COARSE ALIGNMENT TOOLING FOR PACKAGED SEMICONDUCTOR DEVICES
14
Patent #:
Issue Dt:
10/08/2002
Application #:
09862396
Filing Dt:
05/21/2001
Publication #:
Pub Dt:
09/27/2001
Title:
METHODS AND APPARATUSES FOR MONITORING AND CONTROLLING MECHANICAL OR CHEMICAL-MECHANICAL PLANARIZATION OF MICROELECTRONIC SUBSTRATE ASSEMBLIES
15
Patent #:
Issue Dt:
08/13/2002
Application #:
09862694
Filing Dt:
05/22/2001
Publication #:
Pub Dt:
10/11/2001
Title:
ROW DECODED BIASING OF SENSE AMPLIFIER FOR IMPROVED ONE'S MARGIN
16
Patent #:
Issue Dt:
10/22/2002
Application #:
09862735
Filing Dt:
05/21/2001
Publication #:
Pub Dt:
09/27/2001
Title:
METHODS AND APPARATUSES FOR MONITORING AND CONTROLLING MECHANICAL OR CHEMICAL-MECHANICAL PLANARIZATION OF MICROELECTRONIC SUBSTRATE ASSEMBLIES
17
Patent #:
Issue Dt:
10/29/2002
Application #:
09862736
Filing Dt:
05/21/2001
Publication #:
Pub Dt:
09/27/2001
Title:
METHODS AND APPARATUSES FOR MONITORING AND CONTROLLING MECHANICAL OR CHEMICAL-MECHANICAL PLANARIZATION OF MICROELECTRONIC SUBSTRATE ASSEMBLIES
18
Patent #:
Issue Dt:
07/16/2002
Application #:
09862790
Filing Dt:
05/21/2001
Title:
DATA-PATTERN-DEPENDENT COMPENSATION TECHNIQUE TO MAINTAIN DRIVE STRENGTH OF AN OUTPUT DRIVER
19
Patent #:
Issue Dt:
04/02/2002
Application #:
09862868
Filing Dt:
05/22/2001
Publication #:
Pub Dt:
03/28/2002
Title:
PROTECTION AFTER BROWN OUT IN A SYNCHRONOUS MEMORY
20
Patent #:
Issue Dt:
03/04/2003
Application #:
09863245
Filing Dt:
05/21/2001
Publication #:
Pub Dt:
11/21/2002
Title:
METHOD FOR BUMPED DIE AND WIRE BONDED BOARD-ON-CHIP PACKAGE
21
Patent #:
Issue Dt:
10/07/2003
Application #:
09864471
Filing Dt:
05/24/2001
Publication #:
Pub Dt:
11/08/2001
Title:
SEMICONDUCTOR DEVICE ASSEMBLIES INCLUDING INTERPOSERS WITH DAMS PROTRUDING THEREFROM
22
Patent #:
Issue Dt:
03/11/2003
Application #:
09864552
Filing Dt:
05/23/2001
Publication #:
Pub Dt:
11/08/2001
Title:
OXIDE ETCHING METHOD AND STRUCTURES RESULTING FROM SAME
23
Patent #:
Issue Dt:
01/21/2003
Application #:
09864559
Filing Dt:
05/23/2001
Publication #:
Pub Dt:
12/06/2001
Title:
CONDUCTIVE DEVICE COMPONENTS OF DIFFERENT BASE WIDTHS FORMED FROM A COMMON CONDUCTIVE MATERIAL
24
Patent #:
Issue Dt:
05/27/2003
Application #:
09865743
Filing Dt:
05/25/2001
Publication #:
Pub Dt:
11/28/2002
Title:
SYNCHRONOUS MIRROR DELAY WITH REDUCED DELAY LINE TAPS
25
Patent #:
Issue Dt:
11/05/2002
Application #:
09865910
Filing Dt:
05/24/2001
Title:
CAPACITORS AND CAPACITOR FORMING METHODS
26
Patent #:
Issue Dt:
02/11/2003
Application #:
09866641
Filing Dt:
05/30/2001
Publication #:
Pub Dt:
11/15/2001
Title:
CENTER BOND FLIP-CHIP SEMICONDUCTOR DEVICE AND METHOD OF MAKING IT
27
Patent #:
Issue Dt:
11/19/2002
Application #:
09867520
Filing Dt:
05/31/2001
Publication #:
Pub Dt:
02/28/2002
Title:
METHOD OF CONSTRUCTING A VERY WIDE, VERY FAST DISTRIBUTED MEMORY
28
Patent #:
Issue Dt:
12/31/2002
Application #:
09867734
Filing Dt:
05/30/2001
Publication #:
Pub Dt:
12/05/2002
Title:
TRCD MARGIN
29
Patent #:
Issue Dt:
09/03/2002
Application #:
09867851
Filing Dt:
05/29/2001
Publication #:
Pub Dt:
10/04/2001
Title:
SEED ROM FOR RECIPROCAL COMPUTATION
30
Patent #:
Issue Dt:
11/23/2004
Application #:
09869085
Filing Dt:
06/20/2001
Title:
APPROXIMATE STATE CONTROL MECHANISM
31
Patent #:
Issue Dt:
08/08/2006
Application #:
09869091
Filing Dt:
10/23/2001
Title:
METHOD OF TRANSMITTING INFORMATION THROUGH DATA SWITCHING APPARATUS AND APPARATUS THEREFOR
32
Patent #:
Issue Dt:
10/08/2002
Application #:
09870088
Filing Dt:
05/30/2001
Title:
TECHNIQUE FOR LOCALLY REDUCING EFFECTS ON AN ANALOG SIGNAL DUE TO CHANGES ON A REFERENCE BUS IN AN INTEGRATED CIRCUIT
33
Patent #:
Issue Dt:
10/08/2002
Application #:
09870850
Filing Dt:
05/30/2001
Publication #:
Pub Dt:
10/11/2001
Title:
SEMICONDUCTOR PROCESSING METHODS, SEMICONDUCTOR CIRCUITRY, AND GATE STACKS
34
Patent #:
Issue Dt:
09/10/2002
Application #:
09871062
Filing Dt:
05/31/2001
Publication #:
Pub Dt:
09/20/2001
Title:
INTEGRATED CIRCUIT INDUCTORS
35
Patent #:
Issue Dt:
04/15/2003
Application #:
09871234
Filing Dt:
05/30/2001
Publication #:
Pub Dt:
02/07/2002
Title:
CIRCUITAL STRUCTURE FOR READING DATA IN A NON-VOLATILE MEMORY DEVICE
36
Patent #:
Issue Dt:
01/14/2003
Application #:
09871235
Filing Dt:
05/30/2001
Publication #:
Pub Dt:
02/07/2002
Title:
CIRCUITAL STRUCTURE FOR PROGRAMMING DATA IN A NON-VOLATILE MEMORY DEVICE
37
Patent #:
Issue Dt:
09/02/2003
Application #:
09871454
Filing Dt:
05/31/2001
Publication #:
Pub Dt:
09/27/2001
Title:
INTEGRATED CIRCUIT INDUCTORS
38
Patent #:
Issue Dt:
09/10/2002
Application #:
09871684
Filing Dt:
06/04/2001
Publication #:
Pub Dt:
10/11/2001
Title:
METHOD FOR REPAIRING MOSI ATTENUATED PHASE SHIFT MASKS
39
Patent #:
Issue Dt:
04/30/2002
Application #:
09872221
Filing Dt:
05/31/2001
Publication #:
Pub Dt:
10/04/2001
Title:
APPARATUS AND METHODS OF PACKAGING AND TESTING DIE
40
Patent #:
Issue Dt:
09/10/2002
Application #:
09872804
Filing Dt:
06/01/2001
Publication #:
Pub Dt:
11/29/2001
Title:
VOLTAGE INDEPENDENT FUSE CIRCUIT AND METHOD
41
Patent #:
Issue Dt:
04/01/2003
Application #:
09874011
Filing Dt:
06/06/2001
Publication #:
Pub Dt:
12/12/2002
Title:
THERMALLY ENHANCED HIGH DENSITY SEMICONDUCTOR PACKAGE
42
Patent #:
Issue Dt:
12/27/2005
Application #:
09874044
Filing Dt:
06/06/2001
Publication #:
Pub Dt:
12/26/2002
Title:
METHOD AND CIRCUIT FOR NORMALIZATION OF FLOATING POINT SIGNIFICANTS IN A SIMD ARRAY MPP
43
Patent #:
Issue Dt:
05/17/2005
Application #:
09874307
Filing Dt:
06/06/2001
Publication #:
Pub Dt:
12/19/2002
Title:
METHOD AND CIRCUIT FOR ALIGNMENT OF FLOATING POINT SIGNIFICANTS IN A SIMD ARRAY MPP
44
Patent #:
Issue Dt:
04/05/2005
Application #:
09874500
Filing Dt:
06/05/2001
Publication #:
Pub Dt:
01/31/2002
Title:
SWITCHING SYSTEM
45
Patent #:
Issue Dt:
11/28/2006
Application #:
09874666
Filing Dt:
06/05/2001
Publication #:
Pub Dt:
02/14/2002
Title:
CONTROLLED COLLAPSE CHIP CONNECTION (C4) INTEGRATED CIRCUIT PACKAGE WHICH HAS TWO DISSIMILAR UNDERFILL MATERIALS
46
Patent #:
Issue Dt:
06/24/2003
Application #:
09874671
Filing Dt:
06/05/2001
Publication #:
Pub Dt:
10/17/2002
Title:
APPARATUS FOR PACKAGE REDUCTION IN STACKED CHIP AND BOARD ASSEMBLIES
47
Patent #:
Issue Dt:
04/30/2002
Application #:
09875181
Filing Dt:
06/07/2001
Publication #:
Pub Dt:
02/28/2002
Title:
Column redundancy for prefetch
48
Patent #:
Issue Dt:
01/17/2006
Application #:
09875375
Filing Dt:
06/05/2001
Publication #:
Pub Dt:
12/05/2002
Title:
MULTI-MODAL MOTION ESTIMATION FOR VIDEO SEQUENCES
49
Patent #:
Issue Dt:
11/12/2002
Application #:
09875421
Filing Dt:
06/05/2001
Publication #:
Pub Dt:
12/05/2002
Title:
SEMICONDUCTOR DEVICES HAVING CONTACT PLUGS AND LOCAL INTERCONNECTS AND METHODS FOR MAKING THE SAME
50
Patent #:
Issue Dt:
04/13/2004
Application #:
09876095
Filing Dt:
06/08/2001
Publication #:
Pub Dt:
12/12/2002
Title:
SENSE AMPLIFIER AND ARCHITECTURE FOR OPEN DIGIT ARRAYS
51
Patent #:
Issue Dt:
08/13/2002
Application #:
09876674
Filing Dt:
06/07/2001
Publication #:
Pub Dt:
11/22/2001
Title:
FLASH MEMORY CELL FOR HIGH EFFICIENCY PROGRAMMING
52
Patent #:
Issue Dt:
08/30/2005
Application #:
09876848
Filing Dt:
06/05/2001
Publication #:
Pub Dt:
10/03/2002
Title:
ROW DRIVER CIRCUIT FOR A SENSOR INCLUDING A SHARED ROW-RESET BUS AND A CHARGE PUMP BOOSTING CIRCUIT
53
Patent #:
Issue Dt:
12/16/2003
Application #:
09877897
Filing Dt:
06/08/2001
Publication #:
Pub Dt:
10/04/2001
Title:
METHOD AND APPARATUS FOR TESTING THE TIMING OF INTEGRATED CIRCUITS
54
Patent #:
Issue Dt:
10/14/2003
Application #:
09878062
Filing Dt:
06/07/2001
Publication #:
Pub Dt:
12/12/2002
Title:
METHOD AND APPARATUS FOR UTILIZING STATIC QUEUES IN PROCESSOR STAGING
55
Patent #:
Issue Dt:
05/22/2007
Application #:
09878302
Filing Dt:
06/11/2001
Publication #:
Pub Dt:
12/12/2002
Title:
ALTERNATIVE METHOD USED TO PACKAGE MULTIMEDIA CARD BY TRANSFER MOLDING
56
Patent #:
Issue Dt:
10/08/2002
Application #:
09878432
Filing Dt:
06/12/2001
Title:
CLOCKED PASS TRANSISTOR AND COMPLEMENTARY PASS TRANSISTOR LOGIC CIRCUITS
57
Patent #:
Issue Dt:
07/09/2002
Application #:
09878576
Filing Dt:
06/11/2001
Publication #:
Pub Dt:
10/04/2001
Title:
DEVICE AND METHOD FOR LIMITING THE EXTENT TO WHICH CIRCUITS IN INTEGRATED CIRCUIT DICE ELECTRICALLY LOAD BOND PADS AND OTHER CIRCUIT NODES IN THE DICE
58
Patent #:
Issue Dt:
09/19/2006
Application #:
09879231
Filing Dt:
06/11/2001
Publication #:
Pub Dt:
02/28/2002
Title:
CAPACITOR CONSTRUCTIONS HAVING A CONDUCTIVE LAYER
59
Patent #:
Issue Dt:
01/20/2004
Application #:
09879602
Filing Dt:
06/12/2001
Publication #:
Pub Dt:
10/18/2001
Title:
METHOD FOR READING A VERTICAL GAIN CELL AND ARRAY FOR A DYNAMIC RANDOM ACCESS MEMORY
60
Patent #:
Issue Dt:
12/31/2002
Application #:
09879741
Filing Dt:
06/11/2001
Publication #:
Pub Dt:
10/04/2001
Title:
SEMICONDUCTOR PROCESSING METHODS OF FORMING INTEGRATED CIRCUITRY AND SEMICONDUCTOR PROCESSING METHODS OF FORMING DYNAMIC RANDOM ACCESS MEMORY (DRAM) CIRCUITRY
61
Patent #:
Issue Dt:
08/26/2003
Application #:
09879742
Filing Dt:
06/11/2001
Publication #:
Pub Dt:
11/01/2001
Title:
METHODS FOR FORMING WORDLINES, TRANSISTOR GATES, AND CONDUCTIVE INTERCONNECTS, AND WORDLINE, TRANSISTOR GATE, AND CONDUCTIVE INTERCONNECT STRUCTURES
62
Patent #:
Issue Dt:
02/18/2003
Application #:
09880617
Filing Dt:
06/13/2001
Title:
INPUT BUFFER WITH AUTOMATIC SWITCHING POINT ADJUSTMENT CIRCUITRY, AND SYNCHRONOUS DRAM DEVICE INCLUDING SAME
63
Patent #:
Issue Dt:
06/29/2004
Application #:
09881299
Filing Dt:
06/13/2001
Publication #:
Pub Dt:
10/18/2001
Title:
CONDUCTIVE CONNECTION FORMING METHODS, OXIDATION REDUCING METHODS, AND INTEGRATED CIRCUITS FORMED THEREBY
64
Patent #:
Issue Dt:
08/27/2002
Application #:
09881308
Filing Dt:
06/13/2001
Title:
SEMICONDUCTOR STRUCTURES, METHODS OF IMPLANTING DOPANTS INTO SEMICONDUCTOR STRUCTURES AND METHODS OF FORMING CMOS CONSTRUCTIONS
65
Patent #:
Issue Dt:
09/27/2005
Application #:
09881407
Filing Dt:
06/13/2001
Publication #:
Pub Dt:
12/19/2002
Title:
METHODS OF FORMING TRANSISTOR DEVICES
66
Patent #:
Issue Dt:
05/02/2006
Application #:
09881408
Filing Dt:
06/13/2001
Publication #:
Pub Dt:
12/19/2002
Title:
DIELECTRIC LAYER FORMING METHOD AND DEVICES FORMED THEREWITH
67
Patent #:
Issue Dt:
09/07/2004
Application #:
09881472
Filing Dt:
06/14/2001
Publication #:
Pub Dt:
12/19/2002
Title:
SEMICONDUCTOR MEMORY WITH WORDLINE TIMING
68
Patent #:
Issue Dt:
05/13/2003
Application #:
09882469
Filing Dt:
06/14/2001
Title:
SEMICONDUCTOR DIE WITH INTEGRAL DECOUPLING CAPACITOR
69
Patent #:
Issue Dt:
03/18/2003
Application #:
09882535
Filing Dt:
06/14/2001
Publication #:
Pub Dt:
12/26/2002
Title:
BIASING CIRCUIT FOR MULTI-LEVEL MEMORY CELLS
70
Patent #:
Issue Dt:
09/24/2002
Application #:
09882920
Filing Dt:
06/15/2001
Publication #:
Pub Dt:
12/20/2001
Title:
DYNAMIC FLASH MEMORY CELLS WITH ULTRA THIN TUNNEL OXIDES
71
Patent #:
Issue Dt:
09/10/2002
Application #:
09883609
Filing Dt:
06/18/2001
Publication #:
Pub Dt:
10/25/2001
Title:
BALL ARRAY LAYOUT IN CHIP ASSEMBLY
72
Patent #:
Issue Dt:
05/21/2002
Application #:
09884081
Filing Dt:
06/20/2001
Title:
DIFFERENTIAL INPUT BUFFER BIAS PULSER CIRCUIT
73
Patent #:
Issue Dt:
06/06/2006
Application #:
09884174
Filing Dt:
06/19/2001
Publication #:
Pub Dt:
12/19/2002
Title:
APPARATUS AND METHOD FOR CLOCK DOMAIN CROSSING WITH INTEGRATED DECODE
74
Patent #:
Issue Dt:
02/17/2004
Application #:
09884290
Filing Dt:
06/18/2001
Publication #:
Pub Dt:
10/25/2001
Title:
METHODS OF PATTERNING RADIATION, METHODS OF FORMING RADIATION-PATTERNING TOOLS, AND RADIATION-PATTERNING TOOLS
75
Patent #:
Issue Dt:
04/01/2003
Application #:
09885615
Filing Dt:
06/20/2001
Publication #:
Pub Dt:
12/26/2002
Title:
METHOD AND APPARATUS FOR CONDUCTING HEAT IN A FLIP-CHIP ASSEMBLY
76
Patent #:
Issue Dt:
10/07/2003
Application #:
09885624
Filing Dt:
06/20/2001
Publication #:
Pub Dt:
02/07/2002
Title:
INSULATED ELECTRODE STRUCTURES FOR A DISPLAY DEVICE
77
Patent #:
Issue Dt:
09/24/2002
Application #:
09886332
Filing Dt:
06/21/2001
Publication #:
Pub Dt:
11/22/2001
Title:
DIRECT WRITING OF LOW CARBON CONDUCTIVE MATERIAL
78
Patent #:
Issue Dt:
04/09/2002
Application #:
09886543
Filing Dt:
06/21/2001
Publication #:
Pub Dt:
02/28/2002
Title:
Methods for alternate bitline stress testing
79
Patent #:
Issue Dt:
09/24/2002
Application #:
09887214
Filing Dt:
06/22/2001
Publication #:
Pub Dt:
11/01/2001
Title:
METHOD OF FORMING A MASK
80
Patent #:
Issue Dt:
11/05/2002
Application #:
09887603
Filing Dt:
06/22/2001
Publication #:
Pub Dt:
11/01/2001
Title:
MASK FOR PRODUCING RECTANGULAR OPENINGS IN A SUBSTRATE
81
Patent #:
Issue Dt:
09/26/2006
Application #:
09888084
Filing Dt:
06/21/2001
Publication #:
Pub Dt:
02/28/2002
Title:
METHODS AND APPARATUS FOR ELECTRICAL, MECHANICAL AND/OR CHEMICAL REMOVAL OF CONDUCTIVE MATERIAL FROM A MICROELECTRONIC SUBSTRATE
82
Patent #:
Issue Dt:
01/07/2003
Application #:
09888252
Filing Dt:
06/22/2001
Publication #:
Pub Dt:
01/02/2003
Title:
CHARGING A CAPACITANCE OF A MEMORY CELL AND CHARGER
83
Patent #:
Issue Dt:
12/30/2003
Application #:
09888674
Filing Dt:
06/25/2001
Publication #:
Pub Dt:
01/02/2003
Title:
METHOD OF MAKING A SEMICONDUCTOR DEVICE HAVING AN OPENING IN A SOLDER MASK
84
Patent #:
Issue Dt:
10/22/2002
Application #:
09888725
Filing Dt:
06/25/2001
Publication #:
Pub Dt:
01/03/2002
Title:
METHOD TO FIND A VALUE WITHIN A RANGE USING WEIGHTED SUBRANGES
85
Patent #:
Issue Dt:
06/17/2003
Application #:
09888845
Filing Dt:
06/25/2001
Publication #:
Pub Dt:
11/22/2001
Title:
REMOVAL OF COPPER OXIDES FROM INTEGRATED INTERCONNECTS
86
Patent #:
Issue Dt:
04/22/2003
Application #:
09891438
Filing Dt:
06/25/2001
Publication #:
Pub Dt:
11/01/2001
Title:
PROCESS FOR THE MANUFACTURE OF INTEGRATED DEVICES WITH GATE OXIDE PROTECTION FROM MANUFACTURING PROCESS DAMAGE, AND PROTECTION STRUCTURE THEREFOR
87
Patent #:
Issue Dt:
09/09/2008
Application #:
09891523
Filing Dt:
06/27/2001
Publication #:
Pub Dt:
12/12/2002
Title:
PARALLEL CACHELETS
88
Patent #:
Issue Dt:
04/27/2004
Application #:
09891570
Filing Dt:
06/25/2001
Publication #:
Pub Dt:
11/22/2001
Title:
SEMICONDUCTOR PROCESSING METHODS OF FORMING AND UTILIZING ANTIREFLECTIVE MATERIAL LAYERS, AND METHODS OF FORMING TRANSISTOR GATE STACKS
89
Patent #:
Issue Dt:
09/09/2003
Application #:
09891575
Filing Dt:
06/25/2001
Publication #:
Pub Dt:
11/01/2001
Title:
SEMICONDUCTOR PROCESSING METHODS AND INTEGRATED CIRCUITRY
90
Patent #:
Issue Dt:
12/10/2002
Application #:
09891623
Filing Dt:
06/25/2001
Publication #:
Pub Dt:
06/13/2002
Title:
RISER CARD ASSEMBLY AND METHOD FOR ITS INSTALLATION
91
Patent #:
Issue Dt:
09/24/2002
Application #:
09892099
Filing Dt:
06/26/2001
Publication #:
Pub Dt:
02/28/2002
Title:
CLOCK GENERATION CIRCUITS
92
Patent #:
Issue Dt:
07/16/2002
Application #:
09892156
Filing Dt:
06/26/2001
Title:
METHOD AND PROCESS OF CONTACT TO A HEAT SOFTENED SOLDER BALL ARRAY
93
Patent #:
Issue Dt:
01/28/2003
Application #:
09892921
Filing Dt:
06/26/2001
Publication #:
Pub Dt:
12/26/2002
Title:
PACKAGING AND ASSEMBLY METHOD FOR OPTICAL COUPLING
94
Patent #:
Issue Dt:
11/19/2002
Application #:
09892956
Filing Dt:
06/27/2001
Publication #:
Pub Dt:
05/09/2002
Title:
STACKED LOCAL INTERCONNECT STRUCTURE AND METHOD OF FABRICATING SAME
95
Patent #:
Issue Dt:
03/22/2005
Application #:
09893616
Filing Dt:
06/29/2001
Publication #:
Pub Dt:
06/27/2002
Title:
Data transmission circuit for memory subsystem, has switching circuit that selectively connects or disconnects two data bus segments to respectively enable data transmission or I/O circuit connection
96
Patent #:
Issue Dt:
11/11/2003
Application #:
09893779
Filing Dt:
06/27/2001
Publication #:
Pub Dt:
01/02/2003
Title:
ON-DIE CACHE MEMORY WITH REPEATERS
97
Patent #:
Issue Dt:
06/24/2008
Application #:
09893868
Filing Dt:
06/29/2001
Publication #:
Pub Dt:
01/16/2003
Title:
CASCADED DOMINO FOUR-TO-TWO REDUCER CIRCUIT AND METHOD
98
Patent #:
Issue Dt:
11/11/2003
Application #:
09894194
Filing Dt:
06/27/2001
Publication #:
Pub Dt:
11/08/2001
Title:
METHODS OF PHOTO-PROCESSING PHOTORESIST
99
Patent #:
Issue Dt:
10/07/2003
Application #:
09894513
Filing Dt:
06/27/2001
Publication #:
Pub Dt:
01/02/2003
Title:
CACHE ARCHITECTURE FOR PIPELINED OPERATION WITH ON-DIE PROCESSOR
100
Patent #:
Issue Dt:
12/09/2003
Application #:
09894638
Filing Dt:
06/27/2001
Publication #:
Pub Dt:
01/02/2003
Title:
CACHE ARCHITECTURE WITH REDUNDANT SUB ARRAY
Assignors
1
Exec Dt:
07/03/2018
2
Exec Dt:
07/03/2018
Assignee
1
10 S. DEARBORN
7TH FLOOR
CHICAGO, ILLINOIS 60603
Correspondence name and address
MARCELA ROBLEDO
2475 HANOVER STREET
PALO ALTO, CA 94304

Search Results as of: 05/15/2024 01:04 PM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT