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Reel/Frame:047540/0001   Pages: 843
Recorded: 07/13/2018
Attorney Dkt #:509265/2155
Conveyance: SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 16531
Page 27 of 166
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1
Patent #:
6600335
Issue Dt:
07/29/2003
Application #:
10008843
Filing Dt:
11/13/2001
Publication #:
US20020043986
Pub Dt:
04/18/2002
Title:
BALL GRID ARRAY CHIP PACKAGES HAVING IMPROVED TESTING AND STACKING CHARACTERISTICS
2
Patent #:
6420789
Issue Dt:
07/16/2002
Application #:
10008891
Filing Dt:
11/13/2001
Title:
BALL GRID ARRAY CHIP PACKAGES HAVING IMPROVED TESTING AND STACKING CHARACTERISTICS
3
Patent #:
6635948
Issue Dt:
10/21/2003
Application #:
10008900
Filing Dt:
12/05/2001
Publication #:
US20030102517
Pub Dt:
06/05/2003
Title:
SEMICONDUCTOR DEVICE WITH ELECTRICALLY COUPLED SPIRAL INDUCTORS
4
Patent #:
6856733
Issue Dt:
02/15/2005
Application #:
10008922
Filing Dt:
12/07/2001
Publication #:
US20030108294
Pub Dt:
06/12/2003
Title:
1 X N FANOUT WAVEGUIDE PHOTODETECTOR
5
Patent #:
6747327
Issue Dt:
06/08/2004
Application #:
10010025
Filing Dt:
12/06/2001
Publication #:
US20020053693
Pub Dt:
05/09/2002
Title:
TRANSISTOR WITH NITROGEN-HARDENED GATE OXIDE
6
Patent #:
6573765
Issue Dt:
06/03/2003
Application #:
10010760
Filing Dt:
11/30/2001
Publication #:
US20020101272
Pub Dt:
08/01/2002
Title:
INPUT-OUTPUT BUFFER CIRCUIT AND METHOD FOR AVOIDING INADVERTENT CONDUCTION OF A PULL-UP TRANSISTOR
7
Patent #:
6624660
Issue Dt:
09/23/2003
Application #:
10010820
Filing Dt:
12/06/2001
Publication #:
US20030107406
Pub Dt:
06/12/2003
Title:
CMOS OUTPUT DRIVER FOR SEMICONDUCTOR DEVICE AND RELATED METHOD FOR IMPROVING LATCH-UP IMMUNITY IN A CMOS OUTPUT DRIVER
8
Patent #:
6448664
Issue Dt:
09/10/2002
Application #:
10011196
Filing Dt:
11/13/2001
Title:
BALL GRID ARRAY CHIP PACKAGES HAVING IMPROVED TESTING AND STACKING CHARACTERISTICS
9
Patent #:
6844255
Issue Dt:
01/18/2005
Application #:
10011212
Filing Dt:
10/09/2001
Publication #:
US20030068879
Pub Dt:
04/10/2003
Title:
METHODS OF PROVIDING AN INTERLEVEL DIELECTRIC LAYER INTERMEDIATE DIFFERENT ELEVATION CONDUCTIVE METAL LAYERS IN THE FABRICATION OF INTEGRATED CIRCUITRY
10
Patent #:
6740971
Issue Dt:
05/25/2004
Application #:
10011525
Filing Dt:
11/05/2001
Publication #:
US20020042160
Pub Dt:
04/11/2002
Title:
CAVITY BALL GRID ARRAY APPARATUS HAVING IMPROVED INDUCTANCE CHARACTERISTICS
11
Patent #:
6906417
Issue Dt:
06/14/2005
Application #:
10011686
Filing Dt:
11/13/2001
Publication #:
US20020047216
Pub Dt:
04/25/2002
Title:
BALL GRID ARRAY UTILIZING SOLDER BALLS HAVING A CORE MATERIAL COVERED BY A METAL LAYER
12
Patent #:
6882031
Issue Dt:
04/19/2005
Application #:
10012665
Filing Dt:
10/30/2001
Publication #:
US20020074622
Pub Dt:
06/20/2002
Title:
AMMONIA GAS PASSIVATION ON NITRIDE ENCAPSULATED DEVICES
13
Patent #:
6576553
Issue Dt:
06/10/2003
Application #:
10012808
Filing Dt:
11/13/2001
Publication #:
US20020042201
Pub Dt:
04/11/2002
Title:
CHEMICAL MECHANICAL PLANARIZATION OF CONDUCTIVE MATERIAL
14
Patent #:
6563223
Issue Dt:
05/13/2003
Application #:
10013090
Filing Dt:
12/07/2001
Publication #:
US20020050641
Pub Dt:
05/02/2002
Title:
INTERCONNECTION COMPONENT FOR FACILITATING TESTING OF PACKAGED INTEGRATED CIRCUITS
15
Patent #:
6628565
Issue Dt:
09/30/2003
Application #:
10014013
Filing Dt:
11/05/2001
Publication #:
US20030086328
Pub Dt:
05/08/2003
Title:
PREDECODE COLUMN ARCHITECTURE AND METHOD
16
Patent #:
6806187
Issue Dt:
10/19/2004
Application #:
10015811
Filing Dt:
11/02/2001
Publication #:
US20020079581
Pub Dt:
06/27/2002
Title:
ELECTRICAL CONTACT FOR HIGH DIELECTRIC CONSTANT CAPACITORS AND METHOD FOR FABRICATING THE SAME
17
Patent #:
6545510
Issue Dt:
04/08/2003
Application #:
10016513
Filing Dt:
12/10/2001
Title:
INPUT BUFFER AND METHOD FOR VOLTAGE LEVEL DETECTION
18
Patent #:
6667903
Issue Dt:
12/23/2003
Application #:
10017502
Filing Dt:
12/14/2001
Publication #:
US20020149963
Pub Dt:
10/17/2002
Title:
PROGRAMMING METHOD FOR A MULTILEVEL MEMORY CELL
19
Patent #:
6645845
Issue Dt:
11/11/2003
Application #:
10017557
Filing Dt:
12/14/2001
Publication #:
US20020119624
Pub Dt:
08/29/2002
Title:
INTEGRATED CIRCUITRY AND METHODS OF FORMING CIRCUITRY
20
Patent #:
6614691
Issue Dt:
09/02/2003
Application #:
10017657
Filing Dt:
12/12/2001
Publication #:
US20030107923
Pub Dt:
06/12/2003
Title:
FLASH MEMORY HAVING SEPARATE READ AND WRITE PATHS
21
Patent #:
6795326
Issue Dt:
09/21/2004
Application #:
10017664
Filing Dt:
12/12/2001
Publication #:
US20030107092
Pub Dt:
06/12/2003
Title:
FLASH ARRAY IMPLEMENTATION WITH LOCAL AND GLOBAL BIT LINES
22
Patent #:
6621720
Issue Dt:
09/16/2003
Application #:
10019771
Filing Dt:
12/27/2001
Title:
VOLTAGE PRODUCTION CIRCUIT
23
Patent #:
6889430
Issue Dt:
05/10/2005
Application #:
10020352
Filing Dt:
12/12/2001
Publication #:
US20020043397
Pub Dt:
04/18/2002
Title:
METHOD OF SELECTIVELY ADJUSTING SURFACE TENSION OF SOLDERMASK MATERIAL
24
Patent #:
6545899
Issue Dt:
04/08/2003
Application #:
10020371
Filing Dt:
12/12/2001
Title:
ROM EMBEDDED DRAM WITH BIAS SENSING
25
Patent #:
7325025
Issue Dt:
01/29/2008
Application #:
10020447
Filing Dt:
12/18/2001
Publication #:
US20030115237
Pub Dt:
06/19/2003
Title:
LOOK-AHEAD CARRY ADDER CIRCUIT
26
Patent #:
6529386
Issue Dt:
03/04/2003
Application #:
10021555
Filing Dt:
12/12/2001
Publication #:
US20020109975
Pub Dt:
08/15/2002
Title:
APPARATUS AND METHOD FOR RETAINING A CIRCUIT BOARD
27
Patent #:
6472939
Issue Dt:
10/29/2002
Application #:
10021870
Filing Dt:
12/17/2001
Publication #:
US20020053949
Pub Dt:
05/09/2002
Title:
LOW POWER SUPPLY CMOS DIFFERENTIAL AMPLIFIER TOPOLOGY
28
Patent #:
6522570
Issue Dt:
02/18/2003
Application #:
10022036
Filing Dt:
12/13/2001
Title:
SYSTEM AND METHOD FOR INHIBITING IMPRINTING OF CAPACITOR STRUCTURES OF A MEMORY
29
Patent #:
6743641
Issue Dt:
06/01/2004
Application #:
10022721
Filing Dt:
12/20/2001
Publication #:
US20030119210
Pub Dt:
06/26/2003
Title:
METHOD OF IMPROVING SURFACE PLANARITY PRIOR TO MRAM BIT MATERIAL DEPOSITION
30
Patent #:
6873538
Issue Dt:
03/29/2005
Application #:
10022722
Filing Dt:
12/20/2001
Publication #:
US20030117831
Pub Dt:
06/26/2003
Title:
PROGRAMMABLE CONDUCTOR RANDOM ACCESS MEMORY AND A METHOD FOR WRITING THERETO
31
Patent #:
6391681
Issue Dt:
05/21/2002
Application #:
10023036
Filing Dt:
12/19/2001
Title:
SEMICONDUCTOR COMPONENT HAVING SELECTED TERMINAL CONTACTS WITH MULTIPLE ELECTRICAL PATHS
32
Patent #:
7202556
Issue Dt:
04/10/2007
Application #:
10023049
Filing Dt:
12/20/2001
Publication #:
US20030116866
Pub Dt:
06/26/2003
Title:
SEMICONDUCTOR PACKAGE HAVING SUBSTRATE WITH MULTI-LAYER METAL BUMPS
33
Patent #:
6522001
Issue Dt:
02/18/2003
Application #:
10024256
Filing Dt:
12/17/2001
Publication #:
US20020068429
Pub Dt:
06/06/2002
Title:
LOCAL INTERCONNECT STRUCTURES AND METHODS FOR MAKING THE SAME
34
Patent #:
7132711
Issue Dt:
11/07/2006
Application #:
10028001
Filing Dt:
12/20/2001
Publication #:
US20030043633
Pub Dt:
03/06/2003
Title:
PROGRAMMABLE ARRAY LOGIC OR MEMORY WITH P-CHANNEL DEVICES AND ASYMMETRICAL TUNNEL BARRIERS
35
Patent #:
6884723
Issue Dt:
04/26/2005
Application #:
10028040
Filing Dt:
12/21/2001
Publication #:
US20030119319
Pub Dt:
06/26/2003
Title:
METHODS FOR PLANARIZATION OF GROUP VIII METAL-CONTAINING SURFACES USING COMPLEXING AGENTS
36
Patent #:
6577274
Issue Dt:
06/10/2003
Application #:
10028472
Filing Dt:
12/19/2001
Publication #:
US20030112182
Pub Dt:
06/19/2003
Title:
METHOD AND APPARATUS FOR CONTROLLING ACCESS TO MOBILE DEVICES
37
Patent #:
7121926
Issue Dt:
10/17/2006
Application #:
10028616
Filing Dt:
12/21/2001
Publication #:
US20030119426
Pub Dt:
06/26/2003
Title:
METHODS FOR PLANARIZATION OF GROUP VIII METAL-CONTAINING SURFACES USING A FIXED ABRASIVE ARTICLE
38
Patent #:
6953730
Issue Dt:
10/11/2005
Application #:
10028643
Filing Dt:
12/20/2001
Publication #:
US20030119246
Pub Dt:
06/26/2003
Title:
LOW-TEMPERATURE GROWN HIGH QUALITY ULTRA-THIN COTIO3 GATE DIELECTRICS
39
Patent #:
6599805
Issue Dt:
07/29/2003
Application #:
10029573
Filing Dt:
12/20/2001
Publication #:
US20020064920
Pub Dt:
05/30/2002
Title:
METHODS OF FORMING TRANSISTORS AND SEMICONDUCTOR PROCESSING METHODS OF FORMING TRANSISTOR GATES
40
Patent #:
6703299
Issue Dt:
03/09/2004
Application #:
10032115
Filing Dt:
12/21/2001
Publication #:
US20030116864
Pub Dt:
06/26/2003
Title:
UNDERFILL PROCESS FOR FLIP-CHIP DEVICE
41
Patent #:
6652799
Issue Dt:
11/25/2003
Application #:
10032129
Filing Dt:
12/31/2001
Publication #:
US20020056942
Pub Dt:
05/16/2002
Title:
METHOD FOR MOLDING SEMICONDUCTOR COMPONENTS
42
Patent #:
6643192
Issue Dt:
11/04/2003
Application #:
10032277
Filing Dt:
12/21/2001
Publication #:
US20030012058
Pub Dt:
01/16/2003
Title:
VOLTAGE AND TEMPERATURE COMPENSATED PULSE GENERATOR
43
Patent #:
6584035
Issue Dt:
06/24/2003
Application #:
10032375
Filing Dt:
12/21/2001
Publication #:
US20020172088
Pub Dt:
11/21/2002
Title:
SUPPLY NOISE REDUCTION IN MEMORY DEVICE COLUMN SELECTION
44
Patent #:
6525983
Issue Dt:
02/25/2003
Application #:
10032643
Filing Dt:
12/28/2001
Publication #:
US20020093866
Pub Dt:
07/18/2002
Title:
DEVICE AND METHOD FOR REDUCING STANDBY CURRENT IN A MEMORY DEVICE BY DISCONNECTING BIT LINE LOAD DEVICES IN UNUSED COLUMNS OF THE MEMORY DEVICE FROM A SUPPLY VOLTAGE
45
Patent #:
6531192
Issue Dt:
03/11/2003
Application #:
10032655
Filing Dt:
10/28/2001
Publication #:
US20020051847
Pub Dt:
05/02/2002
Title:
CHEMICAL VAPOR DEPOSITION PROCESS FOR DEPOSITING TITANIUM NITRIDE FILMS FROM AN ORGANO-METALLIC COMPOUND
46
Patent #:
6555463
Issue Dt:
04/29/2003
Application #:
10032730
Filing Dt:
12/28/2001
Publication #:
US20020068440
Pub Dt:
06/06/2002
Title:
METHODS OF FABRICATING BURIED DIGIT LINES
47
Patent #:
6777813
Issue Dt:
08/17/2004
Application #:
10032877
Filing Dt:
10/24/2001
Publication #:
US20030168741
Pub Dt:
09/11/2003
Title:
FILL PATTERN GENERATION FOR SPIN-ON GLASS AND RELATED SELF-PLANARIZATION DEPOSITION
48
Patent #:
6919220
Issue Dt:
07/19/2005
Application #:
10033233
Filing Dt:
12/28/2001
Publication #:
US20020052105
Pub Dt:
05/02/2002
Title:
METHOD OF MAKING CHIP PACKAGE WITH GREASE HEAT SINK
49
Patent #:
6750547
Issue Dt:
06/15/2004
Application #:
10033340
Filing Dt:
12/26/2001
Publication #:
US20030116861
Pub Dt:
06/26/2003
Title:
MULTI-SUBSTRATE MICROELECTRONIC PACKAGES AND METHODS FOR MANUFACTURE
50
Patent #:
6555473
Issue Dt:
04/29/2003
Application #:
10033428
Filing Dt:
12/27/2001
Publication #:
US20020052101
Pub Dt:
05/02/2002
Title:
FIELD EFFECT TRANSISTORS
51
Patent #:
6835995
Issue Dt:
12/28/2004
Application #:
10033656
Filing Dt:
12/27/2001
Publication #:
US20020105084
Pub Dt:
08/08/2002
Title:
LOW DIELECTRIC CONSTANT MATERIAL FOR INTEGRATED CIRCUIT FABRICATION
52
Patent #:
6650153
Issue Dt:
11/18/2003
Application #:
10033711
Filing Dt:
12/28/2001
Publication #:
US20020153928
Pub Dt:
10/24/2002
Title:
GENERATOR CIRCUIT FOR VOLTAGE RAMPS AND CORRESPONDING VOLTAGE GENERATION METHOD
53
Patent #:
6693012
Issue Dt:
02/17/2004
Application #:
10034778
Filing Dt:
12/27/2001
Publication #:
US20020050621
Pub Dt:
05/02/2002
Title:
METHOD AND DEVICE TO REDUCE GATE-INDUCED DRAIN LEAKAGE (GIDL) CURRENT IN THIN GATE OXIDE MOSFETS
54
Patent #:
6870276
Issue Dt:
03/22/2005
Application #:
10034924
Filing Dt:
12/26/2001
Title:
METHOD AND APPARATUS FOR SUPPORTING MICROELECTRONIC SUBSTRATES
55
Patent #:
6700226
Issue Dt:
03/02/2004
Application #:
10035006
Filing Dt:
12/27/2001
Publication #:
US20020149089
Pub Dt:
10/17/2002
Title:
MULTI-EMITTER BIPOLAR TRANSISTOR FOR BANDGAP REFERENCE CIRCUITS
56
Patent #:
6909656
Issue Dt:
06/21/2005
Application #:
10035197
Filing Dt:
01/04/2002
Publication #:
US20030128612
Pub Dt:
07/10/2003
Title:
PCRAM REWRITE PREVENTION
57
Patent #:
6485356
Issue Dt:
11/26/2002
Application #:
10035543
Filing Dt:
12/28/2001
Publication #:
US20020072311
Pub Dt:
06/13/2002
Title:
METHOD AND APPARATUS FOR MECHANICAL AND CHEMICAL-MECHANICAL PLANARIZATION OF MICROELECTRONIC SUBSTRATES WITH METAL COMPOUND ABRASIVES
58
Patent #:
6655758
Issue Dt:
12/02/2003
Application #:
10035909
Filing Dt:
12/19/2001
Publication #:
US20020118573
Pub Dt:
08/29/2002
Title:
METHOD FOR STORING DATA IN A NONVOLATILE MEMORY
59
Patent #:
6687159
Issue Dt:
02/03/2004
Application #:
10036337
Filing Dt:
12/19/2001
Publication #:
US20020105835
Pub Dt:
08/08/2002
Title:
METHOD OF PROGRAMMING A PLURALITY OF MEMORY CELLS CONNECTED IN PARALLEL, AND A PROGRAMMING CIRCUIT THEREFOR
60
Patent #:
6687161
Issue Dt:
02/03/2004
Application #:
10036751
Filing Dt:
12/21/2001
Publication #:
US20020172076
Pub Dt:
11/21/2002
Title:
SENSING SCHEME FOR LOW-VOLTAGE FLASH MEMORY
61
Patent #:
6618304
Issue Dt:
09/09/2003
Application #:
10036772
Filing Dt:
12/21/2001
Publication #:
US20030117871
Pub Dt:
06/26/2003
Title:
MEMORY MODULE WITH TEST MODE
62
Patent #:
6743681
Issue Dt:
06/01/2004
Application #:
10037081
Filing Dt:
11/09/2001
Publication #:
US20030089942
Pub Dt:
05/15/2003
Title:
METHODS OF FABRICATING GATE AND STORAGE DIELECTRIC STACKS HAVING SILICON-RICH-NITRIDE
63
Patent #:
6744134
Issue Dt:
06/01/2004
Application #:
10037205
Filing Dt:
01/04/2002
Publication #:
US20020058396
Pub Dt:
05/16/2002
Title:
USE OF A REFERENCE FIDUCIAL ON A SEMICONDUCTOR PACKAGE TO MONITOR AND CONTROL A SINGULATION METHOD
64
Patent #:
6624653
Issue Dt:
09/23/2003
Application #:
10037562
Filing Dt:
01/07/2002
Title:
METHOD AND SYSTEM FOR WAFER LEVEL TESTING AND BURNING-IN SEMICONDUCTOR COMPONENTS
65
Patent #:
6606248
Issue Dt:
08/12/2003
Application #:
10037948
Filing Dt:
01/04/2002
Publication #:
US20030128528
Pub Dt:
07/10/2003
Title:
UNIVERSAL MEMORY MODULE/PCB STORAGE, TRANSPORT, AUTOMATION HANDLING TRAY
66
Patent #:
6537856
Issue Dt:
03/25/2003
Application #:
10038222
Filing Dt:
10/19/2001
Publication #:
US20020058359
Pub Dt:
05/16/2002
Title:
METHOD OF ATTACHING A SEMICONDUCTOR CHIP TO A LEADFRAME WITH A FOOTPRINT OF ABOUT THE SAME SIZE AS THE CHIP AND PACKAGES FORMED THEREBY
67
Patent #:
6560317
Issue Dt:
05/06/2003
Application #:
10038411
Filing Dt:
01/03/2002
Title:
RECEIVING CALLER IDENTIFICATION INFORMATION WITH A TELECOMMUNICATIONS DEVICE FOR THE DEAF
68
Patent #:
6605984
Issue Dt:
08/12/2003
Application #:
10038499
Filing Dt:
01/02/2002
Publication #:
US20030122609
Pub Dt:
07/03/2003
Title:
CHARGE PUMP RIPPLE REDUCTION
69
Patent #:
7272211
Issue Dt:
09/18/2007
Application #:
10038917
Filing Dt:
01/03/2002
Publication #:
US20030123624
Pub Dt:
07/03/2003
Title:
PROPERTY MANAGEMENT SYSTEM PROTOCOL AUTO-DETECTION
70
Patent #:
7161999
Issue Dt:
01/09/2007
Application #:
10038956
Filing Dt:
01/02/2002
Publication #:
US20030123588
Pub Dt:
07/03/2003
Title:
SYNCHRONIZING DATA OR SIGNAL TRANSFER ACROSS CLOCKED LOGIC DOMAINS
71
Patent #:
6519658
Issue Dt:
02/11/2003
Application #:
10039085
Filing Dt:
01/04/2002
Publication #:
US20020065971
Pub Dt:
05/30/2002
Title:
MEMORY UNIT AND METHOD OF ASSEMBLING A COMPUTER
72
Patent #:
6677233
Issue Dt:
01/13/2004
Application #:
10039095
Filing Dt:
01/02/2002
Publication #:
US20030124840
Pub Dt:
07/03/2003
Title:
MATERIAL DEPOSITION FROM A LIQUEFIED GAS SOLUTION
73
Patent #:
6600207
Issue Dt:
07/29/2003
Application #:
10039456
Filing Dt:
12/31/2001
Publication #:
US20020058405
Pub Dt:
05/16/2002
Title:
A STRUCTURE TO REDUCE LINE-LINE CAPACITANCE WITH LOW-K MATERIAL
74
Patent #:
6774443
Issue Dt:
08/10/2004
Application #:
10039517
Filing Dt:
01/03/2002
Publication #:
US20020060348
Pub Dt:
05/23/2002
Title:
SYSTEM AND DEVICE INCLUDING A BARRIER LAYER
75
Patent #:
7593318
Issue Dt:
09/22/2009
Application #:
10041543
Filing Dt:
01/07/2002
Publication #:
US20030128699
Pub Dt:
07/10/2003
Title:
METHOD AND APPARATUS FOR HEADER UPDATING
76
Patent #:
6567296
Issue Dt:
05/20/2003
Application #:
10041684
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Title:
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Title:
DYNAMIC RANGE EXTENSION FOR CMOS IMAGE SENSORS
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Title:
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Title:
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Title:
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SEMICONDUCTOR DEVICE INCORPORATING AN ELECTRICAL CONTACT TO AN INTERNAL CONDUCTIVE LAYER AND METHOD FOR MAKING THE SAME
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Title:
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Title:
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Title:
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Assignors
1
MICRON TECHNOLOGY, INC.
Exec Dt:
07/03/2018
2
MICRON SEMICONDUCTOR PRODUCTS, INC.
Exec Dt:
07/03/2018
Assignee
1
JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
10 S. DEARBORN
7TH FLOOR
CHICAGO, ILLINOIS 60603
Correspondence name and address
MARCELA ROBLEDO
2475 HANOVER STREET
PALO ALTO, CA 94304

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