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Reel/Frame:	047540/0001			Pages:	843
		Recorded:	07/13/2018
Attorney Dkt #:	509265/2155
Conveyance:	SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 16531
Page 31 of 166
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Patent #:	6605985	Issue Dt:	08/12/2003	Application #:	10162135	Filing Dt:	06/03/2002
Publication #:	US20030034827	Pub Dt:	02/20/2003
Title:	HIGH-EFFICIENCY POWER CHARGE PUMP SUPPLYING HIGH DC OUTPUT CURRENTS

Patent #:	6784062	Issue Dt:	08/31/2004	Application #:	10162289	Filing Dt:	06/03/2002
Publication #:	US20030224574	Pub Dt:	12/04/2003
Title:	TRANSISTOR FORMATION FOR SEMICONDUCTOR DEVICES

Patent #:	6835659	Issue Dt:	12/28/2004	Application #:	10163285	Filing Dt:	06/04/2002
Publication #:	US20030224597	Pub Dt:	12/04/2003
Title:	ELECTRICAL COUPLING STACK AND PROCESSES FOR MAKING SAME

Patent #:	6614116	Issue Dt:	09/02/2003	Application #:	10163289	Filing Dt:	06/04/2002
Title:	BURIED DIGIT LINE STACK AND PROCESS FOR MAKING SAME

Patent #:	6522577	Issue Dt:	02/18/2003	Application #:	10163476	Filing Dt:	06/05/2002
Title:	SYSTEM AND METHOD FOR ENABLING CHIP LEVEL ERASING AND WRITING FOR MAGNETIC RANDOM ACCESS MEMORY DEVICES

Patent #:	7205218	Issue Dt:	04/17/2007	Application #:	10163686	Filing Dt:	06/05/2002
Publication #:	US20030228747	Pub Dt:	12/11/2003
Title:	Method including forming gate dielectrics having multiple lanthanide oxide layers

Patent #:	6812095	Issue Dt:	11/02/2004	Application #:	10164048	Filing Dt:	06/04/2002
Publication #:	US20030137004	Pub Dt:	07/24/2003
Title:	METHODS OF FORMING FORMING FLOATING GATE TRANSISTORS USING STI

Patent #:	6910874	Issue Dt:	06/28/2005	Application #:	10164086	Filing Dt:	06/04/2002
Publication #:	US20020173070	Pub Dt:	11/21/2002
Title:	APPARATUS FOR ENCAPSULATING A MULTI-CHIP SUBSTRATE ARRAY

Patent #:	6633183	Issue Dt:	10/14/2003	Application #:	10164115	Filing Dt:	06/05/2002
Publication #:	US20020149391	Pub Dt:	10/17/2002
Title:	ANTIFUSE REROUTE OF DIES

Patent #:	RE38685	Issue Dt:	01/11/2005	Application #:	10164354	Filing Dt:	06/05/2002
Title:	DATA-OUTPUT DRIVER CIRCUIT AND METHOD

Patent #:	6900521	Issue Dt:	05/31/2005	Application #:	10164611	Filing Dt:	06/10/2002
Publication #:	US20030227072	Pub Dt:	12/11/2003
Title:	VERTICAL TRANSISTORS AND OUTPUT PREDICTION LOGIC CIRCUITS CONTAINING SAME

Patent #:	6825135	Issue Dt:	11/30/2004	Application #:	10164646	Filing Dt:	06/06/2002
Publication #:	US20030228771	Pub Dt:	12/11/2003
Title:	ELIMINATION OF DENDRITE FORMATION DURING METAL/CHALCOGENIDE GLASS DEPOSITION

Patent #:	6917228	Issue Dt:	07/12/2005	Application #:	10164735	Filing Dt:	06/06/2002
Publication #:	US20030227308	Pub Dt:	12/11/2003
Title:	DELAY LOCKED LOOP CIRCUIT WITH TIME DELAY QUANTIFIER AND CONTROL

Patent #:	6754861	Issue Dt:	06/22/2004	Application #:	10164975	Filing Dt:	06/06/2002
Publication #:	US20020152437	Pub Dt:	10/17/2002
Title:	CIRCUITRY FOR AND SYSTEM AND SUBSTRATE WITH CIRCUITRY FOR ALIGNING OUTPUT SIGNALS IN MASSIVELY PARALLEL TESTERS AND OTHER ELECTRONIC DEVICES

Patent #:	6849464	Issue Dt:	02/01/2005	Application #:	10165301	Filing Dt:	06/10/2002
Publication #:	US20030228710	Pub Dt:	12/11/2003
Title:	MULTILAYER DIELECTRIC TUNNEL BARRIER USED IN MAGNETIC TUNNEL JUNCTION DEVICES, AND ITS METHOD OF FABRICATION

Patent #:	6781907	Issue Dt:	08/24/2004	Application #:	10165665	Filing Dt:	06/06/2002
Publication #:	US20030227792	Pub Dt:	12/11/2003
Title:	TEMPERATURE COMPENSATED T-RAM MEMORY DEVICE AND METHOD

Patent #:	6836145	Issue Dt:	12/28/2004	Application #:	10165666	Filing Dt:	06/06/2002
Publication #:	US20030227294	Pub Dt:	12/11/2003
Title:	PROGRAMMING CIRCUIT AND METHOD HAVING EXTENDED DURATION PROGRAMMING CAPABILITIES

Patent #:	6822886	Issue Dt:	11/23/2004	Application #:	10166696	Filing Dt:	06/12/2002
Publication #:	US20030058673	Pub Dt:	03/27/2003
Title:	REDUCING SIGNAL SWING IN A MATCH DETECTION CIRCUIT

Patent #:	6891415	Issue Dt:	05/10/2005	Application #:	10167195	Filing Dt:	06/11/2002
Publication #:	US20030227305	Pub Dt:	12/11/2003
Title:	METHOD AND APPARATUS FOR ENABLING A TIMING SYNCHRONIZATION CIRCUIT

Patent #:	7579681	Issue Dt:	08/25/2009	Application #:	10167284	Filing Dt:	06/11/2002
Publication #:	US20030227079	Pub Dt:	12/11/2003
Title:	SUPER HIGH DENSITY MODULE WITH INTEGRATED WAFER LEVEL PACKAGES

Patent #:	6791893	Issue Dt:	09/14/2004	Application #:	10170161	Filing Dt:	06/12/2002
Publication #:	US20030231541	Pub Dt:	12/18/2003
Title:	REGULATING VOLTAGES IN SEMICONDUCTOR DEVICES

Patent #:	6691247	Issue Dt:	02/10/2004	Application #:	10170174	Filing Dt:	06/11/2002
Publication #:	US20030084370	Pub Dt:	05/01/2003
Title:	CIRCUIT AND METHOD FOR MASKING A DORMANT MEMORY CELL

Patent #:	6889902	Issue Dt:	05/10/2005	Application #:	10170508	Filing Dt:	06/12/2002
Publication #:	US20020148897	Pub Dt:	10/17/2002
Title:	DESCRIPTOR FOR IDENTIFYING A DEFECTIVE DIE SITE AND METHODS OF FORMATION

Patent #:	6716716	Issue Dt:	04/06/2004	Application #:	10170748	Filing Dt:	06/13/2002
Publication #:	US20030073285	Pub Dt:	04/17/2003
Title:	EVEN NUCLEATION BETWEEN SILICON AND OXIDE SURFACES FOR THIN SILICON NITRIDE FILM GROWTH

Patent #:	7133999	Issue Dt:	11/07/2006	Application #:	10171049	Filing Dt:	06/12/2002
Publication #:	US20030191922	Pub Dt:	10/09/2003
Title:	METHOD AND SYSTEM FOR LOCAL MEMORY ADDRESSING IN SINGLE INSTRUCTION, MULTIPLE DATA COMPUTER SYSTEM

Patent #:	6654287	Issue Dt:	11/25/2003	Application #:	10171078	Filing Dt:	06/12/2002
Publication #:	US20020186594	Pub Dt:	12/12/2002
Title:	METHOD OF RE-PROGRAMMING AN ARRAY OF NON-VOLATILE MEMORY CELLS, IN PARTICULAR OF THE NOR ARCHITECTURE FLASH TYPE, AFTER AN ERASE OPERATION, AND A CORRESPONDING MEMORY DEVICE

Patent #:	6673707	Issue Dt:	01/06/2004	Application #:	10173935	Filing Dt:	06/17/2002
Publication #:	US20020158321	Pub Dt:	10/31/2002
Title:	METHOD OF FORMING SEMICONDUCTOR DEVICE UTILIZING DIE ACTIVE SURFACES FOR LATERALLY EXTENDING DIE INTERNAL AND EXTERNAL CONNECTIONS

Patent #:	6599832	Issue Dt:	07/29/2003	Application #:	10174164	Filing Dt:	06/17/2002
Publication #:	US20020155696	Pub Dt:	10/24/2002
Title:	SILICIDE PATTERN STRUCTURES AND METHODS OF FABRICATING THE SAME

Patent #:	6744669	Issue Dt:	06/01/2004	Application #:	10174193	Filing Dt:	06/17/2002
Publication #:	US20030006742	Pub Dt:	01/09/2003
Title:	MEMORY CIRCUIT INCLUDING BOOSTER PUMP FOR PROGRAMMING VOLTAGE GENERATION

Patent #:	6600343	Issue Dt:	07/29/2003	Application #:	10174206	Filing Dt:	06/17/2002
Publication #:	US20020149399	Pub Dt:	10/17/2002
Title:	HIGH SPEED LOW POWER INPUT BUFFER

Patent #:	6538918	Issue Dt:	03/25/2003	Application #:	10174214	Filing Dt:	06/17/2002
Publication #:	US20020154539	Pub Dt:	10/24/2002
Title:	PULSED WRITE TECHNIQUES FOR MAGNETO-RESISTIVE MEMORIES

Patent #:	6532168	Issue Dt:	03/11/2003	Application #:	10174215	Filing Dt:	06/17/2002
Title:	PULSED WRITE TECHNIQUES FOR MAGNETO-RESISTIVE MEMORIES

Patent #:	7420239	Issue Dt:	09/02/2008	Application #:	10174434	Filing Dt:	06/17/2002
Publication #:	US20020192975	Pub Dt:	12/19/2002
Title:	DIELECTRIC LAYER FORMING METHOD AND DEVICES FORMED THEREWITH

Patent #:	6787413	Issue Dt:	09/07/2004	Application #:	10174436	Filing Dt:	06/17/2002
Publication #:	US20020192979	Pub Dt:	12/19/2002
Title:	CAPACITOR STRUCTURE FORMING METHODS

Patent #:	6785167	Issue Dt:	08/31/2004	Application #:	10174746	Filing Dt:	06/18/2002
Publication #:	US20030231519	Pub Dt:	12/18/2003
Title:	ROM EMBEDDED DRAM WITH PROGRAMMING

Patent #:	6693844	Issue Dt:	02/17/2004	Application #:	10174747	Filing Dt:	06/18/2002
Publication #:	US20020154566	Pub Dt:	10/24/2002
Title:	SENDING SIGNAL THROUGH INTEGRATED CIRCUIT DURING SETUP TIME

Patent #:	6678199	Issue Dt:	01/13/2004	Application #:	10175271	Filing Dt:	06/19/2002
Publication #:	US20030235102	Pub Dt:	12/25/2003
Title:	MEMORY DEVICE WITH SENSE AMP EQUILIBRATION CIRCUIT

Patent #:	6798055	Issue Dt:	09/28/2004	Application #:	10175291	Filing Dt:	06/20/2002
Publication #:	US20020153604	Pub Dt:	10/24/2002
Title:	DIE SUPPORT STRUCTURE

Patent #:	6636450	Issue Dt:	10/21/2003	Application #:	10175723	Filing Dt:	06/20/2002
Publication #:	US20020154563	Pub Dt:	10/24/2002
Title:	FUSE READ SEQUENCE FOR AUTO REFRESH POWER REDUCTION

Patent #:	6812103	Issue Dt:	11/02/2004	Application #:	10175774	Filing Dt:	06/20/2002
Publication #:	US20030234422	Pub Dt:	12/25/2003
Title:	METHODS OF FABRICATING A DIELECTRIC PLUG IN MOSFETS TO SUPPRESS SHORT-CHANNEL EFFECTS

Patent #:	6816402	Issue Dt:	11/09/2004	Application #:	10175844	Filing Dt:	06/21/2002
Publication #:	US20030235068	Pub Dt:	12/25/2003
Title:	ROW AND COLUMN LINE GEOMETRIES FOR IMPROVING MRAM WRITE OPERATIONS

Patent #:	7005697	Issue Dt:	02/28/2006	Application #:	10175861	Filing Dt:	06/21/2002
Publication #:	US20030235064	Pub Dt:	12/25/2003
Title:	METHOD OF FORMING A NON-VOLATILE ELECTRON STORAGE MEMORY AND THE RESULTING DEVICE

Patent #:	6587382	Issue Dt:	07/01/2003	Application #:	10175928	Filing Dt:	06/19/2002
Title:	NONVOLATILE MEMORY USING FLEXIBLE ERASING METHODS AND METHOD AND SYSTEM FOR USING SAME

Patent #:	6524901	Issue Dt:	02/25/2003	Application #:	10176228	Filing Dt:	06/20/2002
Title:	METHOD FOR FORMING A NOTCHED DAMASCENE PLANAR POLY/METAL GATE

Patent #:	6967348	Issue Dt:	11/22/2005	Application #:	10176330	Filing Dt:	06/20/2002
Publication #:	US20030235929	Pub Dt:	12/25/2003
Title:	SIGNAL SHARING CIRCUIT WITH MICROELECTRONIC DIE ISOLATION FEATURES

Patent #:	6621316	Issue Dt:	09/16/2003	Application #:	10176865	Filing Dt:	06/20/2002
Title:	SYNCHRONOUS MIRROR DELAY (SMD) CIRCUIT AND METHOD INCLUDING A COUNTER AND REDUCED SIZE BI-DIRECTIONAL DELAY LINE

Patent #:	6700819	Issue Dt:	03/02/2004	Application #:	10176954	Filing Dt:	06/20/2002
Publication #:	US20030016572	Pub Dt:	01/23/2003
Title:	MEMORY WITH IMPROVED DIFFERENTIAL READING SYSTEM

Patent #:	6703272	Issue Dt:	03/09/2004	Application #:	10177054	Filing Dt:	06/21/2002
Publication #:	US20030235945	Pub Dt:	12/25/2003
Title:	METHODS OF FORMING SPACED CONDUCTIVE REGIONS, AND METHODS OF FORMING CAPACITOR CONSTRUCTIONS

Patent #:	6780728	Issue Dt:	08/24/2004	Application #:	10177056	Filing Dt:	06/21/2002
Publication #:	US20030234433	Pub Dt:	12/25/2003
Title:	SEMICONDUCTOR CONSTRUCTIONS, AND METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS

Patent #:	6804136	Issue Dt:	10/12/2004	Application #:	10177077	Filing Dt:	06/21/2002
Publication #:	US20030235085	Pub Dt:	12/25/2003
Title:	WRITE ONCE READ ONLY MEMORY EMPLOYING CHARGE TRAPPING IN INSULATORS

Patent #:	6970370	Issue Dt:	11/29/2005	Application #:	10177082	Filing Dt:	06/21/2002
Publication #:	US20030235066	Pub Dt:	12/25/2003
Title:	FERROELECTRIC WRITE ONCE READ ONLY MEMORY FOR ARCHIVAL STORAGE

Patent #:	7193893	Issue Dt:	03/20/2007	Application #:	10177083	Filing Dt:	06/21/2002
Publication #:	US20030235077	Pub Dt:	12/25/2003
Title:	WRITE ONCE READ ONLY MEMORY EMPLOYING FLOATING GATES

Patent #:	7135734	Issue Dt:	11/14/2006	Application #:	10177096	Filing Dt:	06/21/2002
Publication #:	US20030048666	Pub Dt:	03/13/2003
Title:	GRADED COMPOSITION METAL OXIDE TUNNEL BARRIER INTERPOLY INSULATORS

Patent #:	6853587	Issue Dt:	02/08/2005	Application #:	10177208	Filing Dt:	06/21/2002
Publication #:	US20030235075	Pub Dt:	12/25/2003
Title:	VERTICAL NROM HAVING A STORAGE DENSITY OF 1BIT PER 1F2

Patent #:	7154140	Issue Dt:	12/26/2006	Application #:	10177213	Filing Dt:	06/21/2002
Publication #:	US20030234420	Pub Dt:	12/25/2003
Title:	WRITE ONCE READ ONLY MEMORY WITH LARGE WORK FUNCTION FLOATING GATES

Patent #:	6888739	Issue Dt:	05/03/2005	Application #:	10177214	Filing Dt:	06/21/2002
Publication #:	US20030235081	Pub Dt:	12/25/2003
Title:	NANOCRYSTAL WRITE ONCE READ ONLY MEMORY FOR ARCHIVAL STORAGE

Patent #:	6651127	Issue Dt:	11/18/2003	Application #:	10177623	Filing Dt:	06/24/2002
Publication #:	US20020178393	Pub Dt:	11/28/2002
Title:	METHOD OF DETECTING TERMINATION OF A BUS TRANSFER OPERATION

Patent #:	6630685	Issue Dt:	10/07/2003	Application #:	10178111	Filing Dt:	06/24/2002
Title:	PROBE LOOK AHEAD: TESTING PARTS NOT CURRENTLY UNDER A PROBEHEAD

Patent #:	6909196	Issue Dt:	06/21/2005	Application #:	10178172	Filing Dt:	06/21/2002
Publication #:	US20030234448	Pub Dt:	12/25/2003
Title:	METHOD AND STRUCTURES FOR REDUCED PARASITIC CAPACITANCE IN INTEGRATED CIRCUIT METALLIZATIONS

Patent #:	6933221	Issue Dt:	08/23/2005	Application #:	10178703	Filing Dt:	06/24/2002
Title:	METHOD FOR UNDERFILLING SEMICONDUCTOR COMPONENTS USING NO FLOW UNDERFILL

Patent #:	6934192	Issue Dt:	08/23/2005	Application #:	10178796	Filing Dt:	06/24/2002
Publication #:	US20030035329	Pub Dt:	02/20/2003
Title:	EEPROM MEMORY PROTECTED AGAINST THE EFFECTS FROM A BREAKDOWN OF AN ACCESS TRANSISTOR

Patent #:	6611165	Issue Dt:	08/26/2003	Application #:	10178961	Filing Dt:	06/25/2002
Title:	ANTIFUSE CIRCUIT WITH IMPROVED GATE OXIDE RELIABILITY

Patent #:	6808989	Issue Dt:	10/26/2004	Application #:	10179122	Filing Dt:	06/25/2002
Publication #:	US20020197798	Pub Dt:	12/26/2002
Title:	SELF-ALIGNED FLOATING GATE FLASH CELL SYSTEM AND METHOD

Patent #:	6683808	Issue Dt:	01/27/2004	Application #:	10179553	Filing Dt:	06/24/2002
Publication #:	US20020163833	Pub Dt:	11/07/2002
Title:	STRING PROGRAMMABLE NONVOLATILE MEMORY WITH NOR ARCHITECTURE

Patent #:	6801073	Issue Dt:	10/05/2004	Application #:	10179606	Filing Dt:	06/25/2002
Publication #:	US20030234674	Pub Dt:	12/25/2003
Title:	SYSTEM, CIRCUIT AND METHOD FOR LOW VOLTAGE OPERABLE, SMALL FOOTPRINT DELAY

Patent #:	6759298	Issue Dt:	07/06/2004	Application #:	10179868	Filing Dt:	06/24/2002
Publication #:	US20030235963	Pub Dt:	12/25/2003
Title:	METHODS OF FORMING AN ARRAY OF FLASH FIELD EFFECT TRANSISTORS AND CIRCUITRY PERIPHERAL TO SUCH ARRAY

Patent #:	6746921	Issue Dt:	06/08/2004	Application #:	10179893	Filing Dt:	06/24/2002
Publication #:	US20030235956	Pub Dt:	12/25/2003
Title:	METHOD OF FORMING AN ARRAY OF FLASH FIELD EFFECT TRANSISTORS AND CIRCUITRY PERIPHERAL TO SUCH ARRAY

Patent #:	6579763	Issue Dt:	06/17/2003	Application #:	10179894	Filing Dt:	06/24/2002
Title:	METHODS OF FORMING AN ARRAY OF FLASH FIELD EFFECT TRANSISTORS AND CIRCUITRY PERIPHERAL TO THE ARRAY

Patent #:	6881260	Issue Dt:	04/19/2005	Application #:	10179946	Filing Dt:	06/25/2002
Publication #:	US20030233976	Pub Dt:	12/25/2003
Title:	PROCESS FOR DIRECT DEPOSITION OF ALD RHO2

Patent #:	7241662	Issue Dt:	07/10/2007	Application #:	10180415	Filing Dt:	06/24/2002
Publication #:	US20030235964	Pub Dt:	12/25/2003
Title:	REDUCTION OF FIELD EDGE THINNING IN PERIPHERAL DEVICES

Patent #:	6731016	Issue Dt:	05/04/2004	Application #:	10183192	Filing Dt:	06/25/2002
Publication #:	US20020168832	Pub Dt:	11/14/2002
Title:	METHOD AND APPARATUS FOR MARKING MICROELECTRONIC DIES AND MICROELECTRONIC DEVICES

Patent #:	6784544	Issue Dt:	08/31/2004	Application #:	10183705	Filing Dt:	06/25/2002
Title:	SEMICONDUCTOR COMPONENT HAVING CONDUCTORS WITH WIRE BONDABLE METALIZATION LAYERS

Patent #:	6727116	Issue Dt:	04/27/2004	Application #:	10183820	Filing Dt:	06/27/2002
Publication #:	US20030232460	Pub Dt:	12/18/2003
Title:	SEMICONDUCTOR DEVICES INCLUDING PERIPHERALLY LOCATED BOND PADS, ASSEMBLIES, PACKAGES, AND METHODS

Patent #:	6664175	Issue Dt:	12/16/2003	Application #:	10183852	Filing Dt:	06/28/2002
Publication #:	US20020158336	Pub Dt:	10/31/2002
Title:	Method of forming ruthenium interconnect for an integrated circuit

Patent #:	6744109	Issue Dt:	06/01/2004	Application #:	10184154	Filing Dt:	06/26/2002
Publication #:	US20040002179	Pub Dt:	01/01/2004
Title:	GLASS ATTACHMENT OVER MICRO-LENS ARRAYS

Patent #:	6737723	Issue Dt:	05/18/2004	Application #:	10184321	Filing Dt:	06/27/2002
Publication #:	US20020163044	Pub Dt:	11/07/2002
Title:	LOW DIELECTRIC CONSTANT SHALLOW TRENCH ISOLATION

Patent #:	6906415	Issue Dt:	06/14/2005	Application #:	10184340	Filing Dt:	06/27/2002
Publication #:	US20030230801	Pub Dt:	12/18/2003
Title:	SEMICONDUCTOR DEVICE ASSEMBLIES AND PACKAGES INCLUDING MULTIPLE SEMICONDUCTOR DEVICES AND METHODS

Patent #:	6784120	Issue Dt:	08/31/2004	Application #:	10184493	Filing Dt:	06/28/2002
Publication #:	US20020168874	Pub Dt:	11/14/2002
Title:	METHOD FOR PRETREATING A SUBSTRATE PRIOR TO APPLICATION OF A POLYMERIC COAT

Patent #:	6512695	Issue Dt:	01/28/2003	Application #:	10184546	Filing Dt:	06/28/2002
Publication #:	US20020167839	Pub Dt:	11/14/2002
Title:	FIELD PROGRAMMABLE LOGIC ARRAYS WITH TRANSISTORS WITH VERTICAL GATES

Patent #:	6756653	Issue Dt:	06/29/2004	Application #:	10184590	Filing Dt:	06/27/2002
Publication #:	US20020158322	Pub Dt:	10/31/2002
Title:	LOW DIELECTRIC CONSTANT SHALLOW TRENCH ISOLATION

Patent #:	6770537	Issue Dt:	08/03/2004	Application #:	10184592	Filing Dt:	06/27/2002
Publication #:	US20020164859	Pub Dt:	11/07/2002
Title:	LOW DIELECTRIC CONSTANT SHALLOW TRENCH ISOLATION METHOD

Patent #:	6781192	Issue Dt:	08/24/2004	Application #:	10184601	Filing Dt:	06/27/2002
Publication #:	US20020163045	Pub Dt:	11/07/2002
Title:	LOW DIELECTRIC CONSTANT SHALLOW TRENCH ISOLATION

Patent #:	6785161	Issue Dt:	08/31/2004	Application #:	10184756	Filing Dt:	06/28/2002
Publication #:	US20040001357	Pub Dt:	01/01/2004
Title:	HIGH VOLTAGE REGULATOR FOR LOW VOLTAGE INTEGRATED CIRCUIT PROCESSES

Patent #:	7159141	Issue Dt:	01/02/2007	Application #:	10184961	Filing Dt:	07/01/2002
Publication #:	US20040003315	Pub Dt:	01/01/2004
Title:	REPAIRABLE BLOCK REDUNDANCY SCHEME

Patent #:	6664159	Issue Dt:	12/16/2003	Application #:	10185009	Filing Dt:	07/01/2002
Publication #:	US20020163025	Pub Dt:	11/07/2002
Title:	METHOD OF FORMING BARRIER LAYERS

Patent #:	6794246	Issue Dt:	09/21/2004	Application #:	10185155	Filing Dt:	06/28/2002
Publication #:	US20020164853	Pub Dt:	11/07/2002
Title:	METHOD FOR FORMING PROGRAMMABLE LOGIC ARRAYS USING VERTICAL GATE TRANSISTORS

Patent #:	6836176	Issue Dt:	12/28/2004	Application #:	10185419	Filing Dt:	06/27/2002
Publication #:	US20030122610	Pub Dt:	07/03/2003
Title:	CHARGE PUMP RIPPLE REDUCTION

Patent #:	6801143	Issue Dt:	10/05/2004	Application #:	10186564	Filing Dt:	06/28/2002
Publication #:	US20040001014	Pub Dt:	01/01/2004
Title:	METHOD AND APPARATUS FOR GENERATING GRAY CODE FOR ANY EVEN COUNT VALUE TO ENABLE EFFICIENT POINTER EXCHANGE MECHANISMS IN ASYNCHRONOUS FIFO'S

Patent #:	6678196	Issue Dt:	01/13/2004	Application #:	10188144	Filing Dt:	07/03/2002
Publication #:	US20030007381	Pub Dt:	01/09/2003
Title:	WRITING TO AND READING FROM A RAM OR A CAM USING CURRENT DRIVERS AND CURRENT SENSING LOGIC

Patent #:	6847085	Issue Dt:	01/25/2005	Application #:	10188147	Filing Dt:	07/03/2002
Publication #:	US20020192960	Pub Dt:	12/19/2002
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Patent #:	6777268	Issue Dt:	08/17/2004	Application #:	10188436	Filing Dt:	07/02/2002
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Title:	METHOD OF FABRICATING TAPE ATTACHMENT CHIP-ON-BOARD ASSEMBLIES

Patent #:	6787429	Issue Dt:	09/07/2004	Application #:	10188682	Filing Dt:	07/02/2002
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Title:	NOVEL HIGH-K DIELECTRIC MATERIALS AND PROCESSES FOR MANUFACTURING THEM

Patent #:	7058849	Issue Dt:	06/06/2006	Application #:	10188724	Filing Dt:	07/02/2002
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Title:	USE OF NON-VOLATILE MEMORY TO PERFORM ROLLBACK FUNCTION

Patent #:	6630371	Issue Dt:	10/07/2003	Application #:	10189097	Filing Dt:	07/02/2002
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Title:	CHIP ON BOARD AND HEAT SINK ATTACHMENT METHODS

Patent #:	6720271	Issue Dt:	04/13/2004	Application #:	10189152	Filing Dt:	07/02/2002
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Title:	MICROELECTRONIC DEVICE PACKAGES AND METHODS FOR CONTROLLING THE DISPOSITION OF NON-CONDUCTIVE MATERIALS IN SUCH PACKAGES

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Title:	PROGRAMMABLE MEMORY DEVICES SUPPORTED BY SEMICONDUCTIVE SUBSTRATES

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100

Patent #:	6735108	Issue Dt:	05/11/2004	Application #:	10190631	Filing Dt:	07/08/2002
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Title:	ROM EMBEDDED DRAM WITH ANTI-FUSE PROGRAMMING

Assignors

MICRON TECHNOLOGY, INC.

Exec Dt:

07/03/2018

MICRON SEMICONDUCTOR PRODUCTS, INC.

Exec Dt:

07/03/2018

Assignee

JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT

10 S. DEARBORN

7TH FLOOR

CHICAGO, ILLINOIS 60603

Correspondence name and address
	MARCELA ROBLEDO
	2475 HANOVER STREET
	PALO ALTO, CA 94304

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