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Reel/Frame:	047540/0001			Pages:	843
		Recorded:	07/13/2018
Attorney Dkt #:	509265/2155
Conveyance:	SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 16531
Page 44 of 166
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Patent #:	7072212	Issue Dt:	07/04/2006	Application #:	10742429	Filing Dt:	12/19/2003
Publication #:	US20040130949	Pub Dt:	07/08/2004
Title:	STRING PROGRAMMABLE NONVOLATILE MEMORY WITH NOR ARCHITECTURE

Patent #:	7528638	Issue Dt:	05/05/2009	Application #:	10744206	Filing Dt:	12/22/2003
Publication #:	US20050134337	Pub Dt:	06/23/2005
Title:	CLOCK SIGNAL DISTRIBUTION WITH REDUCED PARASITIC LOADING EFFECTS

Patent #:	6803277	Issue Dt:	10/12/2004	Application #:	10744495	Filing Dt:	12/23/2003
Title:	METHOD OF FORMING GATE ELECTRODE IN FLASH MEMORY DEVICE

Patent #:	7712211	Issue Dt:	05/11/2010	Application #:	10744632	Filing Dt:	12/23/2003
Publication #:	US20040221451	Pub Dt:	11/11/2004
Title:	METHOD FOR PACKAGING CIRCUITS AND PACKAGED CIRCUITS

Patent #:	7289382	Issue Dt:	10/30/2007	Application #:	10744664	Filing Dt:	12/23/2003
Publication #:	US20050135170	Pub Dt:	06/23/2005
Title:	REWRITABLE FUSE MEMORY

Patent #:	6908803	Issue Dt:	06/21/2005	Application #:	10744931	Filing Dt:	12/22/2003
Publication #:	US20040178437	Pub Dt:	09/16/2004
Title:	METHODS FOR FORMING WORDLINES, TRANSISTOR GATES, AND CONDUCTIVE INTERCONNECTS, AND WORDLINE, TRANSISTOR GATE, AND CONDUCTIVE INTERCONNECT STRUCTURES

Patent #:	7211484	Issue Dt:	05/01/2007	Application #:	10745008	Filing Dt:	12/23/2003
Publication #:	US20050106822	Pub Dt:	05/19/2005
Title:	METHOD OF MANUFACTURING FLASH MEMORY DEVICE

Patent #:	6914275	Issue Dt:	07/05/2005	Application #:	10745040	Filing Dt:	12/22/2003
Publication #:	US20040135253	Pub Dt:	07/15/2004
Title:	SEMICONDUCTOR COMPONENT WITH ELECTRICAL CHARACTERISTIC ADJUSTMENT CIRCUITRY

Patent #:	7023047	Issue Dt:	04/04/2006	Application #:	10745295	Filing Dt:	12/23/2003
Publication #:	US20040188759	Pub Dt:	09/30/2004
Title:	MOS DEVICE AND PROCESS FOR MANUFACTURING MOS DEVICES USING DUAL-POLYSILICON LAYER TECHNOLOGY

Patent #:	7091570	Issue Dt:	08/15/2006	Application #:	10745297	Filing Dt:	12/23/2003
Publication #:	US20050116288	Pub Dt:	06/02/2005
Title:	MOS DEVICE AND A PROCESS FOR MANUFACTURING MOS DEVICES USING A DUAL-POLYSILICON LAYER TECHNOLOGY WITH SIDE CONTACT

Patent #:	7196394	Issue Dt:	03/27/2007	Application #:	10745311	Filing Dt:	12/22/2003
Publication #:	US20040135227	Pub Dt:	07/15/2004
Title:	METHOD AND APPARATUS FOR A DEPOSITED FILL LAYER

Patent #:	7072209	Issue Dt:	07/04/2006	Application #:	10745531	Filing Dt:	12/29/2003
Publication #:	US20050146912	Pub Dt:	07/07/2005
Title:	MAGNETIC MEMORY HAVING SYNTHETIC ANTIFERROMAGNETIC PINNED LAYER

Patent #:	7619669	Issue Dt:	11/17/2009	Application #:	10745611	Filing Dt:	12/29/2003
Publication #:	US20050145777	Pub Dt:	07/07/2005
Title:	POWER SAVINGS WITH MULTIPLE READOUT CIRCUITS

Patent #:	7206955	Issue Dt:	04/17/2007	Application #:	10745903	Filing Dt:	12/23/2003
Publication #:	US20040139239	Pub Dt:	07/15/2004
Title:	BUNDLE SKEW MANAGEMENT AND CELL SYNCHRONIZATION

Patent #:	6788613	Issue Dt:	09/07/2004	Application #:	10746095	Filing Dt:	12/26/2003
Title:	COMPACT DECODE AND MULTIPLEXING CIRCUITRY FOR A MULTI-PORT MEMORY HAVING A COMMON MEMORY INTERFACE

Patent #:	7023728	Issue Dt:	04/04/2006	Application #:	10746555	Filing Dt:	12/24/2003
Publication #:	US20040190335	Pub Dt:	09/30/2004
Title:	SEMICONDUCTOR MEMORY SYSTEM INCLUDING SELECTION TRANSISTORS

Patent #:	7125807	Issue Dt:	10/24/2006	Application #:	10746878	Filing Dt:	12/23/2003
Publication #:	US20040203250	Pub Dt:	10/14/2004
Title:	METHOD FOR MANUFACTURING NON-VOLATILE MEMORY CELLS ON A SEMICONDUCTOR SUBSTRATE

Patent #:	7207039	Issue Dt:	04/17/2007	Application #:	10746975	Filing Dt:	12/24/2003
Publication #:	US20050149924	Pub Dt:	07/07/2005
Title:	SECURE BOOTING AND PROVISIONING

Patent #:	6905918	Issue Dt:	06/14/2005	Application #:	10747586	Filing Dt:	12/29/2003
Publication #:	US20040142520	Pub Dt:	07/22/2004
Title:	SOI DEVICE WITH REDUCED DRAIN INDUCED BARRIER LOWERING

Patent #:	7171545	Issue Dt:	01/30/2007	Application #:	10747625	Filing Dt:	12/30/2003
Publication #:	US20050149681	Pub Dt:	07/07/2005
Title:	PREDICTIVE FILTERING OF REGISTER CACHE ENTRY

Patent #:	7330992	Issue Dt:	02/12/2008	Application #:	10747917	Filing Dt:	12/29/2003
Publication #:	US20050149774	Pub Dt:	07/07/2005
Title:	SYSTEM AND METHOD FOR READ SYNCHRONIZATION OF MEMORY MODULES

Patent #:	6885584	Issue Dt:	04/26/2005	Application #:	10748447	Filing Dt:	12/30/2003
Publication #:	US20050041471	Pub Dt:	02/24/2005
Title:	FAST PAGE PROGRAMMING ARCHITECTURE AND METHOD IN A NON-VOLATILE MEMORY DEVICE WITH AN SPI INTERFACE

Patent #:	7035142	Issue Dt:	04/25/2006	Application #:	10748696	Filing Dt:	12/30/2003
Publication #:	US20040170057	Pub Dt:	09/02/2004
Title:	NON VOLATILE MEMORY DEVICE INCLUDING A PREDETERMINED NUMBER OF SECTORS

Patent #:	7031191	Issue Dt:	04/18/2006	Application #:	10748701	Filing Dt:	12/30/2003
Publication #:	US20040213047	Pub Dt:	10/28/2004
Title:	STABILIZATION METHOD FOR DRAIN VOLTAGE IN NON-VOLATILE MULTI-LEVEL MEMORY CELLS AND RELATED MEMORY DEVICE

Patent #:	7125808	Issue Dt:	10/24/2006	Application #:	10749020	Filing Dt:	12/29/2003
Publication #:	US20040209472	Pub Dt:	10/21/2004
Title:	METHOD FOR MANUFACTURING NON-VOLATILE MEMORY CELLS ON A SEMICONDUCTIVE SUBSTRATE

Patent #:	6903420	Issue Dt:	06/07/2005	Application #:	10749659	Filing Dt:	12/30/2003
Publication #:	US20040150046	Pub Dt:	08/05/2004
Title:	SILICON-ON-INSULATOR COMPRISING INTEGRATED CIRCUITRY

Patent #:	6944079	Issue Dt:	09/13/2005	Application #:	10750736	Filing Dt:	12/31/2003
Publication #:	US20050141308	Pub Dt:	06/30/2005
Title:	DIGITAL SWITCHING TECHNIQUE FOR DETECTING DATA

Patent #:	7230312	Issue Dt:	06/12/2007	Application #:	10751141	Filing Dt:	12/31/2003
Publication #:	US20050145952	Pub Dt:	07/07/2005
Title:	TRANSISTOR HAVING VERTICAL JUNCTION EDGE AND METHOD OF MANUFACTURING THE SAME

Patent #:	7476955	Issue Dt:	01/13/2009	Application #:	10751441	Filing Dt:	01/06/2004
Publication #:	US20050151272	Pub Dt:	07/14/2005
Title:	DIE PACKAGE HAVING AN ADHESIVE FLOW RESTRICTION AREA

Patent #:	7151303	Issue Dt:	12/19/2006	Application #:	10751443	Filing Dt:	01/06/2004
Publication #:	US20040135204	Pub Dt:	07/15/2004
Title:	FULLY-DEPLETED (FD) (SOI) MOSFET ACCESS TRANSISTOR

Patent #:	6900507	Issue Dt:	05/31/2005	Application #:	10751941	Filing Dt:	01/07/2004
Title:	APPARATUS WITH SILICIDE ON CONDUCTIVE STRUCTURES

Patent #:	7071505	Issue Dt:	07/04/2006	Application #:	10752555	Filing Dt:	01/08/2004
Publication #:	US20040251482	Pub Dt:	12/16/2004
Title:	METHOD AND APPARATUS FOR REDUCING IMAGER FLOATING DIFFUSION LEAKAGE

Patent #:	7071055	Issue Dt:	07/04/2006	Application #:	10753041	Filing Dt:	01/07/2004
Publication #:	US20040140494	Pub Dt:	07/22/2004
Title:	METHOD OF FORMING A CONTACT STRUCTURE INCLUDING A VERTICAL BARRIER STRUCTURE AND TWO BARRIER LAYERS

Patent #:	6903437	Issue Dt:	06/07/2005	Application #:	10753914	Filing Dt:	01/07/2004
Title:	SEMICONDUCTOR DEVICES, CAPACITOR ANTIFUSES, DYNAMIC RANDOM ACCESS MEMORIES, AND CELL PLATE BIAS CONNECTION METHODS

Patent #:	7106637	Issue Dt:	09/12/2006	Application #:	10754658	Filing Dt:	01/08/2004
Publication #:	US20040141397	Pub Dt:	07/22/2004
Title:	ASYNCHRONOUS INTERFACE CIRCUIT AND METHOD FOR A PSEUDO-STATIC MEMORY DEVICE

Patent #:	7226861	Issue Dt:	06/05/2007	Application #:	10755097	Filing Dt:	01/09/2004
Publication #:	US20050260823	Pub Dt:	11/24/2005
Title:	METHODS AND APPARATUS FOR FORMING RHODIUM-CONTAINING LAYERS

Patent #:	7446812	Issue Dt:	11/04/2008	Application #:	10755411	Filing Dt:	01/13/2004
Publication #:	US20050151866	Pub Dt:	07/14/2005
Title:	WIDE DYNAMIC RANGE OPERATIONS FOR IMAGING

Patent #:	7316063	Issue Dt:	01/08/2008	Application #:	10755905	Filing Dt:	01/12/2004
Publication #:	US20050150683	Pub Dt:	07/14/2005
Title:	METHODS OF FABRICATING SUBSTRATES INCLUDING AT LEAST ONE CONDUCTIVE VIA

Patent #:	7033884	Issue Dt:	04/25/2006	Application #:	10756621	Filing Dt:	01/12/2004
Publication #:	US20040235242	Pub Dt:	11/25/2004
Title:	METHODS OF FORMING CAPACITOR CONSTRUCTIONS

Patent #:	7239025	Issue Dt:	07/03/2007	Application #:	10756901	Filing Dt:	01/14/2004
Publication #:	US20040140562	Pub Dt:	07/22/2004
Title:	SELECTIVE DEPOSITION OF SOLDER BALL CONTACTS

Patent #:	7081656	Issue Dt:	07/25/2006	Application #:	10757252	Filing Dt:	01/13/2004
Publication #:	US20040178458	Pub Dt:	09/16/2004
Title:	CMOS CONSTRUCTIONS

Patent #:	7253053	Issue Dt:	08/07/2007	Application #:	10757253	Filing Dt:	01/13/2004
Publication #:	US20040178432	Pub Dt:	09/16/2004
Title:	METHODS OF FORMING TRANSISTOR DEVICES AND CAPACITOR CONSTRUCTIONS

Patent #:	6974965	Issue Dt:	12/13/2005	Application #:	10758008	Filing Dt:	01/16/2004
Publication #:	US20040144973	Pub Dt:	07/29/2004
Title:	AGGLOMERATION ELIMINATION FOR METAL SPUTTER DEPOSITION OF CHALCOGENIDES

Patent #:	7528401	Issue Dt:	05/05/2009	Application #:	10758009	Filing Dt:	01/16/2004
Publication #:	US20040144968	Pub Dt:	07/29/2004
Title:	AGGLOMERATION ELIMINATION FOR METAL SPUTTER DEPOSITION OF CHALCOGENIDES

Patent #:	7126179	Issue Dt:	10/24/2006	Application #:	10758102	Filing Dt:	01/16/2004
Publication #:	US20040180530	Pub Dt:	09/16/2004
Title:	A MEMORY CELL INTERMEDIATE STRUCTURE

Patent #:	7196964	Issue Dt:	03/27/2007	Application #:	10759388	Filing Dt:	01/15/2004
Publication #:	US20050122826	Pub Dt:	06/09/2005
Title:	SELECTABLE MEMORY WORD LINE DEACTIVATION

Patent #:	7256872	Issue Dt:	08/14/2007	Application #:	10759641	Filing Dt:	01/16/2004
Publication #:	US20040145716	Pub Dt:	07/29/2004
Title:	PURGING GAS FROM A PHOTOLITHOGRAPHY ENCLOSURE BETWEEN A MASK PROTECTIVE DEVICE AND A PATTERNED MASK

Patent #:	7183621	Issue Dt:	02/27/2007	Application #:	10761247	Filing Dt:	01/22/2004
Publication #:	US20040152265	Pub Dt:	08/05/2004
Title:	MRAM MEMORY CELL HAVING AN ELECTROPLATED BOTTOM LAYER

Patent #:	6826092	Issue Dt:	11/30/2004	Application #:	10761782	Filing Dt:	01/20/2004
Publication #:	US20040150435	Pub Dt:	08/05/2004
Title:	METHOD AND APPARATUS FOR REGULATING PREDRIVER FOR OUTPUT BUFFER

Patent #:	6819622	Issue Dt:	11/16/2004	Application #:	10762061	Filing Dt:	01/21/2004
Publication #:	US20040184343	Pub Dt:	09/23/2004
Title:	WRITE AND ERASE PROTECTION IN A SYNCHRONOUS MEMORY

Patent #:	6803826	Issue Dt:	10/12/2004	Application #:	10763038	Filing Dt:	01/21/2004
Publication #:	US20040150445	Pub Dt:	08/05/2004
Title:	DELAY-LOCKED LOOP CIRCUIT AND METHOD USING A RING OSCILLATOR AND COUNTER-BASED DELAY

Patent #:	7183160	Issue Dt:	02/27/2007	Application #:	10763044	Filing Dt:	01/22/2004
Publication #:	US20050087816	Pub Dt:	04/28/2005
Title:	MANUFACTURING PROCESS FOR A FLASH MEMORY AND FLASH MEMORY THUS PRODUCED

Patent #:	7083988	Issue Dt:	08/01/2006	Application #:	10764832	Filing Dt:	01/26/2004
Publication #:	US20050164414	Pub Dt:	07/28/2005
Title:	MAGNETIC ANNEALING SEQUENCES FOR PATTERNED MRAM SYNTHETIC ANTIFERROMAGNETIC PINNED LAYERS

Patent #:	7372091	Issue Dt:	05/13/2008	Application #:	10765301	Filing Dt:	01/27/2004
Publication #:	US20050164454	Pub Dt:	07/28/2005
Title:	SELECTIVE EPITAXY VERTICAL INTEGRATED CIRCUIT COMPONENTS

Patent #:	7455884	Issue Dt:	11/25/2008	Application #:	10765314	Filing Dt:	01/27/2004
Publication #:	US20040185184	Pub Dt:	09/23/2004
Title:	ATOMIC LAYER DEPOSITION WITH POINT OF USE GENERATED REACTIVE GAS SPECIES

Patent #:	6872997	Issue Dt:	03/29/2005	Application #:	10765546	Filing Dt:	01/26/2004
Publication #:	US20040155307	Pub Dt:	08/12/2004
Title:	METHOD FOR MANUFACTURE OF MAGNETO-RESISTIVE BIT STRUCTURE

Patent #:	7037840	Issue Dt:	05/02/2006	Application #:	10765699	Filing Dt:	01/26/2004
Publication #:	US20050164519	Pub Dt:	07/28/2005
Title:	METHODS OF FORMING PLANARIZED SURFACES OVER SEMICONDUCTOR SUBSTRATES

Patent #:	7105864	Issue Dt:	09/12/2006	Application #:	10765911	Filing Dt:	01/29/2004
Publication #:	US20050167689	Pub Dt:	08/04/2005
Title:	NON-VOLATILE ZERO FIELD SPLITTING RESONANCE MEMORY

Patent #:	7366030	Issue Dt:	04/29/2008	Application #:	10766010	Filing Dt:	01/29/2004
Publication #:	US20050265082	Pub Dt:	12/01/2005
Title:	SIMULTANEOUS READ CIRCUIT FOR MULTIPLE MEMORY CELLS

Patent #:	6894368	Issue Dt:	05/17/2005	Application #:	10766376	Filing Dt:	01/27/2004
Publication #:	US20040183161	Pub Dt:	09/23/2004
Title:	MICROELECTRONIC DEVICE FABRICATING METHOD, METHOD OF FORMING A PAIR OF CONDUCTIVE DEVICE COMPONENTS OF DIFFERENT BASE WIDTHS FROM A COMMON DEPOSITED CONDUCTIVE LAYER, AND INTEGRATED CIRCUITRY

Patent #:	7183133	Issue Dt:	02/27/2007	Application #:	10767232	Filing Dt:	01/28/2004
Publication #:	US20040195677	Pub Dt:	10/07/2004
Title:	MICROELECTRONIC DEVICES WITH IMPROVED HEAT DISSIPATION AND METHODS FOR COOLING MICROELECTRONIC DEVICES

Patent #:	6841418	Issue Dt:	01/11/2005	Application #:	10767290	Filing Dt:	01/28/2004
Publication #:	US20040183207	Pub Dt:	09/23/2004
Title:	MULTI-SUBSTRATE MICROELECTRONIC PACKAGES AND METHODS FOR MANUFACTURE

Patent #:	7906393	Issue Dt:	03/15/2011	Application #:	10767298	Filing Dt:	01/28/2004
Publication #:	US20050164466	Pub Dt:	07/28/2005
Title:	METHODS FOR FORMING SMALL-SCALE CAPACITOR STRUCTURES

Patent #:	7299329	Issue Dt:	11/20/2007	Application #:	10767555	Filing Dt:	01/29/2004
Publication #:	US20050172095	Pub Dt:	08/04/2005
Title:	DUAL EDGE COMMAND IN DRAM

Patent #:	7319071	Issue Dt:	01/15/2008	Application #:	10767764	Filing Dt:	01/29/2004
Publication #:	US20050170642	Pub Dt:	08/04/2005
Title:	METHODS FOR FORMING A METALLIC DAMASCENE STRUCTURE

Patent #:	7122906	Issue Dt:	10/17/2006	Application #:	10767921	Filing Dt:	01/29/2004
Publication #:	US20050167798	Pub Dt:	08/04/2005
Title:	DIE-WAFER PACKAGE AND METHOD OF FABRICATING SAME

Patent #:	7169691	Issue Dt:	01/30/2007	Application #:	10767952	Filing Dt:	01/29/2004
Publication #:	US20050167799	Pub Dt:	08/04/2005
Title:	METHOD OF FABRICATING WAFER-LEVEL PACKAGING WITH SIDEWALL PASSIVATION AND RELATED APPARATUS

Patent #:	7119397	Issue Dt:	10/10/2006	Application #:	10768081	Filing Dt:	02/02/2004
Publication #:	US20040150035	Pub Dt:	08/05/2004
Title:	DOUBLE BLANKET ION IMPLANT METHOD AND STRUCTURE

Patent #:	6908827	Issue Dt:	06/21/2005	Application #:	10768568	Filing Dt:	01/29/2004
Publication #:	US20040185645	Pub Dt:	09/23/2004
Title:	PEROVSKITE-TYPE MATERIAL FORMING METHODS, CAPACITOR DIELECTRIC FORMING METHODS, AND CAPACITOR CONSTRUCTIONS

Patent #:	6868016	Issue Dt:	03/15/2005	Application #:	10768573	Filing Dt:	01/29/2004
Publication #:	US20040184321	Pub Dt:	09/23/2004
Title:	HIGH VOLTAGE POSITIVE AND NEGATIVE TWO-PHASE DISCHARGE SYSTEM AND METHOD FOR CHANNEL ERASE IN FLASH MEMORY DEVICES

Patent #:	7063985	Issue Dt:	06/20/2006	Application #:	10768678	Filing Dt:	02/02/2004
Publication #:	US20040150059	Pub Dt:	08/05/2004
Title:	Method for fabricating sensor devices having improved switching properties

Patent #:	6947346	Issue Dt:	09/20/2005	Application #:	10768829	Filing Dt:	01/30/2004
Publication #:	US20040184336	Pub Dt:	09/23/2004
Title:	REDUCING DIGIT EQUILIBRATE CURRENT DURING SELF-REFRESH MODE

Patent #:	7389465	Issue Dt:	06/17/2008	Application #:	10769001	Filing Dt:	01/30/2004
Publication #:	US20050172207	Pub Dt:	08/04/2005
Title:	ERROR DETECTION AND CORRECTION SCHEME FOR A MEMORY DEVICE

Patent #:	7188219	Issue Dt:	03/06/2007	Application #:	10769079	Filing Dt:	01/30/2004
Publication #:	US20050172084	Pub Dt:	08/04/2005
Title:	BUFFER CONTROL SYSTEM AND METHOD FOR A MEMORY SYSTEM HAVING OUTSTANDING READ AND WRITE REQUEST BUFFERS

Patent #:	6878991	Issue Dt:	04/12/2005	Application #:	10769116	Filing Dt:	01/30/2004
Title:	VERTICAL DEVICE 4F2 EEPROM MEMORY

Patent #:	7109113	Issue Dt:	09/19/2006	Application #:	10769433	Filing Dt:	01/30/2004
Publication #:	US20050166847	Pub Dt:	08/04/2005
Title:	SOLID SOURCE PRECURSOR DELIVERY SYSTEM

Patent #:	6809970	Issue Dt:	10/26/2004	Application #:	10770611	Filing Dt:	02/02/2004
Publication #:	US20040156222	Pub Dt:	08/12/2004
Title:	INPUT STAGE APPARATUS AND METHOD HAVING A VARIABLE REFERENCE VOLTAGE

Patent #:	7126871	Issue Dt:	10/24/2006	Application #:	10770800	Filing Dt:	02/03/2004
Publication #:	US20040155315	Pub Dt:	08/12/2004
Title:	CIRCUITS AND METHODS TO PROTECT A GATE DIELECTRIC ANTIFUSE

Patent #:	7217596	Issue Dt:	05/15/2007	Application #:	10770941	Filing Dt:	02/03/2004
Publication #:	US20040157373	Pub Dt:	08/12/2004
Title:	STACKED DIE MODULE AND TECHNIQUES FOR FORMING A STACKED DIE MODULE

Patent #:	7029931	Issue Dt:	04/18/2006	Application #:	10771085	Filing Dt:	02/03/2004
Publication #:	US20040154722	Pub Dt:	08/12/2004
Title:	STACKED DIE MODULE AND TECHNIQUES FOR FORMING A STACKED DIE MODULE

Patent #:	6909984	Issue Dt:	06/21/2005	Application #:	10771291	Filing Dt:	02/05/2004
Publication #:	US20040158423	Pub Dt:	08/12/2004
Title:	WAFER ALIGNMENT SYSTEM

Patent #:	6862229	Issue Dt:	03/01/2005	Application #:	10771436	Filing Dt:	02/05/2004
Publication #:	US20040156256	Pub Dt:	08/12/2004
Title:	PHYSICALLY ALTERNATING SENSE AMPLIFIER ACTIVATION

Patent #:	7212057	Issue Dt:	05/01/2007	Application #:	10771611	Filing Dt:	02/04/2004
Publication #:	US20040156245	Pub Dt:	08/12/2004
Title:	MEASURE-CONTROLLED CIRCUIT WITH FREQUENCY CONTROL

Patent #:	6917107	Issue Dt:	07/12/2005	Application #:	10772204	Filing Dt:	02/03/2004
Publication #:	US20040155360	Pub Dt:	08/12/2004
Title:	BOARD-ON-CHIP PACKAGES

Patent #:	6903600	Issue Dt:	06/07/2005	Application #:	10772312	Filing Dt:	02/06/2004
Publication #:	US20040155699	Pub Dt:	08/12/2004
Title:	CAPACITOR CHARGE SHARING CHARGE PUMP

Patent #:	6838864	Issue Dt:	01/04/2005	Application #:	10772834	Filing Dt:	02/05/2004
Publication #:	US20040155641	Pub Dt:	08/12/2004
Title:	ULTRA LOW POWER TRACKED LOW VOLTAGE REFERENCE SOURCE

Patent #:	7412574	Issue Dt:	08/12/2008	Application #:	10773520	Filing Dt:	02/05/2004
Publication #:	US20050177677	Pub Dt:	08/11/2005
Title:	SYSTEM AND METHOD FOR ARBITRATION OF MEMORY RESPONSES IN A HUB-BASED MEMORY SYSTEM

Patent #:	7788451	Issue Dt:	08/31/2010	Application #:	10773583	Filing Dt:	02/05/2004
Publication #:	US20050177695	Pub Dt:	08/11/2005
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Patent #:	6865106	Issue Dt:	03/08/2005	Application #:	10775582	Filing Dt:	02/10/2004
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Title:	BRIDGE-TYPE MAGNETIC RANDOM ACCESS MEMORY (MRAM) LATCH

Patent #:	6936916	Issue Dt:	08/30/2005	Application #:	10775703	Filing Dt:	02/10/2004
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Title:	SENSE AMPLIFIER FOR LOW-SUPPLY-VOLTAGE NONVOLATILE MEMORY CELLS

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100

Patent #:	6881652	Issue Dt:	04/19/2005	Application #:	10778440	Filing Dt:	02/13/2004
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Title:	METHOD TO FABRICATE AN INTRINSIC POLYCRYSTALLINE SILICON FILM

Assignors

MICRON TECHNOLOGY, INC.

Exec Dt:

07/03/2018

MICRON SEMICONDUCTOR PRODUCTS, INC.

Exec Dt:

07/03/2018

Assignee

JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT

10 S. DEARBORN

7TH FLOOR

CHICAGO, ILLINOIS 60603

Correspondence name and address
	MARCELA ROBLEDO
	2475 HANOVER STREET
	PALO ALTO, CA 94304

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