|
|
Patent #:
|
|
Issue Dt:
|
02/13/2007
|
Application #:
|
10892340
|
Filing Dt:
|
07/14/2004
|
Publication #:
|
|
Pub Dt:
|
12/30/2004
| | | | |
Title:
|
METHODS OF FORMING MEMORY CELLS HAVING DIODES AND ELECTRODE PLATES CONNECTED TO SOURCE/DRAIN REGIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/03/2006
|
Application #:
|
10892651
|
Filing Dt:
|
07/16/2004
|
Publication #:
|
|
Pub Dt:
|
01/19/2006
| | | | |
Title:
|
METHODS OF GROWING EPITAXIAL SILICON
|
|
|
Patent #:
|
|
Issue Dt:
|
10/03/2006
|
Application #:
|
10892773
|
Filing Dt:
|
07/15/2004
|
Publication #:
|
|
Pub Dt:
|
01/19/2006
| | | | |
Title:
|
METHOD AND SYSTEM FOR CONTROLLING REFRESH TO AVOID MEMORY CELL DATA LOSSES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/02/2007
|
Application #:
|
10892805
|
Filing Dt:
|
07/16/2004
|
Publication #:
|
|
Pub Dt:
|
01/19/2006
| | | | |
Title:
|
MEASURE-CONTROLLED DELAY CIRCUITS WITH REDUCED PHASE ERROR
|
|
|
Patent #:
|
|
Issue Dt:
|
04/07/2009
|
Application #:
|
10892875
|
Filing Dt:
|
07/16/2004
|
Publication #:
|
|
Pub Dt:
|
01/19/2006
| | | | |
Title:
|
METHOD AND SYSTEM FOR REDUCING MISMATCH BETWEEN REFERENCE AND INTENSITY PATHS IN ANALOG TO DIGITAL CONVERTERS IN CMOS ACTIVE PIXEL SENSORS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/27/2008
|
Application #:
|
10893015
|
Filing Dt:
|
07/16/2004
|
Publication #:
|
|
Pub Dt:
|
01/19/2006
| | | | |
Title:
|
METHOD, SYSTEM, AND APPARATUS FOR TRACKING DEFECTIVE CACHE LINES
|
|
|
Patent #:
|
|
Issue Dt:
|
02/01/2011
|
Application #:
|
10893276
|
Filing Dt:
|
07/19/2004
|
Publication #:
|
|
Pub Dt:
|
01/19/2006
| | | | |
Title:
|
PIXEL CELL HAVING A GRATED INTERFACE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/10/2008
|
Application #:
|
10893293
|
Filing Dt:
|
07/19/2004
|
Publication #:
|
|
Pub Dt:
|
01/19/2006
| | | | |
Title:
|
CMOS FRONT END PROCESS COMPATIBLE LOW STRESS LIGHT SHIELD
|
|
|
Patent #:
|
|
Issue Dt:
|
03/13/2007
|
Application #:
|
10893299
|
Filing Dt:
|
07/19/2004
|
Publication #:
|
|
Pub Dt:
|
01/19/2006
| | | | |
Title:
|
RESISTANCE VARIABLE MEMORY DEVICE AND METHOD OF FABRICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
08/22/2006
|
Application #:
|
10893685
|
Filing Dt:
|
07/16/2004
|
Publication #:
|
|
Pub Dt:
|
12/30/2004
| | | | |
Title:
|
APPARATUS FOR DEFORMING RESILIENT CONTACT STRUCTURES ON SEMICONDUCTOR COMPONENTS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/12/2006
|
Application #:
|
10893709
|
Filing Dt:
|
07/15/2004
|
Publication #:
|
|
Pub Dt:
|
12/23/2004
| | | | |
Title:
|
WAVELENGTH DIVISION MULTIPLEXED MEMORY MODULE, MEMORY SYSTEM AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
12/26/2006
|
Application #:
|
10893760
|
Filing Dt:
|
07/16/2004
|
Publication #:
|
|
Pub Dt:
|
03/03/2005
| | | | |
Title:
|
REDUNDANCY SCHEME FOR A MEMORY INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
12/12/2006
|
Application #:
|
10893804
|
Filing Dt:
|
07/19/2004
|
Publication #:
|
|
Pub Dt:
|
02/02/2006
| | | | |
Title:
|
DELAY STAGE-INTERWEAVED ANALOG DLL/PLL
|
|
|
Patent #:
|
|
Issue Dt:
|
03/13/2007
|
Application #:
|
10894101
|
Filing Dt:
|
07/19/2004
|
Publication #:
|
|
Pub Dt:
|
01/19/2006
| | | | |
Title:
|
IN-SERVICE RECONFIGURABLE DRAM AND FLASH MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/14/2009
|
Application #:
|
10894125
|
Filing Dt:
|
07/20/2004
|
Publication #:
|
|
Pub Dt:
|
01/26/2006
| | | | |
Title:
|
DRAM LAYOUT WITH VERTICAL FETS AND METHOD OF FORMATION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/04/2008
|
Application #:
|
10894242
|
Filing Dt:
|
07/19/2004
|
Publication #:
|
|
Pub Dt:
|
01/19/2006
| | | | |
Title:
|
MEMORY DEVICE TRIMS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/24/2006
|
Application #:
|
10895502
|
Filing Dt:
|
07/20/2004
|
Publication #:
|
|
Pub Dt:
|
12/30/2004
| | | | |
Title:
|
ETCHING METHODS AND APPARATUS AND SUBSTRATE ASSEMBLIES PRODUCED THEREWITH
|
|
|
Patent #:
|
|
Issue Dt:
|
10/03/2006
|
Application #:
|
10896139
|
Filing Dt:
|
07/20/2004
|
Publication #:
|
|
Pub Dt:
|
01/26/2006
| | | | |
Title:
|
TEMPERATURE-COMPENSATED OUTPUT BUFFER METHOD AND CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
02/21/2012
|
Application #:
|
10896711
|
Filing Dt:
|
07/22/2004
|
Publication #:
|
|
Pub Dt:
|
01/06/2005
| | | | |
Title:
|
LOW DOSE SUPER DEEP SOURCE/DRAIN IMPLANT
|
|
|
Patent #:
|
|
Issue Dt:
|
08/05/2008
|
Application #:
|
10897165
|
Filing Dt:
|
07/22/2004
|
Publication #:
|
|
Pub Dt:
|
12/23/2004
| | | | |
Title:
|
USE OF A DUAL-TONE RESIST TO FORM PHOTOMASKS INCLUDING ALIGNMENT MARK PROTECTION, INTERMEDIATE SEMICONDUCTOR DEVICE STRUCTURES AND BULK SEMICONDUCTOR DEVICE SUBSTRATES
|
|
|
Patent #:
|
|
Issue Dt:
|
11/21/2006
|
Application #:
|
10897166
|
Filing Dt:
|
07/22/2004
|
Publication #:
|
|
Pub Dt:
|
01/26/2006
| | | | |
Title:
|
METHOD AND APPARATUS TO SET A TUNING RANGE FOR AN ANALOG DELAY
|
|
|
Patent #:
|
|
Issue Dt:
|
07/19/2005
|
Application #:
|
10898762
|
Filing Dt:
|
07/26/2004
|
Publication #:
|
|
Pub Dt:
|
12/30/2004
| | | | |
Title:
|
APPARATUS FOR LATENCY SPECIFIC DUTY CYCLE CORRECTION
|
|
|
Patent #:
|
|
Issue Dt:
|
05/03/2005
|
Application #:
|
10898765
|
Filing Dt:
|
07/26/2004
|
Publication #:
|
|
Pub Dt:
|
12/23/2004
| | | | |
Title:
|
METHODS OF WRITING JUNCTION-ISOLATED DEPLETION MODE FERROELECTRIC MEMORY DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/03/2005
|
Application #:
|
10898867
|
Filing Dt:
|
07/26/2004
|
Publication #:
|
|
Pub Dt:
|
01/20/2005
| | | | |
Title:
|
METHODS OF READING JUNCTION-ISOLATED DEPLETION MODE FERROELECTRIC MEMORY DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/22/2007
|
Application #:
|
10899010
|
Filing Dt:
|
07/27/2004
|
Publication #:
|
|
Pub Dt:
|
02/02/2006
| | | | |
Title:
|
AMORPHOUS CARBON-BASED NON-VOLATILE MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
06/09/2009
|
Application #:
|
10899011
|
Filing Dt:
|
07/27/2004
|
Publication #:
|
|
Pub Dt:
|
12/30/2004
| | | | |
Title:
|
SYSTEM INCLUDING INTEGRATED CIRCUIT STRUCTURES FORMED IN A SILICONE LADDER POLYMER LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
10/02/2007
|
Application #:
|
10899736
|
Filing Dt:
|
07/27/2004
|
Publication #:
|
|
Pub Dt:
|
01/13/2005
| | | | |
Title:
|
SMALL GRAIN SIZE, CONFORMAL ALUMINUM INTERCONNECTS AND METHOD FOR THEIR FORMATION
|
|
|
Patent #:
|
|
Issue Dt:
|
10/10/2006
|
Application #:
|
10899892
|
Filing Dt:
|
07/27/2004
|
Publication #:
|
|
Pub Dt:
|
01/06/2005
| | | | |
Title:
|
MEMORY DEVICE WITH NON-VOLATILE REFERENCE MEMORY CELL TRIMMING CAPABILITIES
|
|
|
Patent #:
|
|
Issue Dt:
|
11/21/2006
|
Application #:
|
10899906
|
Filing Dt:
|
07/27/2004
|
Publication #:
|
|
Pub Dt:
|
02/02/2006
| | | | |
Title:
|
HIGH DENSITY STEPPED, NON-PLANAR NITRIDE READ ONLY MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
07/08/2008
|
Application #:
|
10899913
|
Filing Dt:
|
07/27/2004
|
Publication #:
|
|
Pub Dt:
|
02/02/2006
| | | | |
Title:
|
HIGH COUPLING MEMORY CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
07/17/2007
|
Application #:
|
10900246
|
Filing Dt:
|
07/27/2004
|
Publication #:
|
|
Pub Dt:
|
02/02/2006
| | | | |
Title:
|
TECHNIQUES FOR REDUCING LEAKAGE CURRENT IN MEMORY DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
04/26/2005
|
Application #:
|
10901566
|
Filing Dt:
|
07/29/2004
|
Publication #:
|
|
Pub Dt:
|
12/30/2004
| | | | |
Title:
|
SYNCHRONOUS UP/DOWN ADDRESS GENERATOR FOR BURST MODE READ
|
|
|
Patent #:
|
|
Issue Dt:
|
11/15/2005
|
Application #:
|
10901644
|
Filing Dt:
|
07/28/2004
|
Publication #:
|
|
Pub Dt:
|
01/06/2005
| | | | |
Title:
|
METHOD AND APPARATUS FOR AMPLIFYING A REGULATED DIFFERENTIAL SIGNAL TO A HIGHER VOLTAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/22/2008
|
Application #:
|
10901851
|
Filing Dt:
|
07/28/2004
|
Publication #:
|
|
Pub Dt:
|
02/02/2006
| | | | |
Title:
|
MICROELECTRONIC IMAGING UNITS AND METHODS OF
MANUFACTURING MICROELECTRONIC IMAGING UNITS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/06/2009
|
Application #:
|
10902297
|
Filing Dt:
|
07/28/2004
|
Publication #:
|
|
Pub Dt:
|
02/02/2006
| | | | |
Title:
|
MEMORY DEVICE FORMING METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/28/2006
|
Application #:
|
10902728
|
Filing Dt:
|
07/29/2004
|
Publication #:
|
|
Pub Dt:
|
02/02/2006
| | | | |
Title:
|
APPARATUS AND METHOD TO REDUCE UNDESIRABLE EFFECTS CAUSED BY A FAULT IN A MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/03/2012
|
Application #:
|
10903295
|
Filing Dt:
|
07/29/2004
|
Publication #:
|
|
Pub Dt:
|
02/02/2006
| | | | |
Title:
|
METHODS OF FORMING RETICLES CONFIGURED FOR IMPRINT LITHOGRAPHY
|
|
|
Patent #:
|
|
Issue Dt:
|
08/28/2007
|
Application #:
|
10903348
|
Filing Dt:
|
07/29/2004
|
Publication #:
|
|
Pub Dt:
|
02/02/2006
| | | | |
Title:
|
METHODS OF FORMING WIRE BONDS FOR SEMICONDUCTOR CONSTRUCTIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/12/2005
|
Application #:
|
10903395
|
Filing Dt:
|
07/30/2004
|
Title:
|
NON-VOLATILE PROGRAMMABLE FUSE APPARATUS IN A MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/24/2005
|
Application #:
|
10903398
|
Filing Dt:
|
07/30/2004
|
Publication #:
|
|
Pub Dt:
|
01/06/2005
| | | | |
Title:
|
HIGH VOLTAGE REGULATOR FOR LOW VOLTAGE INTEGRATED CIRCUIT PROCESSES
|
|
|
Patent #:
|
|
Issue Dt:
|
06/14/2005
|
Application #:
|
10903532
|
Filing Dt:
|
07/30/2004
|
Publication #:
|
|
Pub Dt:
|
01/13/2005
| | | | |
Title:
|
BAND-GAP VOLTAGE REFERENCE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/04/2008
|
Application #:
|
10904811
|
Filing Dt:
|
11/30/2004
|
Publication #:
|
|
Pub Dt:
|
04/28/2005
| | | | |
Title:
|
METHOD AND APPARATUS FOR SUPPLEMENTARY COMMAND BUS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/24/2006
|
Application #:
|
10906765
|
Filing Dt:
|
03/04/2005
|
Publication #:
|
|
Pub Dt:
|
06/23/2005
| | | | |
Title:
|
DISTRIBUTED CLOCK GENERATOR FOR SEMICONDUCTOR DEVICES AND RELATED METHODS OF OPERATING SEMICONDUCTOR DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/20/2007
|
Application #:
|
10909716
|
Filing Dt:
|
08/02/2004
|
Publication #:
|
|
Pub Dt:
|
02/02/2006
| | | | |
Title:
|
STRAPPING WORD LINES OF NAND MEMORY DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/08/2007
|
Application #:
|
10909749
|
Filing Dt:
|
08/02/2004
|
Publication #:
|
|
Pub Dt:
|
02/03/2005
| | | | |
Title:
|
METHOD FOR THE FABRICATION OF ISOLATION STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/13/2009
|
Application #:
|
10909959
|
Filing Dt:
|
08/02/2004
|
Publication #:
|
|
Pub Dt:
|
02/02/2006
| | | | |
Title:
|
ZIRCONIUM-DOPED TANTALUM OXIDE FILMS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/15/2006
|
Application #:
|
10910049
|
Filing Dt:
|
08/03/2004
|
Publication #:
|
|
Pub Dt:
|
02/16/2006
| | | | |
Title:
|
PRE-EMPHASIS FOR STROBE SIGNALS IN MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/19/2006
|
Application #:
|
10910190
|
Filing Dt:
|
08/03/2004
|
Publication #:
|
|
Pub Dt:
|
02/09/2006
| | | | |
Title:
|
HIGH DENSITY STEPPED, NON-PLANAR FLASH MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
01/16/2007
|
Application #:
|
10910191
|
Filing Dt:
|
08/03/2004
|
Publication #:
|
|
Pub Dt:
|
02/09/2006
| | | | |
Title:
|
NON-PLANAR FLASH MEMORY HAVING SHIELDING BETWEEN FLOATING GATES
|
|
|
Patent #:
|
|
Issue Dt:
|
04/24/2007
|
Application #:
|
10910219
|
Filing Dt:
|
08/02/2004
|
Publication #:
|
|
Pub Dt:
|
02/02/2006
| | | | |
Title:
|
METHOD OF FORMING METAL OXIDE AND SEMIMETAL OXIDE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/14/2006
|
Application #:
|
10910360
|
Filing Dt:
|
08/04/2004
|
Publication #:
|
|
Pub Dt:
|
07/14/2005
| | | | |
Title:
|
METHODS OF FORMING SILICIDE ON CONDUCTIVE STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
04/11/2006
|
Application #:
|
10910361
|
Filing Dt:
|
08/04/2004
|
Publication #:
|
|
Pub Dt:
|
01/06/2005
| | | | |
Title:
|
WRITE STATE MACHINE ARCHITECTURE FOR FLASH MEMORY INTERNAL INSTRUCTIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/18/2006
|
Application #:
|
10910690
|
Filing Dt:
|
08/02/2004
|
Publication #:
|
|
Pub Dt:
|
02/02/2006
| | | | |
Title:
|
SYSTEMS AND METHODS FOR ACTUATING END EFFECTORS TO CONDITION POLISHING PADS USED FOR POLISHING MICROFEATURE WORKPIECES
|
|
|
Patent #:
|
|
Issue Dt:
|
06/20/2006
|
Application #:
|
10910838
|
Filing Dt:
|
08/04/2004
|
Publication #:
|
|
Pub Dt:
|
02/09/2006
| | | | |
Title:
|
METHOD AND APPARATUS FOR INITIALIZATION OF READ LATENCY TRACKING CIRCUIT IN HIGH-SPEED DRAM
|
|
|
Patent #:
|
|
Issue Dt:
|
06/20/2006
|
Application #:
|
10910882
|
Filing Dt:
|
08/04/2004
|
Publication #:
|
|
Pub Dt:
|
02/09/2006
| | | | |
Title:
|
NAND STRING WORDLINE DELAY REDUCTION
|
|
|
Patent #:
|
|
Issue Dt:
|
01/09/2007
|
Application #:
|
10910979
|
Filing Dt:
|
08/03/2004
|
Publication #:
|
|
Pub Dt:
|
01/13/2005
| | | | |
Title:
|
APPARATUS AND METHOD FOR MOUNTING MICROELECTRONIC DEVICES ON A MIRRORED BOARD ASSEMBLY
|
|
|
Patent #:
|
|
Issue Dt:
|
04/03/2007
|
Application #:
|
10910980
|
Filing Dt:
|
08/03/2004
|
Publication #:
|
|
Pub Dt:
|
01/13/2005
| | | | |
Title:
|
APPARATUS AND METHOD FOR MOUNTING MICROELECTRONIC DEVICES ON A MIRRORED BOARD ASSEMBLY
|
|
|
Patent #:
|
|
Issue Dt:
|
03/25/2008
|
Application #:
|
10912030
|
Filing Dt:
|
08/04/2004
|
Publication #:
|
|
Pub Dt:
|
01/13/2005
| | | | |
Title:
|
METHODS OF FORMING PATTERNED RETICLES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/25/2005
|
Application #:
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10912415
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Filing Dt:
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08/04/2004
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Publication #:
|
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Pub Dt:
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01/13/2005
| | | | |
Title:
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MULTIPLE CHIP SEMICONDUCTOR PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/16/2010
|
Application #:
|
10912441
|
Filing Dt:
|
08/05/2004
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Publication #:
|
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Pub Dt:
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02/09/2006
| | | | |
Title:
|
DIGITAL FREQUENCY LOCKED DELAY LINE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/06/2007
|
Application #:
|
10912520
|
Filing Dt:
|
08/05/2004
|
Publication #:
|
|
Pub Dt:
|
10/27/2005
| | | | |
Title:
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SENSE AMPLIFIER FOR A NON-VOLATILE MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/15/2007
|
Application #:
|
10912906
|
Filing Dt:
|
08/06/2004
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Publication #:
|
|
Pub Dt:
|
01/13/2005
| | | | |
Title:
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DEVICES CONTAINING PLATINUM-IRIDIUM FILMS AND METHODS OF PREPARING SUCH FILMS AND DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/18/2007
|
Application #:
|
10913128
|
Filing Dt:
|
08/06/2004
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Publication #:
|
|
Pub Dt:
|
02/10/2005
| | | | |
Title:
|
SENSING CIRCUIT FOR A SEMICONDUCTOR MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
08/26/2008
|
Application #:
|
10913281
|
Filing Dt:
|
08/06/2004
|
Publication #:
|
|
Pub Dt:
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02/09/2006
| | | | |
Title:
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METHODS OF ENABLING POLYSILICON GATE ELECTRODES FOR HIGH-K GATE DIELETRICS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/25/2006
|
Application #:
|
10913556
|
Filing Dt:
|
08/06/2004
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Publication #:
|
|
Pub Dt:
|
01/27/2005
| | | | |
Title:
|
CHEMISTRY FOR CHEMICAL VAPOR DEPOSITION OF TITANIUM CONTAINING FILMS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/14/2006
|
Application #:
|
10913788
|
Filing Dt:
|
08/06/2004
|
Publication #:
|
|
Pub Dt:
|
03/24/2005
| | | | |
Title:
|
SENSE AMPLIFIER WITH EQUALIZER
|
|
|
Patent #:
|
|
Issue Dt:
|
02/06/2007
|
Application #:
|
10914292
|
Filing Dt:
|
08/09/2004
|
Publication #:
|
|
Pub Dt:
|
02/09/2006
| | | | |
Title:
|
EPITAXIAL SEMICONDUCTOR LAYER AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
06/13/2006
|
Application #:
|
10914821
|
Filing Dt:
|
08/09/2004
|
Publication #:
|
|
Pub Dt:
|
01/13/2005
| | | | |
Title:
|
METHODS OF FABRICATING MULTIPLE SETS OF FIELD EFFECT TRANSISTORS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/29/2008
|
Application #:
|
10915180
|
Filing Dt:
|
08/10/2004
|
Publication #:
|
|
Pub Dt:
|
02/16/2006
| | | | |
Title:
|
MICROELECTRONIC IMAGING UNITS AND METHODS OF MANUFACTURING MICROELECTRONIC IMAGING UNITS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/27/2009
|
Application #:
|
10915454
|
Filing Dt:
|
08/11/2004
|
Publication #:
|
|
Pub Dt:
|
02/16/2006
| | | | |
Title:
|
CORRECTION OF NON-UNIFORM SENSITIVITY IN AN IMAGE ARRAY
|
|
|
Patent #:
|
|
Issue Dt:
|
09/27/2005
|
Application #:
|
10915618
|
Filing Dt:
|
08/10/2004
|
Publication #:
|
|
Pub Dt:
|
01/20/2005
| | | | |
Title:
|
ASYMMETRIC BAND-GAP ENGINEERED NONVOLATILE MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/21/2006
|
Application #:
|
10915661
|
Filing Dt:
|
08/10/2004
|
Publication #:
|
|
Pub Dt:
|
01/13/2005
| | | | |
Title:
|
METHODS AND STRUCTURE FOR AN IMPROVED FLOATING GATE MEMORY CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
04/14/2009
|
Application #:
|
10915663
|
Filing Dt:
|
08/10/2004
|
Publication #:
|
|
Pub Dt:
|
02/16/2006
| | | | |
Title:
|
MEMORY WITH TEST MODE OUTPUT
|
|
|
Patent #:
|
|
Issue Dt:
|
03/06/2007
|
Application #:
|
10915757
|
Filing Dt:
|
08/11/2004
|
Publication #:
|
|
Pub Dt:
|
01/27/2005
| | | | |
Title:
|
NICKEL BONDING CAP OVER COPPER METALIZED BONDPADS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/28/2008
|
Application #:
|
10915936
|
Filing Dt:
|
08/10/2004
|
Publication #:
|
|
Pub Dt:
|
02/16/2006
| | | | |
Title:
|
METHODS OF FORMING RETICLES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/09/2008
|
Application #:
|
10916251
|
Filing Dt:
|
08/11/2004
|
Publication #:
|
|
Pub Dt:
|
02/23/2006
| | | | |
Title:
|
DIGITAL LOCK DETECTOR FOR PLL
|
|
|
Patent #:
|
|
Issue Dt:
|
06/17/2008
|
Application #:
|
10916354
|
Filing Dt:
|
08/11/2004
|
Publication #:
|
|
Pub Dt:
|
02/16/2006
| | | | |
Title:
|
NON-PLANAR FLASH MEMORY ARRAY WITH SHIELDED FLOATING GATES ON SILICON MESAS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/2008
|
Application #:
|
10916421
|
Filing Dt:
|
08/12/2004
|
Publication #:
|
|
Pub Dt:
|
02/16/2006
| | | | |
Title:
|
METHOD OF FORMING A PCRAM DEVICE INCORPORATING A RESISTANCE-VARIABLE CHALCOGENIDE ELEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
05/22/2007
|
Application #:
|
10916751
|
Filing Dt:
|
08/11/2004
|
Publication #:
|
|
Pub Dt:
|
01/13/2005
| | | | |
Title:
|
CONDUCTIVE CONNECTION FORMING METHODS, OXIDATION REDUCING METHODS, AND INTEGRATED CIRCUITS FORMED THEREBY
|
|
|
Patent #:
|
|
Issue Dt:
|
08/09/2005
|
Application #:
|
10916888
|
Filing Dt:
|
08/11/2004
|
Publication #:
|
|
Pub Dt:
|
01/13/2005
| | | | |
Title:
|
METHODS FOR MAKING SEMICONDUCTOR DEVICE STRUCTURES WITH CAPACITOR CONTAINERS AND CONTACT APERTURES HAVING INCREASED ASPECT RATIOS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/06/2007
|
Application #:
|
10917142
|
Filing Dt:
|
08/11/2004
|
Publication #:
|
|
Pub Dt:
|
02/16/2006
| | | | |
Title:
|
METHODS AND APPARATUSES FOR PROVIDING STACKED-DIE DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
02/06/2007
|
Application #:
|
10917608
|
Filing Dt:
|
08/13/2004
|
Publication #:
|
|
Pub Dt:
|
01/20/2005
| | | | |
Title:
|
REGULATING VOLTAGES IN SEMICONDUCTOR DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
02/26/2008
|
Application #:
|
10917681
|
Filing Dt:
|
08/12/2004
|
Publication #:
|
|
Pub Dt:
|
01/20/2005
| | | | |
Title:
|
METHOD OF MAKING A SEMICONDUCTOR DEVICE HAVING AN OPENING IN A SOLDER MASK
|
|
|
Patent #:
|
|
Issue Dt:
|
07/18/2006
|
Application #:
|
10917705
|
Filing Dt:
|
08/13/2004
|
Publication #:
|
|
Pub Dt:
|
01/27/2005
| | | | |
Title:
|
CAPACITOR CONSTRUCTIONS, SEMICONDUCTOR CONSTRUCTIONS, AND METHODS OF FORMING ELECTRICAL CONTACTS AND SEMICONDUCTOR CONSTRUCTIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/21/2006
|
Application #:
|
10917894
|
Filing Dt:
|
08/13/2004
|
Publication #:
|
|
Pub Dt:
|
01/27/2005
| | | | |
Title:
|
CAPACITOR CONSTRUCTIONS, SEMICONDUCTOR CONSTRUCTIONS, AND METHODS OF FORMING ELECTRICAL CONTACTS AND SEMICONDUCTOR CONSTRUCTIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/27/2008
|
Application #:
|
10917904
|
Filing Dt:
|
08/13/2004
|
Publication #:
|
|
Pub Dt:
|
01/27/2005
| | | | |
Title:
|
BALL GRID ARRAY STRUCTURES HAVING TAPE-BASED CIRCUITRY
|
|
|
Patent #:
|
|
Issue Dt:
|
04/29/2008
|
Application #:
|
10918008
|
Filing Dt:
|
08/12/2004
|
Publication #:
|
|
Pub Dt:
|
02/16/2006
| | | | |
Title:
|
METHOD AND APPARATUS FOR HIGH-SPEED INPUT SAMPLING
|
|
|
Patent #:
|
|
Issue Dt:
|
09/11/2007
|
Application #:
|
10918141
|
Filing Dt:
|
08/13/2004
|
Publication #:
|
|
Pub Dt:
|
02/16/2006
| | | | |
Title:
|
IN-SITU SPECTROGRAPH AND METHOD OF MEASURING LIGHT WAVELENGTH CHARACTERISTICS FOR PHOTOLITHOGRAPHY
|
|
|
Patent #:
|
|
Issue Dt:
|
11/27/2007
|
Application #:
|
10918308
|
Filing Dt:
|
08/13/2004
|
Publication #:
|
|
Pub Dt:
|
02/16/2006
| | | | |
Title:
|
SYSTEMS AND METHODS FOR FORMING METAL-CONTAINING LAYERS USING VAPOR DEPOSITION PROCESSES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/31/2005
|
Application #:
|
10918382
|
Filing Dt:
|
08/16/2004
|
Publication #:
|
|
Pub Dt:
|
01/27/2005
| | | | |
Title:
|
INTEGRATED CHARGE SENSING SCHEME FOR RESISTIVE MEMORIES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/11/2005
|
Application #:
|
10918386
|
Filing Dt:
|
08/16/2004
|
Publication #:
|
|
Pub Dt:
|
01/27/2005
| | | | |
Title:
|
METHOD AND APPARATUS FOR SENSING RESISTIVE MEMORY STATE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/10/2008
|
Application #:
|
10918454
|
Filing Dt:
|
08/16/2004
|
Publication #:
|
|
Pub Dt:
|
02/16/2006
| | | | |
Title:
|
LOW DARK CURRENT IMAGE SENSORS WITH EPITAXIAL SIC AND/OR CARBONATED CHANNELS FOR ARRAY TRANSISTORS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/05/2006
|
Application #:
|
10918894
|
Filing Dt:
|
08/16/2004
|
Publication #:
|
|
Pub Dt:
|
02/16/2006
| | | | |
Title:
|
USING REDUNDANT MEMORY FOR EXTRA FEATURES
|
|
|
Patent #:
|
|
Issue Dt:
|
01/12/2010
|
Application #:
|
10919604
|
Filing Dt:
|
08/16/2004
|
Publication #:
|
|
Pub Dt:
|
02/16/2006
| | | | |
Title:
|
FRAME STRUCTURE AND SEMICONDUCTOR ATTACH PROCESS FOR USE THEREWITH FOR FABRICATION OF IMAGE SENSOR PACKAGES AND THE LIKE, AND RESULTING PACKAGES
|
|
|
Patent #:
|
|
Issue Dt:
|
04/03/2007
|
Application #:
|
10919770
|
Filing Dt:
|
08/16/2004
|
Publication #:
|
|
Pub Dt:
|
03/10/2005
| | | | |
Title:
|
CIRCUITRY FOR A PROGRAMMABLE ELEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
09/16/2008
|
Application #:
|
10920117
|
Filing Dt:
|
08/17/2004
|
Publication #:
|
|
Pub Dt:
|
01/20/2005
| | | | |
Title:
|
MICROELECTRONIC COMPONENT ASSEMBLIES EMPLOYING LEAD FRAMES HAVING REDUCED-THICKNESS INNER LENGTHS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/02/2007
|
Application #:
|
10920561
|
Filing Dt:
|
08/18/2004
|
Publication #:
|
|
Pub Dt:
|
02/23/2006
| | | | |
Title:
|
NAND MEMORY ARRAYS AND METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/21/2007
|
Application #:
|
10920579
|
Filing Dt:
|
08/17/2004
|
Publication #:
|
|
Pub Dt:
|
01/20/2005
| | | | |
Title:
|
SELECTIVELY DOPED TRENCH DEVICE ISOLATION
|
|
|
Patent #:
|
|
Issue Dt:
|
03/24/2009
|
Application #:
|
10920848
|
Filing Dt:
|
08/18/2004
|
Publication #:
|
|
Pub Dt:
|
01/27/2005
| | | | |
Title:
|
ETCH STOP LAYER IN POLY-METAL STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
06/16/2009
|
Application #:
|
10920938
|
Filing Dt:
|
08/17/2004
|
Publication #:
|
|
Pub Dt:
|
01/27/2005
| | | | |
Title:
|
SEMICONDUCTOR DEVICES INCLUDING BURIED DIGIT LINES THAT ARE LATERALLY OFFSET FROM CORRESPONDING ACTIVE-DEVICE REGIONS
|
|