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Reel/Frame:047540/0001   Pages: 843
Recorded: 07/13/2018
Attorney Dkt #:509265/2155
Conveyance: SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
03/09/2010
Application #:
11933754
Filing Dt:
11/01/2007
Publication #:
Pub Dt:
03/05/2009
Title:
SEMICONDUCTOR ASSEMBLIES AND METHODS OF MANUFACTURING SUCH ASSEMBLIES INCLUDING FORMING TRENCHES IN A FIRST SIDE OF THE MOLDING MATERIAL
2
Patent #:
Issue Dt:
09/29/2009
Application #:
11934144
Filing Dt:
11/02/2007
Publication #:
Pub Dt:
05/08/2008
Title:
MEMORY DEVICE EMPLOYING THREE-LEVEL CELLS AND RELATED METHODS OF MANAGING
3
Patent #:
Issue Dt:
11/23/2010
Application #:
11935968
Filing Dt:
11/06/2007
Publication #:
Pub Dt:
03/06/2008
Title:
STUD CAPACITOR DEVICE AND FABRICATION METHOD
4
Patent #:
Issue Dt:
10/27/2009
Application #:
11938516
Filing Dt:
11/12/2007
Publication #:
Pub Dt:
05/14/2009
Title:
SELECTIVE EDGE PHASE MIXING
5
Patent #:
Issue Dt:
11/11/2014
Application #:
11938681
Filing Dt:
11/12/2007
Publication #:
Pub Dt:
05/14/2009
Title:
SMART STORAGE DEVICE
6
Patent #:
Issue Dt:
10/16/2012
Application #:
11938726
Filing Dt:
11/12/2007
Publication #:
Pub Dt:
05/14/2009
Title:
SYSTEM AND METHOD FOR UPDATING READ-ONLY MEMORY IN SMART CARD MEMORY MODULES
7
Patent #:
Issue Dt:
04/24/2012
Application #:
11938734
Filing Dt:
11/12/2007
Publication #:
Pub Dt:
05/14/2009
Title:
INTELLIGENT CONTROLLER SYSTEM AND METHOD FOR SMART CARD MEMORY MODULES
8
Patent #:
Issue Dt:
04/10/2012
Application #:
11938739
Filing Dt:
11/12/2007
Publication #:
Pub Dt:
01/28/2010
Title:
CRITICAL SECURITY PARAMETER GENERATION AND EXCHANGE SYSTEM AND METHOD FOR SMART-CARD MEMORY MODULES
9
Patent #:
Issue Dt:
08/30/2011
Application #:
11939560
Filing Dt:
11/14/2007
Publication #:
Pub Dt:
05/14/2009
Title:
CIRCUIT STRUCTURE OF INTEGRATED CIRCUIT
10
Patent #:
Issue Dt:
01/11/2011
Application #:
11940745
Filing Dt:
11/15/2007
Publication #:
Pub Dt:
06/11/2009
Title:
SYSTEM, APPARATUS, AND METHOD FOR MODIFYING THE ORDER OF MEMORY ACCESSES
11
Patent #:
Issue Dt:
09/29/2009
Application #:
11941358
Filing Dt:
11/16/2007
Publication #:
Pub Dt:
03/13/2008
Title:
METHODS OF FABRICATING SUBSTRATES INCLUDING AT LEAST ONE CONDUCTIVE VIA
12
Patent #:
Issue Dt:
04/19/2011
Application #:
11942513
Filing Dt:
11/19/2007
Publication #:
Pub Dt:
05/21/2009
Title:
FIN-JFET
13
Patent #:
Issue Dt:
04/12/2011
Application #:
11943103
Filing Dt:
11/20/2007
Publication #:
Pub Dt:
04/10/2008
Title:
MICROELECTRONIC COMPONENT ASSEMBLIES AND MICROELECTRONIC COMPONENT LEAD FRAME STRUCTURES
14
Patent #:
Issue Dt:
12/08/2009
Application #:
11943118
Filing Dt:
11/20/2007
Publication #:
Pub Dt:
05/21/2009
Title:
READ METHOD FOR MLC
15
Patent #:
Issue Dt:
10/27/2009
Application #:
11943136
Filing Dt:
11/20/2007
Publication #:
Pub Dt:
05/21/2009
Title:
SENSING OF MEMORY CELLS IN A SOLID STATE MEMORY DEVICE BY FIXED DISCHARGE OF A BIT LINE
16
Patent #:
Issue Dt:
01/24/2012
Application #:
11943339
Filing Dt:
11/20/2007
Publication #:
Pub Dt:
03/20/2008
Title:
SNSE-BASED LIMITED REPROGRAMMABLE CELL
17
Patent #:
Issue Dt:
06/09/2009
Application #:
11943688
Filing Dt:
11/21/2007
Publication #:
Pub Dt:
03/13/2008
Title:
SYSTEMS AND METHODS OF FORMING REFRACTORY METAL NITRIDE LAYERS USING ORGANIC AMINES
18
Patent #:
Issue Dt:
11/09/2010
Application #:
11943729
Filing Dt:
11/21/2007
Publication #:
Pub Dt:
05/21/2009
Title:
MITIGATION OF DATA CORRUPTION FROM BACK PATTERN AND PROGRAM DISTURB IN A NON-VOLATILE MEMORY DEVICE
19
Patent #:
Issue Dt:
12/15/2009
Application #:
11943916
Filing Dt:
11/21/2007
Publication #:
Pub Dt:
05/21/2009
Title:
M+N BIT PROGRAMMING AND M+L BIT READ FOR M BIT MEMORY CELLS
20
Patent #:
Issue Dt:
12/04/2012
Application #:
11943943
Filing Dt:
11/21/2007
Publication #:
Pub Dt:
05/21/2009
Title:
MEMORY CONTROLLER SUPPORTING RATE-COMPATIBLE PUNCTURED CODES
21
Patent #:
Issue Dt:
03/02/2010
Application #:
11943984
Filing Dt:
11/21/2007
Publication #:
Pub Dt:
05/29/2008
Title:
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
22
Patent #:
Issue Dt:
10/25/2011
Application #:
11944023
Filing Dt:
11/21/2007
Publication #:
Pub Dt:
05/21/2009
Title:
FAULT-TOLERANT NON-VOLATILE INTEGRATED CIRCUIT MEMORY
23
Patent #:
Issue Dt:
07/30/2013
Application #:
11944168
Filing Dt:
11/21/2007
Publication #:
Pub Dt:
05/21/2009
Title:
METHOD AND APPARATUS FOR READING DATA FROM FLASH MEMORY
24
Patent #:
Issue Dt:
11/09/2010
Application #:
11945103
Filing Dt:
11/26/2007
Publication #:
Pub Dt:
05/28/2009
Title:
METHODS OF FORMING CAPACITORS, AND METHODS OF FORMING DRAM ARRAYS
25
Patent #:
Issue Dt:
06/29/2010
Application #:
11945160
Filing Dt:
11/26/2007
Publication #:
Pub Dt:
05/28/2009
Title:
METHODS OF FORMING MEMORY CELLS
26
Patent #:
Issue Dt:
03/23/2010
Application #:
11945282
Filing Dt:
11/27/2007
Publication #:
Pub Dt:
06/12/2008
Title:
SEMICONDUCTOR MEMORY DEVICE WITH TRANSFER SWITCH AND METHOD OF OPERATING THE DEVICE
27
Patent #:
Issue Dt:
11/01/2011
Application #:
11945441
Filing Dt:
11/27/2007
Publication #:
Pub Dt:
01/15/2009
Title:
WORD LINE ACTIVATION IN MEMORY DEVICES
28
Patent #:
Issue Dt:
01/14/2014
Application #:
11945658
Filing Dt:
11/27/2007
Publication #:
Pub Dt:
09/20/2012
Title:
METHOD AND SYSTEM FOR REMOVAL OF CONTAMINATES FROM PHASESHIFT PHOTOMASKS
29
Patent #:
Issue Dt:
08/03/2010
Application #:
11945787
Filing Dt:
11/27/2007
Publication #:
Pub Dt:
05/28/2009
Title:
MEMORY READ METHODS, APPARATUS, AND SYSTEMS
30
Patent #:
Issue Dt:
03/16/2010
Application #:
11947986
Filing Dt:
11/30/2007
Publication #:
Pub Dt:
03/20/2008
Title:
CASTELLATION WAFER LEVEL PACKAGING OF INTEGRATED CIRCUIT CHIPS
31
Patent #:
Issue Dt:
04/20/2010
Application #:
11949086
Filing Dt:
12/03/2007
Publication #:
Pub Dt:
06/04/2009
Title:
VERIFYING AN ERASE THRESHOLD IN A MEMORY DEVICE
32
Patent #:
Issue Dt:
12/29/2009
Application #:
11949598
Filing Dt:
12/03/2007
Publication #:
Pub Dt:
06/26/2008
Title:
METHOD FOR MULTILEVEL PROGRAMMING OF PHASE CHANGE MEMORY CELLS USING A PERCOLATION ALGORITHM
33
Patent #:
Issue Dt:
04/27/2010
Application #:
11949643
Filing Dt:
12/03/2007
Publication #:
Pub Dt:
06/04/2009
Title:
METHODS OF FORMING TRENCH ISOLATION IN SILICON OF A SEMICONDUCTOR SUBSTRATE BY PLASMA
34
Patent #:
Issue Dt:
05/25/2010
Application #:
11950496
Filing Dt:
12/05/2007
Publication #:
Pub Dt:
06/19/2008
Title:
SEMICONDUCTOR DEVICE MANUFACTURING APPARATUS AND METHOD
35
Patent #:
Issue Dt:
03/09/2010
Application #:
11951166
Filing Dt:
12/05/2007
Publication #:
Pub Dt:
06/11/2009
Title:
MEMORY DEVICES HAVING REDUCED WORD LINE CURRENT AND METHOD OF OPERATING AND MANUFACTURING THE SAME
36
Patent #:
Issue Dt:
05/31/2011
Application #:
11951171
Filing Dt:
12/05/2007
Publication #:
Pub Dt:
06/11/2009
Title:
ADJUSTING PROGRAM AND ERASE VOLTAGES IN A MEMORY DEVICE
37
Patent #:
Issue Dt:
02/08/2011
Application #:
11951751
Filing Dt:
12/06/2007
Publication #:
Pub Dt:
06/11/2009
Title:
METHODS FOR FORMING INTERCONNECTS IN MICROELECTRONIC WORKPIECES AND MICROELECTRONIC WORKPIECES FORMED USING SUCH METHODS
38
Patent #:
Issue Dt:
06/05/2012
Application #:
11951796
Filing Dt:
12/06/2007
Publication #:
Pub Dt:
04/17/2008
Title:
RESONATOR FOR THERMO OPTIC DEVICE
39
Patent #:
Issue Dt:
02/09/2010
Application #:
11952017
Filing Dt:
12/06/2007
Publication #:
Pub Dt:
06/11/2009
Title:
METHOD FOR FORMING HIGH DENSITY PATTERNS
40
Patent #:
Issue Dt:
02/05/2013
Application #:
11952550
Filing Dt:
12/07/2007
Publication #:
Pub Dt:
06/11/2009
Title:
MAJORITY DETECTOR APPARATUS, SYSTEMS, AND METHODS
41
Patent #:
Issue Dt:
03/09/2010
Application #:
11952675
Filing Dt:
12/07/2007
Publication #:
Pub Dt:
06/26/2008
Title:
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
42
Patent #:
Issue Dt:
03/08/2011
Application #:
11954763
Filing Dt:
12/12/2007
Publication #:
Pub Dt:
06/18/2009
Title:
COMPENSATION CAPACITOR NETWORK FOR DIVIDED DIFFUSED RESISTORS FOR A VOLTAGE DIVIDER
43
Patent #:
Issue Dt:
01/19/2010
Application #:
11954902
Filing Dt:
12/12/2007
Publication #:
Pub Dt:
04/17/2008
Title:
METHODS OF FORMING CAPACITORS
44
Patent #:
Issue Dt:
11/02/2010
Application #:
11955251
Filing Dt:
12/12/2007
Publication #:
Pub Dt:
04/24/2008
Title:
DRAM ARRAYS, VERTICAL TRANSISTOR STRUCTURES, AND METHODS OF FORMING TRANSISTOR STRUCTURES AND DRAM ARRAYS
45
Patent #:
Issue Dt:
06/22/2010
Application #:
11955790
Filing Dt:
12/13/2007
Publication #:
Pub Dt:
06/19/2008
Title:
SEMICONDUCTOR DEVICE INCLUDING A SIGNAL GENERATOR ACTIVATED UPON OCCURING OF A TIMING SIGNAL
46
Patent #:
Issue Dt:
04/27/2010
Application #:
11955968
Filing Dt:
12/13/2007
Publication #:
Pub Dt:
06/19/2008
Title:
SEMICONDUCTOR DEVICE INCLUDING A FIN-CHANNEL RECESS-GATE MISFET
47
Patent #:
Issue Dt:
03/09/2010
Application #:
11956099
Filing Dt:
12/13/2007
Publication #:
Pub Dt:
06/18/2009
Title:
PRE-DRIVER LOGIC
48
Patent #:
Issue Dt:
07/13/2010
Application #:
11956560
Filing Dt:
12/14/2007
Publication #:
Pub Dt:
07/10/2008
Title:
METHOD FOR MANUFACTURING A THREE-DIMENSIONAL SEMICONDUCTOR DEVICE AND A WAFER USED THEREIN
49
Patent #:
Issue Dt:
03/30/2010
Application #:
11957013
Filing Dt:
12/14/2007
Publication #:
Pub Dt:
05/01/2008
Title:
INTEGRATED CIRCUITS .
50
Patent #:
Issue Dt:
01/05/2010
Application #:
11957333
Filing Dt:
12/14/2007
Publication #:
Pub Dt:
04/24/2008
Title:
CLOCK GENERATING CIRCUIT WITH MULTIPLE MODES OF OPERATION
51
Patent #:
Issue Dt:
01/01/2013
Application #:
11958150
Filing Dt:
12/17/2007
Publication #:
Pub Dt:
06/18/2009
Title:
SELF-TIMED ERROR CORRECTING CODE EVALUATION SYSTEM AND METHOD
52
Patent #:
Issue Dt:
06/28/2011
Application #:
11958189
Filing Dt:
12/17/2007
Publication #:
Pub Dt:
06/18/2009
Title:
SYSTEM AND METHOD FOR REDUCING LOCK TIME IN A PHASE-LOCKED LOOP
53
Patent #:
NONE
Issue Dt:
Application #:
11958514
Filing Dt:
12/18/2007
Publication #:
Pub Dt:
06/18/2009
Title:
ADDRESS TRANSLATION BETWEEN A MEMORY CONTROLLER AND AN EXTERNAL MEMORY DEVICE
54
Patent #:
Issue Dt:
12/07/2010
Application #:
11958551
Filing Dt:
12/18/2007
Publication #:
Pub Dt:
06/18/2009
Title:
METHODS OF FORMING TRENCH ISOLATION AND METHODS OF FORMING FLOATING GATE TRANSISTORS
55
Patent #:
Issue Dt:
10/21/2008
Application #:
11958658
Filing Dt:
12/18/2007
Publication #:
Pub Dt:
04/24/2008
Title:
LOW POWER MULTIPLE BIT SENSE AMPLIFIER
56
Patent #:
Issue Dt:
02/07/2012
Application #:
11958757
Filing Dt:
12/18/2007
Publication #:
Pub Dt:
06/18/2009
Title:
METHODS OF PACKAGING IMAGER DEVICES AND OPTICS MODULES, AND RESULTING ASSEMBLIES
57
Patent #:
Issue Dt:
07/06/2010
Application #:
11958842
Filing Dt:
12/18/2007
Publication #:
Pub Dt:
06/18/2009
Title:
METHODS OF FLUXLESS MICRO-PIERCING OF SOLDER BALLS, AND RESULTING DEVICES
58
Patent #:
Issue Dt:
10/14/2014
Application #:
11958873
Filing Dt:
12/18/2007
Publication #:
Pub Dt:
06/18/2009
Title:
Techniques for Incorporating Timing Jitter and/or Amplitude Noise into Hardware Description Language-based Input Stimuli
59
Patent #:
Issue Dt:
08/18/2009
Application #:
11959013
Filing Dt:
12/18/2007
Publication #:
Pub Dt:
04/24/2008
Title:
STACKED DIE WITH A RECESS IN A DIE BGA PACKAGE
60
Patent #:
Issue Dt:
11/24/2009
Application #:
11959094
Filing Dt:
12/18/2007
Publication #:
Pub Dt:
06/18/2009
Title:
METHODS, DEVICES, AND SYSTEMS FOR A DELAY LOCKED LOOP HAVING A FREQUENCY DIVIDED FEEDBACK CLOCK
61
Patent #:
Issue Dt:
09/07/2010
Application #:
11959409
Filing Dt:
12/18/2007
Publication #:
Pub Dt:
06/18/2009
Title:
METHODS FOR ISOLATING PORTIONS OF A LOOP OF PITCH-MULTIPLIED MATERIAL AND RELATED STRUCTURES
62
Patent #:
Issue Dt:
08/16/2011
Application #:
11960034
Filing Dt:
12/19/2007
Publication #:
Pub Dt:
04/24/2008
Title:
ELECTRICAL INTERCONNECT USING LOCALLY CONDUCTIVE ADHESIVE
63
Patent #:
Issue Dt:
01/03/2012
Application #:
11960771
Filing Dt:
12/20/2007
Publication #:
Pub Dt:
06/26/2008
Title:
POWER SUPPLY VOLTAGE RESET CIRCUIT AND RESET SIGNAL GENERATING METHOD
64
Patent #:
Issue Dt:
02/22/2011
Application #:
11962967
Filing Dt:
12/21/2007
Publication #:
Pub Dt:
06/05/2008
Title:
ISOLATION TRENCHES FOR MEMORY DEVICES
65
Patent #:
Issue Dt:
04/26/2011
Application #:
11963230
Filing Dt:
12/21/2007
Publication #:
Pub Dt:
06/25/2009
Title:
METHOD OF FORMING TEMPORARY CARRIER STRUCTURE AND ASSOCIATED RELEASE TECHNIQUES
66
Patent #:
Issue Dt:
04/27/2010
Application #:
11964250
Filing Dt:
12/26/2007
Publication #:
Pub Dt:
04/24/2008
Title:
VOLTAGE REGULATOR FOR THE PROGRAMMING CIRCUIT OF A MEMORY CELL
67
Patent #:
Issue Dt:
06/23/2009
Application #:
11964594
Filing Dt:
12/26/2007
Publication #:
Pub Dt:
05/01/2008
Title:
PACKAGED MICROELECTRONIC DEVICES AND METHODS FOR PACKAGING MICROELECTRONIC DEVICES
68
Patent #:
Issue Dt:
07/05/2011
Application #:
11966705
Filing Dt:
12/28/2007
Publication #:
Pub Dt:
07/02/2009
Title:
WAFER PROCESSING
69
Patent #:
Issue Dt:
12/27/2011
Application #:
11966824
Filing Dt:
12/28/2007
Publication #:
Pub Dt:
07/02/2009
Title:
PASS-THROUGH 3D INTERCONNECT FOR MICROELECTRONIC DIES AND ASSOCIATED SYSTEMS AND METHODS
70
Patent #:
Issue Dt:
05/11/2010
Application #:
11968281
Filing Dt:
01/02/2008
Publication #:
Pub Dt:
05/01/2008
Title:
METHODS OF FORMING SEMICONDUCTOR STRUCTURES
71
Patent #:
Issue Dt:
06/09/2015
Application #:
11968510
Filing Dt:
01/02/2008
Publication #:
Pub Dt:
07/02/2009
Title:
RECYCLED VERSION NUMBER VALUES IN FLASH MEMORY
72
Patent #:
Issue Dt:
05/17/2011
Application #:
11969182
Filing Dt:
01/03/2008
Publication #:
Pub Dt:
05/01/2008
Title:
SYSTEMS AND METHODS OF FORMING TANTALUM SILICIDE LAYERS
73
Patent #:
Issue Dt:
03/29/2011
Application #:
11969300
Filing Dt:
01/04/2008
Publication #:
Pub Dt:
05/01/2008
Title:
INTERCONNECTING SUBSTRATES FOR MICROELECTRONIC DIES, METHODS FOR FORMING VIAS IN SUCH SUBSTRATES, AND METHODS FOR PACKAGING MICROELECTRONIC DEVICES
74
Patent #:
Issue Dt:
12/24/2013
Application #:
11969443
Filing Dt:
01/04/2008
Publication #:
Pub Dt:
07/09/2009
Title:
Method of Etching a High Aspect Ratio Contact
75
Patent #:
Issue Dt:
08/19/2008
Application #:
11969668
Filing Dt:
01/04/2008
Publication #:
Pub Dt:
05/01/2008
Title:
NAND FLASH MEMORY CELL PROGRAMMING
76
Patent #:
Issue Dt:
07/18/2017
Application #:
11969792
Filing Dt:
01/04/2008
Publication #:
Pub Dt:
07/09/2009
Title:
MICROPROCESSOR ARCHITECTURE HAVING ALTERNATIVE MEMORY ACCESS PATHS
77
Patent #:
Issue Dt:
01/24/2012
Application #:
11969801
Filing Dt:
01/04/2008
Publication #:
Pub Dt:
07/09/2009
Title:
EXPLICIT SKEW INTERFACE FOR MITIGATING CROSSTALK AND SIMULTANEOUS SWITCHING NOISE
78
Patent #:
Issue Dt:
08/02/2011
Application #:
11970369
Filing Dt:
01/07/2008
Publication #:
Pub Dt:
07/09/2009
Title:
SEMICONDUCTOR PROCESSING METHODS, AND METHODS FOR FORMING SILICON DIOXIDE
79
Patent #:
Issue Dt:
06/07/2011
Application #:
11970843
Filing Dt:
01/11/2008
Publication #:
Pub Dt:
06/05/2008
Title:
DOUBLE-DOPED POLYSILICON FLOATING GATE
80
Patent #:
Issue Dt:
03/05/2013
Application #:
11971138
Filing Dt:
01/08/2008
Publication #:
Pub Dt:
07/09/2009
Title:
CAPACITOR FORMING METHODS
81
Patent #:
Issue Dt:
10/04/2011
Application #:
11971143
Filing Dt:
01/08/2008
Publication #:
Pub Dt:
07/17/2008
Title:
MISSING PIXEL ARCHITECTURE
82
Patent #:
Issue Dt:
06/08/2010
Application #:
11971150
Filing Dt:
01/08/2008
Publication #:
Pub Dt:
05/08/2008
Title:
METHOD AND SYSTEM FOR ELECTRICALLY COUPLING A CHIP TO CHIP PACKAGE
83
Patent #:
Issue Dt:
04/14/2009
Application #:
11971747
Filing Dt:
01/09/2008
Publication #:
Pub Dt:
05/15/2008
Title:
METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS
84
Patent #:
Issue Dt:
10/25/2011
Application #:
11972098
Filing Dt:
01/10/2008
Publication #:
Pub Dt:
06/05/2008
Title:
METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS
85
Patent #:
Issue Dt:
10/16/2012
Application #:
11972209
Filing Dt:
01/10/2008
Publication #:
Pub Dt:
07/16/2009
Title:
ASYMMETRIC CHIP-TO-CHIP INTERCONNECT
86
Patent #:
Issue Dt:
04/07/2015
Application #:
11972483
Filing Dt:
01/10/2008
Publication #:
Pub Dt:
07/16/2009
Title:
VOLTAGE GENERATOR CIRCUIT
87
Patent #:
Issue Dt:
08/31/2010
Application #:
11972729
Filing Dt:
01/11/2008
Publication #:
Pub Dt:
07/17/2008
Title:
DIELETRIC FILM LAYERED PRODUCT
88
Patent #:
Issue Dt:
03/31/2009
Application #:
11973022
Filing Dt:
10/05/2007
Publication #:
Pub Dt:
04/09/2009
Title:
CIRCUITS, DEVICES, SYSTEMS, AND METHODS OF OPERATION FOR A LINEAR OUTPUT DRIVER
89
Patent #:
Issue Dt:
03/22/2011
Application #:
11973515
Filing Dt:
10/09/2007
Publication #:
Pub Dt:
04/09/2009
Title:
NON-VOLATILE MEMORY DEVICE HAVING ASSIGNABLE NETWORK IDENTIFICATION
90
Patent #:
Issue Dt:
07/06/2010
Application #:
11973677
Filing Dt:
10/10/2007
Publication #:
Pub Dt:
04/16/2009
Title:
PROGRAMMING SEQUENCE IN NAND MEMORY
91
Patent #:
Issue Dt:
06/22/2010
Application #:
11973733
Filing Dt:
10/10/2007
Publication #:
Pub Dt:
08/28/2008
Title:
LOCAL SELF-BOOST INHIBIT SCHEME WITH SHIELDED WORD LINE
92
Patent #:
Issue Dt:
08/25/2009
Application #:
11974925
Filing Dt:
10/16/2007
Publication #:
Pub Dt:
05/08/2008
Title:
MOS LINEAR REGION IMPEDANCE CURVATURE CORRECTION
93
Patent #:
Issue Dt:
08/24/2010
Application #:
11975204
Filing Dt:
10/18/2007
Publication #:
Pub Dt:
04/23/2009
Title:
SENSING OF MEMORY CELLS IN NAND FLASH
94
Patent #:
Issue Dt:
06/02/2009
Application #:
11975862
Filing Dt:
10/22/2007
Publication #:
Pub Dt:
03/06/2008
Title:
SEMICONDUCTOR DEVICE
95
Patent #:
Issue Dt:
06/08/2010
Application #:
11977705
Filing Dt:
10/25/2007
Publication #:
Pub Dt:
03/27/2008
Title:
SEMICONDUCTOR DEVICE
96
Patent #:
Issue Dt:
07/13/2010
Application #:
11978600
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
05/08/2008
Title:
SEMICONDUCTOR STORAGE DEVICE AND METHOD OF MANUFACTURING THE SAME
97
Patent #:
Issue Dt:
11/11/2008
Application #:
11979327
Filing Dt:
11/01/2007
Publication #:
Pub Dt:
03/13/2008
Title:
INPUT BUFFER DESIGN USING COMMON-MODE FEEDBACK (CMFB)
98
Patent #:
Issue Dt:
04/28/2009
Application #:
11981140
Filing Dt:
10/31/2007
Publication #:
Pub Dt:
04/03/2008
Title:
STRAINED SI/SIGE/SOI ISLANDS AND PROCESSES OF MAKING SAME
99
Patent #:
Issue Dt:
09/08/2009
Application #:
11982107
Filing Dt:
11/01/2007
Publication #:
Pub Dt:
03/20/2008
Title:
CONTROLLING DIFFUSION IN DOPED SEMICONDUCTOR REGIONS
100
Patent #:
Issue Dt:
02/03/2009
Application #:
11982807
Filing Dt:
11/05/2007
Publication #:
Pub Dt:
03/13/2008
Title:
SENSE AMPLIFIER CIRCUITRY AND ARCHITECTURE TO WRITE DATA INTO AND/OR READ FROM MEMORY CELLS
Assignors
1
Exec Dt:
07/03/2018
2
Exec Dt:
07/03/2018
Assignee
1
10 S. DEARBORN
7TH FLOOR
CHICAGO, ILLINOIS 60603
Correspondence name and address
MARCELA ROBLEDO
2475 HANOVER STREET
PALO ALTO, CA 94304

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