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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:048661/0804   Pages: 9
Recorded: 03/21/2019
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 26
1
Patent #:
6506648
Issue Dt:
01/14/2003
Application #:
09145818
Filing Dt:
09/02/1998
Title:
METHOD OF FABRICATING A HIGH POWER RF FIELD EFFECT TRANSISTOR WITH REDUCED HOT ELECTRON INJECTION AND RESULTING STRUCTURE
2
Patent #:
6177843
Issue Dt:
01/23/2001
Application #:
09320057
Filing Dt:
05/26/1999
Title:
OSCILLATOR CIRCUIT CONTROLLED BY PROGRAMMABLE LOGIC
3
Patent #:
6221682
Issue Dt:
04/24/2001
Application #:
09321565
Filing Dt:
05/28/1999
Title:
METHOD AND APPARATUS FOR EVALUATING A KNOWN GOOD DIE USING BOTH WIRE BOND AND FLIP-CHIP INTERCONNECTS
4
Patent #:
6498399
Issue Dt:
12/24/2002
Application #:
09391721
Filing Dt:
09/08/1999
Publication #:
US20020142577
Pub Dt:
10/03/2002
Title:
LOW DIELECTRIC-CONSTANT DIELECTRIC FOR ETCHSTOP IN DUAL DAMASCENE BACKEND OF INTEGRATED CIRCUITS
5
Patent #:
6831690
Issue Dt:
12/14/2004
Application #:
09456206
Filing Dt:
12/07/1999
Title:
ELECTRICAL SENSING APPARATUS AND METHOD UTILIZING AN ARRAY OF TRANSDUCER ELEMENTS
6
Patent #:
6456183
Issue Dt:
09/24/2002
Application #:
09511748
Filing Dt:
02/24/2000
Title:
INDUCTOR FOR INTEGRATED CIRCUIT
7
Patent #:
6459135
Issue Dt:
10/01/2002
Application #:
09525840
Filing Dt:
03/15/2000
Title:
MONOLITHIC INTEGRATED CIRCUIT INCORPORATING AN INDUCTIVE COMPONENT AND PROCESS FOR FABRICATING SUCH AN INTEGRATED CIRCUIT
8
Patent #:
6735422
Issue Dt:
05/11/2004
Application #:
09677975
Filing Dt:
10/02/2000
Title:
CALIBRATED DC COMPENSATION SYSTEM FOR A WIRELESS COMMUNICATION DEVICE CONFIGURED IN A ZERO INTERMEDIATE FREQUENCY ARCHITECTURE
9
Patent #:
6560448
Issue Dt:
05/06/2003
Application #:
09678901
Filing Dt:
10/02/2000
Title:
DC COMPENSATION SYSTEM FOR A WIRELESS COMMUNICATION DEVICE CONFIGURED IN A ZERO INTERMEDIATE FREQUENCY ARCHITECTURE
10
Patent #:
6674998
Issue Dt:
01/06/2004
Application #:
09747138
Filing Dt:
12/21/2000
Publication #:
US20020042255
Pub Dt:
04/11/2002
Title:
SYSTEM AND METHOD FOR DETECTING AND CORRECTING PHASE ERROR BETWEEN DIFFERENTIAL SIGNALS
11
Patent #:
6891440
Issue Dt:
05/10/2005
Application #:
09747163
Filing Dt:
12/21/2000
Publication #:
US20020039052
Pub Dt:
04/04/2002
Title:
QUADRATURE OSCILLATOR WITH PHASE ERROR CORRECTION
12
Patent #:
6388322
Issue Dt:
05/14/2002
Application #:
09764192
Filing Dt:
01/17/2001
Title:
ARTICLE COMPRISING A MECHANICALLY COMPLIANT BUMP
13
Patent #:
6628171
Issue Dt:
09/30/2003
Application #:
09767989
Filing Dt:
01/23/2001
Title:
METHOD, ARCHITECTURE AND CIRCUIT FOR CONTROLLING AND/OR OPERATING AN OSCILLATOR
14
Patent #:
6853259
Issue Dt:
02/08/2005
Application #:
09930822
Filing Dt:
08/15/2001
Publication #:
US20030034848
Pub Dt:
02/20/2003
Title:
RING OSCILLATOR DYNAMIC ADJUSTMENTS FOR AUTO CALIBRATION
15
Patent #:
6458411
Issue Dt:
10/01/2002
Application #:
09971764
Filing Dt:
10/05/2001
Title:
METHOD OF MAKING A MECHANICALLY COMPLIANT BUMP
16
Patent #:
6721310
Issue Dt:
04/13/2004
Application #:
10000272
Filing Dt:
11/02/2001
Publication #:
US20030099193
Pub Dt:
05/29/2003
Title:
MULTIPORT NON-BLOCKING HIGH CAPACITY ATM AND PACKET SWITCH
17
Patent #:
6763228
Issue Dt:
07/13/2004
Application #:
10027386
Filing Dt:
12/21/2001
Publication #:
US20020086651
Pub Dt:
07/04/2002
Title:
PRECISION AUTOMATIC GAIN CONTROL CIRCUIT
18
Patent #:
6646465
Issue Dt:
11/11/2003
Application #:
10072461
Filing Dt:
02/07/2002
Publication #:
US20020113618
Pub Dt:
08/22/2002
Title:
PROGRAMMABLE LOGIC DEVICE INCLUDING BI-DIRECTIONAL SHIFT REGISTER
19
Patent #:
6744311
Issue Dt:
06/01/2004
Application #:
10128049
Filing Dt:
04/23/2002
Publication #:
US20020180519
Pub Dt:
12/05/2002
Title:
SWITCHING AMPLIFIER WITH VOLTAGE-MULTIPLYING OUTPUT STAGE
20
Patent #:
6838970
Issue Dt:
01/04/2005
Application #:
10206284
Filing Dt:
07/26/2002
Publication #:
US20020186114
Pub Dt:
12/12/2002
Title:
INDUCTOR FOR INTEGRATED CIRCUIT
21
Patent #:
6748200
Issue Dt:
06/08/2004
Application #:
10407350
Filing Dt:
04/04/2003
Title:
AUTOMATIC GAIN CONTROL SYSTEM AND METHOD FOR A ZIF ARCHITECTURE
22
Patent #:
7511754
Issue Dt:
03/31/2009
Application #:
10973368
Filing Dt:
10/26/2004
Publication #:
US20050088554
Pub Dt:
04/28/2005
Title:
ELECTRICAL SENSING APPARATUS AND METHOD UTILIZING AN ARRAY OF TRANSDUCER ELEMENTS
23
Patent #:
7068557
Issue Dt:
06/27/2006
Application #:
11042689
Filing Dt:
01/25/2005
Publication #:
US20050125181
Pub Dt:
06/09/2005
Title:
RING OSCILLATOR DYNAMIC ADJUSTMENTS FOR AUTO CALIBRATION
24
Patent #:
7209401
Issue Dt:
04/24/2007
Application #:
11415771
Filing Dt:
05/02/2006
Publication #:
US20060197696
Pub Dt:
09/07/2006
Title:
RING OSCILLATOR DYNAMIC ADJUSTMENTS FOR AUTO CALIBRATION
25
Patent #:
RE43607
Issue Dt:
08/28/2012
Application #:
11809901
Filing Dt:
05/31/2007
Title:
METHOD AND APPARATUS FOR EVALUATING A KNOWN GOOD DIE USING BOTH WIRE BOND AND FLIP-CHIP INTERCONNECTS
26
Patent #:
RE42799
Issue Dt:
10/04/2011
Application #:
12147975
Filing Dt:
06/27/2008
Title:
PACKET ACQUISITION AND CHANNEL TRACKING FOR A WIRELESS COMMUNICATION DEVICE CONFIGURED IN A ZERO INTERMEDIATE FREQUENCY ARCHITECTURE
Assignor
1
INTELLECTUAL VENTURES ASSETS 113 LLC
Exec Dt:
03/15/2019
Assignee
1
M-RED INC.
1601 ELM ST., SUITE 4360
DALLAS, TEXAS 75201
Correspondence name and address
JON SCAHILL
411 THEODORE FREMD AVE. SUITE 206S
RYE, NY 10580-1411

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