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Reel/Frame:	048734/0001			Pages:	527
		Recorded:	02/20/2019
Conveyance:	CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS..

Total properties: 6031
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Patent #:	7286070	Issue Dt:	10/23/2007	Application #:	11284566	Filing Dt:	11/21/2005
Publication #:	US20070115158	Pub Dt:	05/24/2007
Title:	RF CARRIER GENERATOR AND METHOD THEREOF

Patent #:	7327194	Issue Dt:	02/05/2008	Application #:	11290286	Filing Dt:	11/30/2005
Publication #:	US20070120604	Pub Dt:	05/31/2007
Title:	LOW VOLTAGE LOW POWER CLASS A/B OUTPUT STAGE

Patent #:	7344917	Issue Dt:	03/18/2008	Application #:	11290300	Filing Dt:	11/30/2005
Publication #:	US20070122940	Pub Dt:	05/31/2007
Title:	METHOD FOR PACKAGING A SEMICONDUCTOR DEVICE

Patent #:	7618902	Issue Dt:	11/17/2009	Application #:	11290320	Filing Dt:	11/30/2005
Publication #:	US20070123056	Pub Dt:	05/31/2007
Title:	PLASMA TREATMENT OF A SEMICONDUCTOR SURFACE FOR ENHANCED NUCLEATION OF A METAL-CONTAINING LAYER

Patent #:	7236402	Issue Dt:	06/26/2007	Application #:	11290321	Filing Dt:	11/30/2005
Publication #:	US20070121387	Pub Dt:	05/31/2007
Title:	METHOD AND APPARATUS FOR PROGRAMMING/ERASING A NON-VOLATILE MEMORY

Patent #:	7437698	Issue Dt:	10/14/2008	Application #:	11290368	Filing Dt:	11/30/2005
Publication #:	US20070124717	Pub Dt:	05/31/2007
Title:	METHOD AND PROGRAM PRODUCT FOR PROTECTING INFORMATION IN EDA TOOL DESIGN VIEWS

Patent #:	7282395	Issue Dt:	10/16/2007	Application #:	11297103	Filing Dt:	12/07/2005
Publication #:	US20070128766	Pub Dt:	06/07/2007
Title:	METHOD OF MAKING EXPOSED PAD BALL GRID ARRAY PACKAGE

Patent #:	7236014	Issue Dt:	06/26/2007	Application #:	11297191	Filing Dt:	12/07/2005
Publication #:	US20070126480	Pub Dt:	06/07/2007
Title:	CIRCUIT AND METHOD FOR PEAK DETECTION OF AN ANALOG SIGNAL

Patent #:	7362190	Issue Dt:	04/22/2008	Application #:	11297884	Filing Dt:	12/09/2005
Publication #:	US20070132519	Pub Dt:	06/14/2007
Title:	OSCILLATOR CIRCUIT WITH HIGH PASS FILTER AND LOW PASDS FILTER IN OUTPUT STAGE

Patent #:	7592248	Issue Dt:	09/22/2009	Application #:	11298148	Filing Dt:	12/09/2005
Publication #:	US20090142934	Pub Dt:	06/04/2009
Title:	METHOD OF FORMING SEMICONDUCTOR DEVICE HAVING NANOTUBE STRUCTURES

Patent #:	7116537	Issue Dt:	10/03/2006	Application #:	11300075	Filing Dt:	12/14/2005
Publication #:	US20060132999	Pub Dt:	06/22/2006
Title:	SURGE CURRENT PREVENTION CIRCUIT AND DC POWER SUPPLY

Patent #:	7339775	Issue Dt:	03/04/2008	Application #:	11300076	Filing Dt:	12/14/2005
Publication #:	US20060133000	Pub Dt:	06/22/2006
Title:	OVERCURRENT PROTECTION CIRCUIT AND DC POWER SUPPLY

Patent #:	7679125	Issue Dt:	03/16/2010	Application #:	11300077	Filing Dt:	12/14/2005
Publication #:	US20070134888	Pub Dt:	06/14/2007
Title:	BACK-GATED SEMICONDUCTOR DEVICE WITH A STORAGE LAYER AND METHODS FOR FORMING THEREOF

Patent #:	7511360	Issue Dt:	03/31/2009	Application #:	11300091	Filing Dt:	12/14/2005
Publication #:	US20070132031	Pub Dt:	06/14/2007
Title:	SEMICONDUCTOR DEVICE HAVING STRESSORS AND METHOD FOR FORMING

Patent #:	7335955	Issue Dt:	02/26/2008	Application #:	11300710	Filing Dt:	12/14/2005
Publication #:	US20070132029	Pub Dt:	06/14/2007
Title:	ESD PROTECTION FOR PASSIVE INTEGRATED DEVICES

Patent #:	7683486	Issue Dt:	03/23/2010	Application #:	11302007	Filing Dt:	12/09/2005
Publication #:	US20070132062	Pub Dt:	06/14/2007
Title:	ELECTRONIC APPARATUS INTERCONNECT ROUTING AND INTERCONNECT ROUTING METHOD FOR MINIMIZING PARASITIC RESISTANCE

Patent #:	7741221	Issue Dt:	06/22/2010	Application #:	11302769	Filing Dt:	12/14/2005
Publication #:	US20070134921	Pub Dt:	06/14/2007
Title:	METHOD OF FORMING A SEMICONDUCTOR DEVICE HAVING DUMMY FEATURES

Patent #:	7288458	Issue Dt:	10/30/2007	Application #:	11302770	Filing Dt:	12/14/2005
Publication #:	US20070134891	Pub Dt:	06/14/2007
Title:	SOI ACTIVE LAYER WITH DIFFERENT SURFACE ORIENTATION

Patent #:	7622349	Issue Dt:	11/24/2009	Application #:	11302937	Filing Dt:	12/14/2005
Publication #:	US20070134867	Pub Dt:	06/14/2007
Title:	FLOATING GATE NON-VOLATILE MEMORY AND METHOD THEREOF

Patent #:	7633307	Issue Dt:	12/15/2009	Application #:	11303234	Filing Dt:	12/16/2005
Publication #:	US20070139064	Pub Dt:	06/21/2007
Title:	METHOD FOR DETERMINING TEMPERATURE PROFILE IN SEMICONDUCTOR MANUFACTURING TEST

Patent #:	7378317	Issue Dt:	05/27/2008	Application #:	11304196	Filing Dt:	12/14/2005
Publication #:	US20070132020	Pub Dt:	06/14/2007
Title:	SUPERJUNCTION POWER MOSFET

Patent #:	7968394	Issue Dt:	06/28/2011	Application #:	11311587	Filing Dt:	12/16/2005
Publication #:	US20070161170	Pub Dt:	07/12/2007
Title:	TRANSISTOR WITH IMMERSED CONTACTS AND METHODS OF FORMING THEREOF

Patent #:	7312654	Issue Dt:	12/25/2007	Application #:	11314203	Filing Dt:	12/20/2005
Publication #:	US20070139103	Pub Dt:	06/21/2007
Title:	QUIET POWER UP AND POWER DOWN OF A DIGITAL AUDIO AMPLIFIER

Patent #:	7763213	Issue Dt:	07/27/2010	Application #:	11314220	Filing Dt:	12/21/2005
Publication #:	US20070138031	Pub Dt:	06/21/2007
Title:	VOLATILE CORROSION INHIBITOR PACKAGES

Patent #:	7376568	Issue Dt:	05/20/2008	Application #:	11315733	Filing Dt:	12/22/2005
Publication #:	US20060149559	Pub Dt:	07/06/2006
Title:	VOICE SIGNAL PROCESSOR

Patent #:	7420426	Issue Dt:	09/02/2008	Application #:	11323294	Filing Dt:	12/30/2005
Publication #:	US20070153952	Pub Dt:	07/05/2007
Title:	FREQUENCY MODULATED OUTPUT CLOCK FROM A DIGITAL PHASE LOCKED LOOP

Patent #:	7799661	Issue Dt:	09/21/2010	Application #:	11324425	Filing Dt:	01/03/2006
Publication #:	US20070155185	Pub Dt:	07/05/2007
Title:	ELECTRICAL SENSOR FOR REAL-TIME FEEDBACK CONTROL OF PLASMA NITRIDATION

Patent #:	7344933	Issue Dt:	03/18/2008	Application #:	11324510	Filing Dt:	01/03/2006
Publication #:	US20070155073	Pub Dt:	07/05/2007
Title:	METHOD OF FORMING DEVICE HAVING A RAISED EXTENSION REGION

Patent #:	7261003	Issue Dt:	08/28/2007	Application #:	11324830	Filing Dt:	01/03/2006
Publication #:	US20070151366	Pub Dt:	07/05/2007
Title:	FLOWMETER AND METHOD FOR THE MAKING THEREOF

Patent #:	7693219	Issue Dt:	04/06/2010	Application #:	11325066	Filing Dt:	01/04/2006
Publication #:	US20070153897	Pub Dt:	07/05/2007
Title:	SYSTEM AND METHOD FOR FAST MOTION ESTIMATION

Patent #:	7534693	Issue Dt:	05/19/2009	Application #:	11326524	Filing Dt:	01/04/2006
Publication #:	US20070155113	Pub Dt:	07/05/2007
Title:	THIN-FILM CAPACITOR WITH A FIELD MODIFICATION LAYER AND METHODS FOR FORMING THE SAME

Patent #:	7432122	Issue Dt:	10/07/2008	Application #:	11327686	Filing Dt:	01/06/2006
Publication #:	US20070158703	Pub Dt:	07/12/2007
Title:	ELECTRONIC DEVICE AND A PROCESS FOR FORMING THE ELECTRONIC DEVICE

Patent #:	7723805	Issue Dt:	05/25/2010	Application #:	11328594	Filing Dt:	01/10/2006
Publication #:	US20070158764	Pub Dt:	07/12/2007
Title:	ELECTRONIC DEVICE INCLUDING A FIN-TYPE TRANSISTOR STRUCTURE AND A PROCESS FOR FORMING THE ELECTRONIC DEVICE

Patent #:	7432729	Issue Dt:	10/07/2008	Application #:	11328645	Filing Dt:	01/10/2006
Publication #:	US20070159202	Pub Dt:	07/12/2007
Title:	METHODS OF TESTING ELECTRONIC DEVICES

Patent #:	7709303	Issue Dt:	05/04/2010	Application #:	11328668	Filing Dt:	01/10/2006
Publication #:	US20070161171	Pub Dt:	07/12/2007
Title:	PROCESS FOR FORMING AN ELECTRONIC DEVICE INCLUDING A FIN-TYPE STRUCTURE

Patent #:	7763538	Issue Dt:	07/27/2010	Application #:	11328693	Filing Dt:	01/10/2006
Publication #:	US20070161229	Pub Dt:	07/12/2007
Title:	DUAL PLASMA TREATMENT BARRIER FILM TO REDUCE LOW-K DAMAGE

Patent #:	7754560	Issue Dt:	07/13/2010	Application #:	11328779	Filing Dt:	01/10/2006
Publication #:	US20070158730	Pub Dt:	07/12/2007
Title:	INTEGRATED CIRCUIT USING FINFETS AND HAVING A STATIC RANDOM ACCESS MEMORY (SRAM)

Patent #:	7583945	Issue Dt:	09/01/2009	Application #:	11329752	Filing Dt:	01/10/2006
Publication #:	US20070161359	Pub Dt:	07/12/2007
Title:	AMPLIFIER WITH IMPROVED NOISE PERFORMANCE AND EXTENDED GAIN CONTROL RANGE

Patent #:	7303983	Issue Dt:	12/04/2007	Application #:	11331763	Filing Dt:	01/13/2006
Publication #:	US20070166970	Pub Dt:	07/19/2007
Title:	ALD GATE ELECTRODE

Patent #:	7579282	Issue Dt:	08/25/2009	Application #:	11331786	Filing Dt:	01/13/2006
Publication #:	US20070166973	Pub Dt:	07/19/2007
Title:	METHOD FOR REMOVING METAL FOOT DURING HIGH-K DIELECTRIC/METAL GATE ETCHING

Patent #:	7811891	Issue Dt:	10/12/2010	Application #:	11331958	Filing Dt:	01/13/2006
Publication #:	US20070166902	Pub Dt:	07/19/2007
Title:	METHOD TO CONTROL THE GATE SIDEWALL PROFILE BY GRADED MATERIAL COMPOSITION

Patent #:	7335602	Issue Dt:	02/26/2008	Application #:	11333844	Filing Dt:	01/18/2006
Publication #:	US20070163994	Pub Dt:	07/19/2007
Title:	CHARGE-FREE LAYER BY LAYER ETCHING OF DIELECTRICS

Patent #:	7445967	Issue Dt:	11/04/2008	Application #:	11336368	Filing Dt:	01/20/2006
Publication #:	US20070172990	Pub Dt:	07/26/2007
Title:	METHOD OF PACKAGING A SEMICONDUCTOR DIE AND PACKAGE THEREOF

Patent #:	7544575	Issue Dt:	06/09/2009	Application #:	11337036	Filing Dt:	01/19/2006
Publication #:	US20070166937	Pub Dt:	07/19/2007
Title:	DUAL METAL SILICIDE SCHEME USING A DUAL SPACER PROCESS

Patent #:	7414877	Issue Dt:	08/19/2008	Application #:	11337355	Filing Dt:	01/23/2006
Publication #:	US20070171700	Pub Dt:	07/26/2007
Title:	ELECTRONIC DEVICE INCLUDING A STATIC-RANDOM-ACCESS MEMORY CELL AND A PROCESS OF FORMING THE ELECTRONIC DEVICE

Patent #:	7336533	Issue Dt:	02/26/2008	Application #:	11337775	Filing Dt:	01/23/2006
Publication #:	US20070171713	Pub Dt:	07/26/2007
Title:	ELECTRONIC DEVICE AND METHOD FOR OPERATING A MEMORY CIRCUIT

Patent #:	8077533	Issue Dt:	12/13/2011	Application #:	11337783	Filing Dt:	01/23/2006
Publication #:	US20070171747	Pub Dt:	07/26/2007
Title:	MEMORY AND METHOD FOR SENSING DATA IN A MEMORY USING COMPLEMENTARY SENSING SCHEME

Patent #:	7818720	Issue Dt:	10/19/2010	Application #:	11338252	Filing Dt:	01/24/2006
Publication #:	US20070174830	Pub Dt:	07/26/2007
Title:	SYSTEM AND METHOD FOR CONTROL LOGIC CODE REORDERING BASED ON STOCHASTIC EXECUTION TIME INFORMATION

Patent #:	7312129	Issue Dt:	12/25/2007	Application #:	11339101	Filing Dt:	01/25/2006
Publication #:	US20070173024	Pub Dt:	07/26/2007
Title:	METHOD FOR PRODUCING TWO GATES CONTROLLING THE SAME CHANNEL

Patent #:	7579258	Issue Dt:	08/25/2009	Application #:	11339132	Filing Dt:	01/25/2006
Publication #:	US20070170584	Pub Dt:	07/26/2007
Title:	SEMICONDUCTOR INTERCONNECT HAVING ADJACENT RESERVOIR FOR BONDING AND METHOD FOR FORMATION

Patent #:	7323373	Issue Dt:	01/29/2008	Application #:	11339133	Filing Dt:	01/25/2006
Publication #:	US20070172996	Pub Dt:	07/26/2007
Title:	METHOD OF FORMING A SEMICONDUCTOR DEVICE WITH DECREASED UNDERCUTTING OF SEMICONDUCTOR MATERIAL

Patent #:	7510922	Issue Dt:	03/31/2009	Application #:	11339953	Filing Dt:	01/26/2006
Publication #:	US20070173002	Pub Dt:	07/26/2007
Title:	SPACER T-GATE STRUCTURE FOR COSI2 EXTENDIBILITY

Patent #:	7622339	Issue Dt:	11/24/2009	Application #:	11340049	Filing Dt:	01/26/2006
Publication #:	US20070173004	Pub Dt:	07/26/2007
Title:	EPI T-GATE STRUCTURE FOR COSI2 EXTENDIBILITY

Patent #:	7422973	Issue Dt:	09/09/2008	Application #:	11341302	Filing Dt:	01/27/2006
Publication #:	US20070178688	Pub Dt:	08/02/2007
Title:	METHOD FOR FORMING MULTI-LAYER BUMPS ON A SUBSTRATE

Patent #:	7432130	Issue Dt:	10/07/2008	Application #:	11341303	Filing Dt:	01/27/2006
Publication #:	US20070178626	Pub Dt:	08/02/2007
Title:	METHOD OF PACKAGING SEMICONDUCTOR DIE WITHOUT LEAD FRAME OR SUBSTRATE

Patent #:	7391659	Issue Dt:	06/24/2008	Application #:	11341809	Filing Dt:	01/27/2006
Publication #:	US20070177440	Pub Dt:	08/02/2007
Title:	METHOD FOR MULTIPLE STEP PROGRAMMING A MEMORY CELL

Patent #:	7317222	Issue Dt:	01/08/2008	Application #:	11341813	Filing Dt:	01/27/2006
Publication #:	US20070176226	Pub Dt:	08/02/2007
Title:	MEMORY CELL USING A DIELECTRIC HAVING NON-UNIFORM THICKNESS

Patent #:	7563681	Issue Dt:	07/21/2009	Application #:	11341973	Filing Dt:	01/27/2006
Publication #:	US20070178649	Pub Dt:	08/02/2007
Title:	DOUBLE-GATED NON-VOLATILE MEMORY AND METHODS FOR FORMING THEREOF

Patent #:	7432164	Issue Dt:	10/07/2008	Application #:	11342025	Filing Dt:	01/27/2006
Publication #:	US20070178633	Pub Dt:	08/02/2007
Title:	SEMICONDUCTOR DEVICE COMPRISING A TRANSISTOR HAVING A COUNTER-DOPED CHANNEL REGION AND METHOD FOR FORMING THE SAME

Patent #:	7687370	Issue Dt:	03/30/2010	Application #:	11342102	Filing Dt:	01/27/2006
Publication #:	US20070178661	Pub Dt:	08/02/2007
Title:	METHOD OF FORMING A SEMICONDUCTOR ISOLATION TRENCH

Patent #:	7544980	Issue Dt:	06/09/2009	Application #:	11342155	Filing Dt:	01/27/2006
Publication #:	US20070176223	Pub Dt:	08/02/2007
Title:	SPLIT GATE MEMORY CELL IN A FINFET

Patent #:	7418675	Issue Dt:	08/26/2008	Application #:	11342747	Filing Dt:	01/30/2006
Publication #:	US20070180410	Pub Dt:	08/02/2007
Title:	SYSTEM AND METHOD FOR REDUCING THE POWER CONSUMPTION OF CLOCK SYSTEMS

Patent #:	8001591	Issue Dt:	08/16/2011	Application #:	11343454	Filing Dt:	01/31/2006
Publication #:	US20070180518	Pub Dt:	08/02/2007
Title:	DISTRIBUTED RESOURCE ACCESS PROTECTION

Patent #:	7510956	Issue Dt:	03/31/2009	Application #:	11343623	Filing Dt:	01/30/2006
Publication #:	US20070176247	Pub Dt:	08/02/2007
Title:	MOS DEVICE WITH MULTI-LAYER GATE STACK

Patent #:	7700438	Issue Dt:	04/20/2010	Application #:	11343624	Filing Dt:	01/30/2006
Publication #:	US20070176227	Pub Dt:	08/02/2007
Title:	MOS DEVICE WITH NANO-CRYSTAL GATE STRUCTURE

Patent #:	NONE	Issue Dt:		Application #:	11343781	Filing Dt:	01/31/2006
Publication #:	US20070189505	Pub Dt:	08/16/2007
Title:	Detecting reflections in a communication channel

Patent #:	7439791	Issue Dt:	10/21/2008	Application #:	11344511	Filing Dt:	01/31/2006
Publication #:	US20070176669	Pub Dt:	08/02/2007
Title:	TEMPERATURE COMPENSATION DEVICE AND METHOD THEREOF

Patent #:	7368668	Issue Dt:	05/06/2008	Application #:	11347461	Filing Dt:	02/03/2006
Publication #:	US20070181339	Pub Dt:	08/09/2007
Title:	GROUND SHIELDS FOR SEMICONDUCTORS

Patent #:	7534706	Issue Dt:	05/19/2009	Application #:	11348021	Filing Dt:	02/06/2006
Publication #:	US20070184642	Pub Dt:	08/09/2007
Title:	RECESSED POLY EXTENSION T-GATE

Patent #:	7446026	Issue Dt:	11/04/2008	Application #:	11349595	Filing Dt:	02/08/2006
Publication #:	US20070184601	Pub Dt:	08/09/2007
Title:	METHOD OF FORMING A CMOS DEVICE WITH STRESSOR SOURCE/DRAIN REGIONS

Patent #:	7382039	Issue Dt:	06/03/2008	Application #:	11349608	Filing Dt:	02/08/2006
Publication #:	US20070181981	Pub Dt:	08/09/2007
Title:	EDGE SEAL FOR IMPROVING INTEGRATED CIRCUIT NOISE ISOLATION

Patent #:	7680231	Issue Dt:	03/16/2010	Application #:	11349874	Filing Dt:	02/08/2006
Publication #:	US20070183549	Pub Dt:	08/09/2007
Title:	ADAPTIVE VARIABLE LENGTH PULSE SYNCHRONIZER

Patent #:	7446001	Issue Dt:	11/04/2008	Application #:	11349875	Filing Dt:	02/08/2006
Publication #:	US20070181946	Pub Dt:	08/09/2007
Title:	METHOD FOR FORMING A SEMICONDUCTOR-ON-INSULATOR (SOI) BODY-CONTACTED DEVICE WITH A PORTION OF DRAIN REGION REMOVED

Patent #:	7126192	Issue Dt:	10/24/2006	Application #:	11350305	Filing Dt:	02/08/2006
Publication #:	US20060125004	Pub Dt:	06/15/2006
Title:	TRANSISTOR WITH REDUCED GATE-TO-SOURCE CAPACITANCE AND METHOD THEREFOR

Patent #:	7285452	Issue Dt:	10/23/2007	Application #:	11351518	Filing Dt:	02/10/2006
Publication #:	US20070190745	Pub Dt:	08/16/2007
Title:	METHOD TO SELECTIVELY FORM REGIONS HAVING DIFFERING PROPERTIES AND STRUCTURE

Patent #:	7378920	Issue Dt:	05/27/2008	Application #:	11354472	Filing Dt:	02/14/2006
Publication #:	US20070188259	Pub Dt:	08/16/2007
Title:	METHODS AND APPARATUS FOR A HIGH-FREQUENCY OUTPUT MATCH CIRCUIT

Patent #:	7444568	Issue Dt:	10/28/2008	Application #:	11355681	Filing Dt:	02/16/2006
Publication #:	US20070260950	Pub Dt:	11/08/2007
Title:	METHOD AND APPARATUS FOR TESTING A DATA PROCESSING SYSTEM

Patent #:	7254080	Issue Dt:	08/07/2007	Application #:	11355682	Filing Dt:	02/16/2006
Publication #:	US20060285414	Pub Dt:	12/21/2006
Title:	FUSE CIRCUIT AND ELECTRONIC CIRCUIT

Patent #:	7361551	Issue Dt:	04/22/2008	Application #:	11355822	Filing Dt:	02/16/2006
Publication #:	US20070190720	Pub Dt:	08/16/2007
Title:	METHOD FOR MAKING AN INTEGRATED CIRCUIT HAVING AN EMBEDDED NON-VOLATILE MEMORY

Patent #:	7345344	Issue Dt:	03/18/2008	Application #:	11356229	Filing Dt:	02/16/2006
Publication #:	US20070200173	Pub Dt:	08/30/2007
Title:	EMBEDDED SUBSTRATE INTERCONNECT FOR UNDERSIDE CONTACT TO SOURCE AND DRAIN REGIONS

Patent #:	7617437	Issue Dt:	11/10/2009	Application #:	11359329	Filing Dt:	02/21/2006
Publication #:	US20070220354	Pub Dt:	09/20/2007
Title:	ERROR CORRECTION DEVICE AND METHOD THEREOF

Patent #:	7608913	Issue Dt:	10/27/2009	Application #:	11360285	Filing Dt:	02/23/2006
Publication #:	US20070194394	Pub Dt:	08/23/2007
Title:	NOISE ISOLATION BETWEEN CIRCUIT BLOCKS IN AN INTEGRATED CIRCUIT CHIP

Patent #:	7656045	Issue Dt:	02/02/2010	Application #:	11360336	Filing Dt:	02/23/2006
Publication #:	US20070194460	Pub Dt:	08/23/2007
Title:	CAP LAYER FOR AN ALUMINUM COPPER BOND PAD

Patent #:	7768296	Issue Dt:	08/03/2010	Application #:	11360724	Filing Dt:	02/23/2006
Publication #:	US20070194804	Pub Dt:	08/23/2007
Title:	ELECTRONIC DEVICE AND METHOD

Patent #:	7563700	Issue Dt:	07/21/2009	Application #:	11360897	Filing Dt:	02/22/2006
Publication #:	US20070197009	Pub Dt:	08/23/2007
Title:	METHOD FOR IMPROVING SELF-ALIGNED SILICIDE EXTENDIBILITY WITH SPACER RECESS USING AN AGGREGATED SPACER RECESS ETCH (ASRE) INTEGRATION

Patent #:	7635920	Issue Dt:	12/22/2009	Application #:	11360925	Filing Dt:	02/23/2006
Publication #:	US20070194392	Pub Dt:	08/23/2007
Title:	METHOD AND APPARATUS FOR INDICATING DIRECTIONALITY IN INTEGRATED CIRCUIT MANUFACTURING

Patent #:	7538002	Issue Dt:	05/26/2009	Application #:	11361171	Filing Dt:	02/24/2006
Publication #:	US20070202651	Pub Dt:	08/30/2007
Title:	SEMICONDUCTOR PROCESS INTEGRATING SOURCE/DRAIN STRESSORS AND INTERLEVEL DIELECTRIC LAYER STRESSORS

Patent #:	7511319	Issue Dt:	03/31/2009	Application #:	11361624	Filing Dt:	02/24/2006
Publication #:	US20070200184	Pub Dt:	08/30/2007
Title:	METHOD AND APPARATUS FOR A STEPPED-DRIFT MOSFET

Patent #:	7667491	Issue Dt:	02/23/2010	Application #:	11361625	Filing Dt:	02/24/2006
Publication #:	US20070200598	Pub Dt:	08/30/2007
Title:	LOW VOLTAGE OUTPUT BUFFER AND METHOD FOR BUFFERING DIGITAL OUTPUT DATA

Patent #:	7924925	Issue Dt:	04/12/2011	Application #:	11361948	Filing Dt:	02/24/2006
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Title:	FLEXIBLE MACROBLOCK ORDERING WITH REDUCED DATA TRAFFIC AND POWER CONSUMPTION

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Title:	BIT LINE PRECHARGE IN EMBEDDED MEMORY

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Title:	PIEZOELECTRIC MEMS SWITCHES AND METHODS OF MAKING

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Title:	STRUCTURE AND METHOD FOR RESURF LDMOSFET WITH A CURRENT DIVERTER

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Title:	MULTI-ROW LEAD FRAME

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Title:	METHOD FOR FORMING A DEPOSITED OXIDE LAYER

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Title:	NON-VOLATILE MEMORY HAVING A MULTIPLE BLOCK ERASE MODE AND METHOD THEREFOR

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Title:	METHOD OF TESTING FOR POWER AND GROUND CONTINUITY OF A SEMICONDUCTOR DEVICE

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Title:	METHOD FOR SEPARATELY OPTIMIZING SPACER WIDTH FOR TWO TRANSISTOR GROUPS USING A RECESS SPACER ETCH (RSE) INTEGRATION

100

Patent #:	7902021	Issue Dt:	03/08/2011	Application #:	11365059	Filing Dt:	02/28/2006
Publication #:	US20070202643	Pub Dt:	08/30/2007
Title:	METHOD FOR SEPARATELY OPTIMIZING SPACER WIDTH FOR TWO OR MORE TRANSISTOR CLASSES USING A RECESS SPACER INTEGRATION

Assignor

MORGAN STANLEY SENIOR FUNDING, INC.

Exec Dt:

02/17/2019

Assignee

SHENZHEN XINGUODU TECHNOLOGY CO., LTD.

17TH FLOOR, JINSONG MANSION,TERRA INDUSTRIAL & TRADE PARK, FUTIAN

SHENZHEN, CHINA

Correspondence name and address
	LENA LAM
	JINSONG MANSION,TERRA INDUSTRIAL & TRADE PARK
	SHENZHEN, 518000 CHINA

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