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Reel/Frame:049035/0540   Pages: 10
Recorded: 04/30/2019
Attorney Dkt #:055669-0139
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1
1
Patent #:
Issue Dt:
12/15/2020
Application #:
16356980
Filing Dt:
03/18/2019
Publication #:
Pub Dt:
03/19/2020
Title:
DATA LATCH CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE
Assignors
1
Exec Dt:
04/12/2019
2
Exec Dt:
04/12/2019
3
Exec Dt:
04/19/2019
4
Exec Dt:
04/23/2019
5
Exec Dt:
04/10/2019
Assignee
1
1-1, SHIBAURA 1-CHOME
MINATO-KU, TOKYO, JAPAN
Correspondence name and address
FOLEY & LARDNER LLP
3000 K ST, N.W.
SUITE 600
WASHINGTON, DC 20007-5109

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