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Patent #:
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Issue Dt:
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09/15/2015
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Application #:
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13943229
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Filing Dt:
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07/16/2013
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Publication #:
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Pub Dt:
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01/22/2015
| | | | |
Title:
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GATE OXIDE QUALITY FOR COMPLEX MOSFET DEVICES
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Patent #:
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Issue Dt:
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03/01/2016
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13943253
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Filing Dt:
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07/16/2013
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Publication #:
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Pub Dt:
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01/22/2015
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Title:
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METHODS AND SYSTEMS FOR DETERMINING A DOSE-TO-CLEAR OF A PHOTORESIST
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06/14/2016
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13943295
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Filing Dt:
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07/16/2013
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Publication #:
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Pub Dt:
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01/22/2015
| | | | |
Title:
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HIVE OF SMART DATA CENTER TILES
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Patent #:
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Issue Dt:
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07/26/2016
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13943521
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Filing Dt:
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07/16/2013
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Publication #:
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Pub Dt:
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01/22/2015
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Title:
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ENHANCING TRANSISTOR PERFORMANCE AND RELIABILITY BY INCORPORATING DEUTERIUM INTO A STRAINED CAPPING LAYER
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Patent #:
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Issue Dt:
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01/01/2019
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13943849
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Filing Dt:
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07/17/2013
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Publication #:
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Pub Dt:
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01/22/2015
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Title:
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SEMICONDUCTOR DEVICE HAVING LOCAL BURIED OXIDE
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Issue Dt:
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07/21/2015
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13943875
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Filing Dt:
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07/17/2013
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Publication #:
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Pub Dt:
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01/22/2015
| | | | |
Title:
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MANAGING DATA SETS OF A STORAGE SYSTEM
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Patent #:
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Issue Dt:
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09/29/2015
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Application #:
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13943944
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Filing Dt:
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07/17/2013
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Publication #:
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Pub Dt:
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01/22/2015
| | | | |
Title:
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INTEGRATED CIRCUITS HAVING REPLACEMENT METAL GATES WITH IMPROVED THRESHOLD VOLTAGE PERFORMANCE AND METHODS FOR FABRICATING THE SAME
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Patent #:
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Issue Dt:
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03/22/2016
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13944048
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Filing Dt:
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07/17/2013
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Publication #:
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Pub Dt:
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01/22/2015
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Title:
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EPITAXIAL BLOCK LAYER FOR A FIN FIELD EFFECT TRANSISTOR DEVICE
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Patent #:
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01/19/2016
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13944200
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Filing Dt:
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07/17/2013
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Publication #:
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Pub Dt:
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01/22/2015
| | | | |
Title:
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METHODS OF FORMING REPLACEMENT FINS FOR A FINFET SEMICONDUCTOR DEVICE BY PERFORMING A REPLACEMENT GROWTH PROCESS
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Patent #:
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03/22/2016
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Application #:
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13944403
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Filing Dt:
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07/17/2013
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Pub Dt:
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01/22/2015
| | | | |
Title:
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FINFET WORK FUNCTION METAL FORMATION
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Patent #:
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06/03/2014
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13944480
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Filing Dt:
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07/17/2013
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Publication #:
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Pub Dt:
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11/21/2013
| | | | |
Title:
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DOUBLE GATE PLANAR FIELD EFFECT TRANSISTORS
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Patent #:
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Issue Dt:
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07/21/2015
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Application #:
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13945010
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Filing Dt:
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07/18/2013
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Publication #:
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Pub Dt:
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01/22/2015
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Title:
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SUBSCRIBER IDENTITY MODULE-BASED AUTHENTICATION OF A WIRELESS DEVICE AND APPLICATIONS STORED THEREON
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Patent #:
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Issue Dt:
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06/09/2015
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13945144
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Filing Dt:
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07/18/2013
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Publication #:
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Pub Dt:
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01/22/2015
| | | | |
Title:
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METHODS FOR ETCHING DIELECTRIC MATERIALS IN THE FABRICATION OF INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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05/10/2016
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Application #:
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13945268
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Filing Dt:
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07/18/2013
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Publication #:
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Pub Dt:
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01/22/2015
| | | | |
Title:
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OPTIMAL POSITIONING OF REFLECTING OPTICAL DEVICES
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Patent #:
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Issue Dt:
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05/30/2017
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13945281
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Filing Dt:
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07/18/2013
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Publication #:
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Pub Dt:
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01/22/2015
| | | | |
Title:
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III-V SEMICONDUCTOR DEVICE HAVING SELF-ALIGNED CONTACTS
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Patent #:
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Issue Dt:
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09/08/2015
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Application #:
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13945295
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Filing Dt:
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07/18/2013
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Publication #:
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Pub Dt:
|
12/25/2014
| | | | |
Title:
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MANUFACTURABLE SUB-3 NANOMETER PALLADIUM GAP DEVICES FOR FIXED ELECTRODE TUNNELING RECOGNITION
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Patent #:
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Issue Dt:
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12/01/2015
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Application #:
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13945348
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Filing Dt:
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07/18/2013
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Pub Dt:
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01/22/2015
| | | | |
Title:
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AUTOMATED NETWORK FAULT LOCATION
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Patent #:
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Issue Dt:
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05/24/2016
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Application #:
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13945415
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Filing Dt:
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07/18/2013
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Publication #:
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Pub Dt:
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01/22/2015
| | | | |
Title:
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FIN TRANSFORMATION PROCESS AND ISOLATION STRUCTURES FACILITATING DIFFERENT FIN ISOLATION SCHEMES
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Patent #:
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Issue Dt:
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07/28/2015
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13945445
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Filing Dt:
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07/18/2013
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Publication #:
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Pub Dt:
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01/22/2015
| | | | |
Title:
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PROCESS FOR FACILTIATING FIN ISOLATION SCHEMES
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Patent #:
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Issue Dt:
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07/25/2017
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13945455
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Filing Dt:
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07/18/2013
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Publication #:
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Pub Dt:
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01/22/2015
| | | | |
Title:
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ELECTRICAL ISOLATION OF FINFET ACTIVE REGION BY SELECTIVE OXIDATION OF SACRIFICIAL LAYER
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Patent #:
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Issue Dt:
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11/03/2015
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13945494
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Filing Dt:
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07/18/2013
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Publication #:
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Pub Dt:
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01/22/2015
| | | | |
Title:
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MEMORY USE FOR GARBAGE COLLECTED COMPUTER ENVIRONMENTS
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Issue Dt:
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12/29/2015
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13945627
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Filing Dt:
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07/18/2013
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Pub Dt:
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01/22/2015
| | | | |
Title:
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FINFET WITH INSULATOR UNDER CHANNEL
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Patent #:
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Issue Dt:
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10/27/2015
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Application #:
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13946034
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Filing Dt:
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07/19/2013
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Publication #:
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Pub Dt:
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01/22/2015
| | | | |
Title:
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MANAGEMENT OF A MULTICAST SYSTEM IN A SOFTWARE-DEFINED NETWORK
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Patent #:
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Issue Dt:
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12/08/2015
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Application #:
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13946103
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Filing Dt:
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07/19/2013
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Publication #:
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Pub Dt:
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01/22/2015
| | | | |
Title:
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HIGHLY CONFORMAL EXTENSION DOPING IN ADVANCED MULTI-GATE DEVICES
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Patent #:
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Issue Dt:
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02/24/2015
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Application #:
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13946259
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Filing Dt:
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07/19/2013
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Publication #:
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Pub Dt:
|
11/14/2013
| | | | |
Title:
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DESIGN STRUCTURE, STRUCTURE AND METHOD OF LATCH-UP IMMUNITY FOR HIGH AND LOW VOLTAGE INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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01/19/2016
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13946293
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07/19/2013
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Pub Dt:
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11/14/2013
| | | | |
Title:
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OPTIMIZATION PROCESS AND SYSTEM FOR A HETEROGENEOUS AD HOC NETWORK
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12/16/2014
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13946362
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07/19/2013
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Publication #:
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Pub Dt:
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11/14/2013
| | | | |
Title:
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SEMICONDUCTOR DEVICE INCLUDING ASYMMETRIC LIGHTLY DOPED DRAIN (LDD) REGION, RELATED METHOD AND DESIGN STRUCTURE
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Issue Dt:
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01/05/2016
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13946379
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07/19/2013
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Publication #:
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Pub Dt:
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01/22/2015
| | | | |
Title:
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BIPOLAR JUNCTION TRANSISTORS WITH AN AIR GAP IN THE SHALLOW TRENCH ISOLATION
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Issue Dt:
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03/01/2016
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13946456
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07/19/2013
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Pub Dt:
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01/22/2015
| | | | |
Title:
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UNIFORM ROUGHNESS ON BACKSIDE OF A WAFER
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Issue Dt:
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12/01/2015
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Application #:
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13946485
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Filing Dt:
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07/19/2013
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Pub Dt:
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01/22/2015
| | | | |
Title:
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FORMING A GATE BY DEPOSITING A THIN BARRIER LAYER ON A TITANIUM NITRIDE CAP
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Issue Dt:
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06/16/2015
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13946527
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Filing Dt:
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07/19/2013
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Publication #:
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Pub Dt:
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12/11/2014
| | | | |
Title:
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THIN-FILM HYBRID COMPLEMENTARY CIRCUITS
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Issue Dt:
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07/21/2015
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13946719
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Filing Dt:
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07/19/2013
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Pub Dt:
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12/25/2014
| | | | |
Title:
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HIGH THROUGHPUT DECODING OF VARIABLE LENGTH DATA SYMBOLS
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NONE
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13947155
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Filing Dt:
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07/22/2013
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Pub Dt:
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01/22/2015
| | | | |
Title:
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STATISTICAL POWER ESTIMATION
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Issue Dt:
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05/10/2016
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13947161
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07/22/2013
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Pub Dt:
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01/22/2015
| | | | |
Title:
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INTEGRATED CIRCUITS HAVING A METAL GATE STRUCTURE AND METHODS FOR FABRICATING THE SAME
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04/01/2014
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13947224
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Filing Dt:
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07/22/2013
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Publication #:
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Pub Dt:
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11/14/2013
| | | | |
Title:
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EDGE SELECTION TECHNIQUES FOR CORRECTING CLOCK DUTY CYCLE
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Patent #:
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Issue Dt:
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11/24/2015
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Application #:
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13947250
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Filing Dt:
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07/22/2013
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Publication #:
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Pub Dt:
|
01/22/2015
| | | | |
Title:
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Dynamic Data Dimensioning by Partial Reconfiguration of Single or Multiple Field-Programmable Gate Arrays Using Bootstraps
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Patent #:
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Issue Dt:
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09/15/2015
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13947439
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Filing Dt:
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07/22/2013
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Publication #:
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Pub Dt:
|
01/22/2015
| | | | |
Title:
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SHALLOW TRENCH ISOLATION
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Patent #:
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Issue Dt:
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01/14/2014
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Application #:
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13947664
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Filing Dt:
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07/22/2013
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Publication #:
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Pub Dt:
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11/21/2013
| | | | |
Title:
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PLL BANDWIDTH CORRECTION WITH OFFSET COMPENSATION
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Patent #:
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Issue Dt:
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10/06/2015
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13947670
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Filing Dt:
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07/22/2013
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Publication #:
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Pub Dt:
|
01/22/2015
| | | | |
Title:
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METHODS OF FORMING SEMICONDUCTOR DEVICE WITH SELF-ALIGNED CONTACT ELEMENTS AND THE RESULTING DEVICES
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Patent #:
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Issue Dt:
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04/21/2015
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Application #:
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13947677
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Filing Dt:
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07/22/2013
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Publication #:
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Pub Dt:
|
11/21/2013
| | | | |
Title:
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STRESS-GENERATING SHALLOW TRENCH ISOLATION STRUCTURE HAVING DUAL COMPOSITION
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Issue Dt:
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11/29/2016
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13947734
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Filing Dt:
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07/22/2013
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Pub Dt:
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01/22/2015
| | | | |
Title:
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INSTRUCTION SET ARCHITECTURE WITH EXTENSIBLE REGISTER ADDRESSING
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Issue Dt:
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03/01/2016
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13947875
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07/22/2013
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Publication #:
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Pub Dt:
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01/22/2015
| | | | |
Title:
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GENERAL PURPOSE PROCESSING UNIT WITH LOW POWER DIGITAL SIGNAL PROCESSING (DSP) MODE
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Issue Dt:
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04/08/2014
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13947906
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07/22/2013
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Pub Dt:
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11/21/2013
| | | | |
Title:
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PARALLEL OPTICAL TRANSCEIVER MODULE
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Issue Dt:
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09/08/2015
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13948146
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Filing Dt:
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07/22/2013
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Publication #:
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Pub Dt:
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01/22/2015
| | | | |
Title:
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OPERATING SYSTEM VIRTUALIZATION FOR HOST CHANNEL ADAPTERS
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Issue Dt:
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07/08/2014
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Application #:
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13948166
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Filing Dt:
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07/22/2013
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Publication #:
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Pub Dt:
|
11/14/2013
| | | | |
Title:
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THERMALLY INSULATED PHASE CHANGE MATERIAL CELLS
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Patent #:
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Issue Dt:
|
10/07/2014
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Application #:
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13948249
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Filing Dt:
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07/23/2013
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Title:
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CAPACITOR DESIGNS FOR INTEGRATED CIRCUITS UTILIZING SELF-ALIGNED DOUBLE PATTERNING (SADP)
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Patent #:
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Issue Dt:
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07/21/2015
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13948308
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Filing Dt:
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07/23/2013
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Publication #:
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Pub Dt:
|
01/29/2015
| | | | |
Title:
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DEVICE FOR ATTENUATING PROPAGATION AND RECEPTION OF ELECTROMAGNETIC INTERFERENCE FOR A PCB-CHASSIS STRUCTURE
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Patent #:
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Issue Dt:
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03/22/2016
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Application #:
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13948374
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Filing Dt:
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07/23/2013
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Publication #:
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Pub Dt:
|
01/29/2015
| | | | |
Title:
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FORMING EMBEDDED SOURCE AND DRAIN REGIONS TO PREVENT BOTTOM LEAKAGE IN A DIELECTRICALLY ISOLATED FIN FIELD EFFECT TRANSISTOR (FINFET) DEVICE
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Patent #:
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Issue Dt:
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06/13/2017
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Application #:
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13948487
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Filing Dt:
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07/23/2013
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Publication #:
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Pub Dt:
|
01/29/2015
| | | | |
Title:
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REGULAR EXPRESSION MEMORY REGION WITH INTEGRATED REGULAR EXPRESSION ENGINE
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Patent #:
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Issue Dt:
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10/27/2015
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Application #:
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13948567
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Filing Dt:
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07/23/2013
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Publication #:
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Pub Dt:
|
11/21/2013
| | | | |
Title:
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MAJORITY DOMINANT POWER SCHEME FOR REPEATED STRUCTURES AND STRUCTURES THEREOF
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Patent #:
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Issue Dt:
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07/25/2017
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Application #:
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13948645
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Filing Dt:
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07/23/2013
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Publication #:
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Pub Dt:
|
01/29/2015
| | | | |
Title:
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LOW REFLECTION ELECTRODE FOR PHOTOVOLTAIC DEVICES
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Patent #:
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Issue Dt:
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12/01/2015
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Application #:
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13948723
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Filing Dt:
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07/23/2013
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Publication #:
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Pub Dt:
|
01/29/2015
| | | | |
Title:
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RESISTIVE RANDOM ACCESS MEMORY DEVICES WITH EXTREMELY REACTIVE CONTACTS
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Patent #:
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Issue Dt:
|
12/20/2016
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Application #:
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13948800
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Filing Dt:
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07/23/2013
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Publication #:
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Pub Dt:
|
01/29/2015
| | | | |
Title:
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TRACKING LONG GHV IN HIGH PERFORMANCE OUT-OF-ORDER SUPERSCALAR PROCESSORS
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Patent #:
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Issue Dt:
|
06/16/2015
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Application #:
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13948811
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Filing Dt:
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07/23/2013
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Publication #:
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Pub Dt:
|
01/29/2015
| | | | |
Title:
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IN-SITU COMPUTING SYSTEM FAILURE AVOIDANCE
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Patent #:
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Issue Dt:
|
02/24/2015
|
Application #:
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13948912
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Filing Dt:
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07/23/2013
|
Publication #:
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|
Pub Dt:
|
01/29/2015
| | | | |
Title:
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CONTROLLING CIRCUIT VOLTAGE AND FREQUENCY BASED UPON LOCATION-DEPENDENT TEMPERATURE
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Patent #:
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Issue Dt:
|
09/30/2014
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Application #:
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13949219
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Filing Dt:
|
07/23/2013
|
Publication #:
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Pub Dt:
|
01/09/2014
| | | | |
Title:
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COMPLEMENTARY BIPOLAR INVERTER
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|
Patent #:
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Issue Dt:
|
06/16/2015
|
Application #:
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13949498
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Filing Dt:
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07/24/2013
|
Publication #:
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|
Pub Dt:
|
01/29/2015
| | | | |
Title:
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ACTIVE MATRIX USING HYBRID INTEGRATED CIRCUIT AND BIPOLAR TRANSISTOR
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Patent #:
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Issue Dt:
|
08/11/2015
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Application #:
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13949609
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Filing Dt:
|
07/24/2013
|
Publication #:
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|
Pub Dt:
|
01/29/2015
| | | | |
Title:
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ZRAM HETEROCHANNEL MEMORY
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Patent #:
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Issue Dt:
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06/28/2016
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Application #:
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13949824
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Filing Dt:
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07/24/2013
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Publication #:
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Pub Dt:
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01/29/2015
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Title:
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HETEROJUNCTION NANOPORE FOR SEQUENCING
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Patent #:
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Issue Dt:
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08/02/2016
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Application #:
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13949973
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Filing Dt:
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07/24/2013
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Publication #:
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Pub Dt:
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01/29/2015
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Title:
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III-V LASERS WITH INTEGRATED SILICON PHOTONIC CIRCUITS
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Patent #:
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Issue Dt:
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11/28/2017
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Application #:
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13950027
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Filing Dt:
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07/24/2013
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Publication #:
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Pub Dt:
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01/29/2015
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Title:
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HIGH EFFICIENCY ON-CHIP 3D TRANSFORMER STRUCTURE
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Patent #:
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Issue Dt:
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05/10/2016
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Application #:
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13950538
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Filing Dt:
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07/25/2013
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Publication #:
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Pub Dt:
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01/29/2015
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Title:
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THREE-DIMENSIONAL PROCESSING SYSTEM HAVING MULTIPLE CACHES THAT CAN BE PARTITIONED, CONJOINED, AND MANAGED ACCORDING TO MORE THAN ONE SET OF RULES AND/OR CONFIGURATIONS
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Patent #:
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Issue Dt:
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05/26/2015
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Application #:
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13950758
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Filing Dt:
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07/25/2013
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Publication #:
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Pub Dt:
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01/29/2015
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Title:
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III-V FET DEVICE WITH OVERLAPPED EXTENSION REGIONS USING GATE LAST
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Patent #:
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Issue Dt:
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06/16/2015
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Application #:
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13950777
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Filing Dt:
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07/25/2013
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Publication #:
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Pub Dt:
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11/21/2013
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Title:
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SELF-ALIGNED III-V MOSFET FABRICATION WITH IN-SITU III-V EPITAXY AND IN-SITU METAL EPITAXY AND CONTACT FORMATION
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Patent #:
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Issue Dt:
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05/26/2015
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Application #:
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13950788
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Filing Dt:
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07/25/2013
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Publication #:
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Pub Dt:
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01/29/2015
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Title:
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III-V DEVICE WITH OVERLAPPED EXTENSION REGIONS USING REPLACEMENT GATE
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Patent #:
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Issue Dt:
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09/27/2016
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Application #:
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13950818
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Filing Dt:
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07/25/2013
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Publication #:
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Pub Dt:
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01/29/2015
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Title:
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MANAGING DEVICES WITHIN MICRO-GRIDS
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Patent #:
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Issue Dt:
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06/16/2015
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Application #:
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13950841
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Filing Dt:
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07/25/2013
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Publication #:
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Pub Dt:
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11/21/2013
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Title:
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Self-Aligned III-V MOSFET Fabrication With In-Situ III-V Epitaxy And In-Situ Metal Epitaxy And Contact Formation
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Patent #:
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Issue Dt:
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10/27/2015
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Application #:
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13950947
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Filing Dt:
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07/25/2013
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Publication #:
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Pub Dt:
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01/29/2015
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Title:
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HIGH EFFICIENCY ON-CHIP 3D TRANSFORMER STRUCTURE
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Patent #:
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Issue Dt:
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03/08/2016
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Application #:
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13951207
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Filing Dt:
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07/25/2013
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Publication #:
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Pub Dt:
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01/29/2015
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Title:
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SEMICONDUCTOR MEMORY GARBAGE COLLECTION
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Patent #:
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Issue Dt:
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01/03/2017
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Application #:
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13951528
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Filing Dt:
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07/26/2013
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Publication #:
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Pub Dt:
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01/29/2015
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Title:
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MONITORING HIERARCHICAL CONTAINER-BASED SOFTWARE SYSTEMS
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Patent #:
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Issue Dt:
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10/13/2015
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Application #:
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13951654
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Filing Dt:
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07/26/2013
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Publication #:
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Pub Dt:
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01/29/2015
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Title:
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METHODS OF FORMING AN E-FUSE FOR AN INTEGRATED CIRCUIT PRODUCT AND THE RESULTING E-FUSE STRUCTURE
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Patent #:
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Issue Dt:
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12/02/2014
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Application #:
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13951693
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Filing Dt:
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07/26/2013
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Publication #:
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Pub Dt:
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01/30/2014
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Title:
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ASSISTING IN LOGIC CIRCUIT DESIGN TO PLACE CELLS ON AN IC SUBSTRATE AND OPTIMIZE WIRING
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Patent #:
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Issue Dt:
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06/02/2015
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Application #:
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13951801
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Filing Dt:
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07/26/2013
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Publication #:
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Pub Dt:
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01/29/2015
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Title:
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SINGLE-ENDED LOW-SWING POWER-SAVINGS MECHANISM WITH PROCESS COMPENSATION
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Patent #:
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Issue Dt:
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02/07/2017
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Application #:
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13952279
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Filing Dt:
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07/26/2013
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Publication #:
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Pub Dt:
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01/29/2015
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Title:
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SELF-ADJUSTING PHASE CHANGE MEMORY STORAGE MODULE
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Patent #:
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Issue Dt:
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02/18/2014
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Application #:
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13952792
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Filing Dt:
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07/29/2013
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Publication #:
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Pub Dt:
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11/21/2013
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Title:
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SEMICONDUCTOR DEVICE COMPRISING METAL-BASED eFUSES OF ENHANCED PROGRAMMING EFFICIENCY BY ENHANCING METAL AGGLOMERATION AND/OR VOIDING
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Patent #:
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Issue Dt:
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06/07/2016
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Application #:
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13953045
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Filing Dt:
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07/29/2013
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Publication #:
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Pub Dt:
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01/29/2015
| | | | |
Title:
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IMPLEMENTING REDUCED DRILL SMEAR
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Patent #:
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Issue Dt:
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12/09/2014
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Application #:
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13953058
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Filing Dt:
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07/29/2013
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Title:
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RANDOM LOCAL METAL CAP LAYER FORMATION FOR IMPROVED INTEGRATED CIRCUIT RELIABILITY
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Patent #:
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Issue Dt:
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04/15/2014
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Application #:
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13953349
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Filing Dt:
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07/29/2013
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Publication #:
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Pub Dt:
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11/28/2013
| | | | |
Title:
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SEMICONDUCTOR DEVICE WITH STRAIN-INDUCING REGIONS AND METHOD THEREOF
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Patent #:
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Issue Dt:
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11/03/2015
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Application #:
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13953532
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Filing Dt:
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07/29/2013
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Publication #:
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Pub Dt:
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01/29/2015
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Title:
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SYSTEMS AND METHODS FOR FABRICATING SEMICONDUCTOR DEVICE STRUCTURES
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Patent #:
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Issue Dt:
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04/05/2016
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Application #:
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13953833
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Filing Dt:
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07/30/2013
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Publication #:
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Pub Dt:
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02/05/2015
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Title:
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NITRIDE SPACER FOR PROTECTING A FIN-SHAPED FIELD EFFECT TRANSISTOR (FINFET) DEVICE
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Patent #:
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Issue Dt:
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06/23/2015
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Application #:
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13953875
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Filing Dt:
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07/30/2013
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Publication #:
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Pub Dt:
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02/05/2015
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Title:
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METHODS AND SYSTEMS FOR DESIGNING AND MANUFACTURING OPTICAL LITHOGRAPHY MASKS
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Patent #:
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Issue Dt:
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07/28/2015
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Application #:
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13954289
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Filing Dt:
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07/30/2013
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Publication #:
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Pub Dt:
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02/05/2015
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Title:
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INTEGRATED CIRCUITS HAVING FINFETS WITH IMPROVED DOPED CHANNEL REGIONS AND METHODS FOR FABRICATING SAME
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Patent #:
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Issue Dt:
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10/18/2016
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Application #:
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13954444
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Filing Dt:
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07/30/2013
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Publication #:
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Pub Dt:
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02/05/2015
| | | | |
Title:
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METHODS OF FORMING ARTICLES INCLUDING METAL STRUCTURES HAVING MAXIMIZED BOND ADHESION AND BOND RELIABILITY
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Patent #:
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Issue Dt:
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06/16/2015
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Application #:
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13954453
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Filing Dt:
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07/30/2013
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Publication #:
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Pub Dt:
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12/25/2014
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Title:
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SEMICONDUCTOR DEVICE INCLUDING SOURCE/DRAIN FORMED ON BULK AND GATE CHANNEL FORMED ON OXIDE LAYER
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Patent #:
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Issue Dt:
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02/24/2015
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Application #:
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13954530
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Filing Dt:
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07/30/2013
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Publication #:
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Pub Dt:
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02/05/2015
| | | | |
Title:
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REDUCED SPACER THICKNESS IN SEMICONDUCTOR DEVICE FABRICATION
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Patent #:
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Issue Dt:
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09/06/2016
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Application #:
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13954645
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Filing Dt:
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07/30/2013
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Publication #:
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Pub Dt:
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02/05/2015
| | | | |
Title:
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DISCRIMINATING SYNONYMOUS EXPRESSIONS USING IMAGES
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Patent #:
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Issue Dt:
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01/05/2016
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Application #:
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13954929
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Filing Dt:
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07/30/2013
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Publication #:
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Pub Dt:
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11/28/2013
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Title:
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Method and Apparatus for Optimal Cache Sizing and Configuration for Large Memory Systems
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Patent #:
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Issue Dt:
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07/07/2015
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Application #:
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13955244
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Filing Dt:
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07/31/2013
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Publication #:
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Pub Dt:
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02/05/2015
| | | | |
Title:
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Method of Improving Timing Critical Cells For Physical Design In The Presence Of Local Placement Congestion
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Patent #:
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Issue Dt:
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04/19/2016
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Application #:
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13955300
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Filing Dt:
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07/31/2013
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Publication #:
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Pub Dt:
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02/05/2015
| | | | |
Title:
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METHODS FOR MODIFYING AN INTEGRATED CIRCUIT LAYOUT DESIGN
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Patent #:
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Issue Dt:
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03/31/2015
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Application #:
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13955342
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Filing Dt:
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07/31/2013
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Publication #:
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Pub Dt:
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02/05/2015
| | | | |
Title:
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METHODS FOR MODIFYING AN INTEGRATED CIRCUIT LAYOUT DESIGN
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Patent #:
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Issue Dt:
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02/17/2015
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Application #:
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13955382
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Filing Dt:
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07/31/2013
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Publication #:
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Pub Dt:
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02/05/2015
| | | | |
Title:
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HETEROJUNCTION BIPOLAR TRANSISTORS WITH REDUCED PARASITIC CAPACITANCE
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Patent #:
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Issue Dt:
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03/15/2016
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Application #:
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13955401
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Filing Dt:
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07/31/2013
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Publication #:
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Pub Dt:
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02/05/2015
| | | | |
Title:
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APPARATUS FOR CAPTURING RESULTS OF MEMORY TESTING
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Patent #:
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Issue Dt:
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03/08/2016
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Application #:
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13955513
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Filing Dt:
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07/31/2013
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Publication #:
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Pub Dt:
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02/05/2015
| | | | |
Title:
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TURBO ENCODING ON A PARALLEL PROCESSOR
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Patent #:
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Issue Dt:
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04/14/2015
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Application #:
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13955531
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Filing Dt:
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07/31/2013
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Publication #:
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Pub Dt:
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02/05/2015
| | | | |
Title:
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METHOD FOR REDUCING LATERAL EXTRUSION FORMED IN SEMICONDUCTOR STRUCTURES AND SEMICONDUCTOR STRUCTURES FORMED THEREOF
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Patent #:
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Issue Dt:
|
09/06/2016
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Application #:
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13955740
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Filing Dt:
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07/31/2013
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Publication #:
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Pub Dt:
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02/05/2015
| | | | |
Title:
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RADIATION DETECTOR BASED ON CHARGED SELF-ASSEMBLED MONOLAYERS ON NANOWIRE DEVICES
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Patent #:
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Issue Dt:
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09/22/2015
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Application #:
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13955861
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Filing Dt:
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07/31/2013
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Publication #:
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Pub Dt:
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02/05/2015
| | | | |
Title:
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DEVICES AND METHODS OF FORMING BULK FINFETS WITH LATERAL SEG FOR SOURCE AND DRAIN ON DIELECTRICS
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Patent #:
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Issue Dt:
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06/23/2015
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Application #:
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13956273
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Filing Dt:
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07/31/2013
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Publication #:
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Pub Dt:
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02/06/2014
| | | | |
Title:
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METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
|
11/03/2015
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Application #:
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13956339
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Filing Dt:
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07/31/2013
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Publication #:
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Pub Dt:
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02/05/2015
| | | | |
Title:
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FIELD EFFECT TRANSISTOR (FET) WITH SELF-ALIGNED CONTACTS, INTEGRATED CIRCUIT (IC) CHIP AND METHOD OF MANUFACTURE
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Patent #:
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Issue Dt:
|
05/19/2015
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Application #:
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13956475
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Filing Dt:
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08/01/2013
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Publication #:
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Pub Dt:
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02/05/2015
| | | | |
Title:
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EPITAXIALLY FORMING A SET OF FINS IN A SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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08/11/2015
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Application #:
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13956762
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Filing Dt:
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08/01/2013
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Publication #:
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Pub Dt:
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11/06/2014
| | | | |
Title:
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ANALYTIC SOLUTION INTEGRATION
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|