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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:049490/0001   Pages: 892
Recorded: 11/29/2018
Conveyance: SECURITY AGREEMENT
1
Patent #:
Issue Dt:
06/23/2015
Application #:
14073919
Filing Dt:
11/07/2013
Publication #:
Pub Dt:
03/06/2014
Title:
INTEGRATED CIRCUIT INCLUDING VERTICAL DIODE
2
Patent #:
Issue Dt:
04/14/2015
Application #:
14074905
Filing Dt:
11/08/2013
Publication #:
Pub Dt:
05/15/2014
Title:
TRANSISTOR WITH EMBEDDED SI/GE MATERIAL HAVING REDUCED OFFSET AND SUPERIOR UNIFORMITY
3
Patent #:
Issue Dt:
10/21/2014
Application #:
14074920
Filing Dt:
11/08/2013
Publication #:
Pub Dt:
05/15/2014
Title:
COUPLING SYSTEM FOR DATA RECEIVERS
4
Patent #:
Issue Dt:
07/21/2015
Application #:
14074926
Filing Dt:
11/08/2013
Publication #:
Pub Dt:
05/14/2015
Title:
LEAKAGE REDUCTION IN OUTPUT DRIVER CIRCUITS
5
Patent #:
Issue Dt:
08/18/2015
Application #:
14075033
Filing Dt:
11/08/2013
Publication #:
Pub Dt:
05/14/2015
Title:
REDUCED RESISTANCE FINFET DEVICE WITH LATE SPACER SELF ALIGNED CONTACT
6
Patent #:
Issue Dt:
09/13/2016
Application #:
14075037
Filing Dt:
11/08/2013
Publication #:
Pub Dt:
05/14/2015
Title:
REPLICATING DATA ACROSS CONTROLLERS
7
Patent #:
Issue Dt:
05/26/2015
Application #:
14076233
Filing Dt:
11/10/2013
Publication #:
Pub Dt:
05/08/2014
Title:
ENHANCED CAPTURE PADS FOR THROUGH SEMICONDUCTOR VIAS
8
Patent #:
Issue Dt:
10/07/2014
Application #:
14076267
Filing Dt:
11/11/2013
Publication #:
Pub Dt:
03/06/2014
Title:
SELF-ALIGNED PROCESS TO FABRICATE A MEMORY CELL ARRAY WITH A SURROUNDING-GATE ACCESS TRANSISTOR
9
Patent #:
Issue Dt:
07/19/2016
Application #:
14076269
Filing Dt:
11/11/2013
Publication #:
Pub Dt:
05/14/2015
Title:
HYPERLINK DATA PRESENTATION
10
Patent #:
Issue Dt:
05/17/2016
Application #:
14076278
Filing Dt:
11/11/2013
Publication #:
Pub Dt:
05/14/2015
Title:
PERSISTENT MESSAGING MECHANISM
11
Patent #:
Issue Dt:
08/11/2015
Application #:
14076333
Filing Dt:
11/11/2013
Publication #:
Pub Dt:
05/14/2015
Title:
VIA-FUSE WITH LOW DIELECTRIC CONSTANT
12
Patent #:
Issue Dt:
05/19/2015
Application #:
14076386
Filing Dt:
11/11/2013
Publication #:
Pub Dt:
05/14/2015
Title:
FACILITATING MASK PATTERN FORMATION
13
Patent #:
Issue Dt:
09/13/2016
Application #:
14076387
Filing Dt:
11/11/2013
Publication #:
Pub Dt:
03/06/2014
Title:
EMBEDDED PLANAR SOURCE/DRAIN STRESSORS FOR A FINFET INCLUDING A PLURALITY OF FINS
14
Patent #:
Issue Dt:
09/01/2015
Application #:
14076562
Filing Dt:
11/11/2013
Publication #:
Pub Dt:
05/14/2015
Title:
TUCK STRATEGY IN TRANSISTOR MANUFACTURING FLOW
15
Patent #:
Issue Dt:
06/09/2015
Application #:
14076656
Filing Dt:
11/11/2013
Publication #:
Pub Dt:
03/06/2014
Title:
HIGH PERFORMANCE ON-CHIP VERTICAL COAXIAL CABLE, METHOD OF MANUFACTURE AND DESIGN STRUCTURE
16
Patent #:
Issue Dt:
12/13/2016
Application #:
14077148
Filing Dt:
11/11/2013
Publication #:
Pub Dt:
05/14/2015
Title:
Load Balancing Logical Units in an Active/Passive Storage System
17
Patent #:
Issue Dt:
06/16/2015
Application #:
14077351
Filing Dt:
11/12/2013
Publication #:
Pub Dt:
03/06/2014
Title:
DRAM WITH DUAL LEVEL WORD LINES
18
Patent #:
Issue Dt:
08/30/2016
Application #:
14077492
Filing Dt:
11/12/2013
Publication #:
Pub Dt:
04/23/2015
Title:
MAINTAINING A FABRIC NAME ACROSS A DISTRIBUTED SWITCH
19
Patent #:
Issue Dt:
07/21/2015
Application #:
14077559
Filing Dt:
11/12/2013
Publication #:
Pub Dt:
05/14/2015
Title:
IMPLEMENTING SENSE AMPLIFIER FOR SENSING LOCAL WRITE DRIVER WITH BOOTSTRAP WRITE ASSIST FOR SRAM ARRAYS
20
Patent #:
Issue Dt:
06/23/2015
Application #:
14077618
Filing Dt:
11/12/2013
Publication #:
Pub Dt:
05/14/2015
Title:
IN-SITU ANNEALING FOR EXTENDING THE LIFETIME OF CMOS PRODUCTS
21
Patent #:
Issue Dt:
06/16/2015
Application #:
14077723
Filing Dt:
11/12/2013
Publication #:
Pub Dt:
05/14/2015
Title:
IN-SITU RELAXATION FOR IMPROVED CMOS PRODUCT LIFETIME
22
Patent #:
Issue Dt:
05/27/2014
Application #:
14077805
Filing Dt:
11/12/2013
Publication #:
Pub Dt:
03/13/2014
Title:
CONDUCTIVE METAL AND DIFFUSION BARRIER SEED COMPOSITIONS, AND METHODS OF USE IN SEMICONDUCTOR AND INTERLEVEL DIELECTRIC SUBSTRATES
23
Patent #:
Issue Dt:
07/25/2017
Application #:
14077848
Filing Dt:
11/12/2013
Publication #:
Pub Dt:
05/14/2015
Title:
HANDLE WAFER
24
Patent #:
Issue Dt:
03/29/2016
Application #:
14077917
Filing Dt:
11/12/2013
Publication #:
Pub Dt:
05/14/2015
Title:
NONVOLATILE STORAGE THRESHOLDING FOR ULTRA-SSD, SSD, AND HDD DRIVE INTERMIX
25
Patent #:
Issue Dt:
02/10/2015
Application #:
14077918
Filing Dt:
11/12/2013
Publication #:
Pub Dt:
03/06/2014
Title:
GERMANIUM OXIDE FREE ATOMIC LAYER DEPOSITION OF SILICON OXIDE AND HIGH-K GATE DIELECTRIC ON GERMANIUM CONTAINING CHANNEL FOR CMOS DEVICES
26
Patent #:
Issue Dt:
08/09/2016
Application #:
14078060
Filing Dt:
11/12/2013
Publication #:
Pub Dt:
05/14/2015
Title:
MOBILE IMAGE ACQUISITION
27
Patent #:
Issue Dt:
06/09/2015
Application #:
14078077
Filing Dt:
11/12/2013
Publication #:
Pub Dt:
05/14/2015
Title:
THICK AND THIN DATA VOLUME MANAGEMENT
28
Patent #:
Issue Dt:
08/23/2016
Application #:
14078777
Filing Dt:
11/13/2013
Publication #:
Pub Dt:
05/14/2015
Title:
SOLDER VOID REDUCTION FOR COMPONENT ATTACHMENT TO PRINTED CIRCUIT BOARDS
29
Patent #:
Issue Dt:
06/16/2015
Application #:
14078979
Filing Dt:
11/13/2013
Publication #:
Pub Dt:
05/14/2015
Title:
METHODS OF FORMING REPLACEMENT GATE STRUCTURES AND FINS ON FINFET DEVICES AND THE RESULTING DEVICES
30
Patent #:
Issue Dt:
10/27/2015
Application #:
14078990
Filing Dt:
11/13/2013
Publication #:
Pub Dt:
05/14/2015
Title:
HANDLER WAFER REMOVAL FACILITATED BY THE ADDITION OF AN AMORPHOUS CARBON LAYER ON THE HANDLER WAFER
31
Patent #:
Issue Dt:
08/11/2015
Application #:
14079043
Filing Dt:
11/13/2013
Publication #:
Pub Dt:
05/14/2015
Title:
METHODS AND STRUCTURES FOR ELIMINATING OR REDUCING LINE END EPI MATERIAL GROWTH ON GATE STRUCTURES
32
Patent #:
Issue Dt:
05/12/2015
Application #:
14079048
Filing Dt:
11/13/2013
Publication #:
Pub Dt:
03/06/2014
Title:
ELECTROSTATIC DISCHARGE (ESD) SILICON CONTROLLED RECTIFIER (SCR) STRUCTURE
33
Patent #:
Issue Dt:
09/16/2014
Application #:
14079089
Filing Dt:
11/13/2013
Publication #:
Pub Dt:
03/06/2014
Title:
ELECTRICAL ISOLATION STRUCTURES FOR ULTRA-THIN SEMICONDUCTOR-ON-INSULATOR DEVICES
34
Patent #:
Issue Dt:
10/28/2014
Application #:
14079132
Filing Dt:
11/13/2013
Publication #:
Pub Dt:
03/06/2014
Title:
DISCRETE SAMPLING BASED NONLINEAR CONTROL SYSTEM
35
Patent #:
Issue Dt:
12/29/2015
Application #:
14079136
Filing Dt:
11/13/2013
Publication #:
Pub Dt:
05/14/2015
Title:
GRID CONNECTED KEYBOARD APPARATUS
36
Patent #:
Issue Dt:
07/28/2015
Application #:
14079159
Filing Dt:
11/13/2013
Publication #:
Pub Dt:
05/14/2015
Title:
METHODS OF FORMING SUBSTANTIALLY SELF-ALIGNED ISOLATION REGIONS ON FINFET SEMICONDUCTOR DEVICES AND THE RESULTING DEVICES
37
Patent #:
NONE
Issue Dt:
Application #:
14079170
Filing Dt:
11/13/2013
Publication #:
Pub Dt:
05/14/2015
Title:
CREATING UNDERSTANDABLE MODELS FOR NUMEROUS MODELING TASKS
38
Patent #:
Issue Dt:
02/24/2015
Application #:
14079305
Filing Dt:
11/13/2013
Title:
METHOD TO USE SELF-REPAIR CU BARRIER TO SOLVE BARRIER DEGRADATION DUE TO RU CMP
39
Patent #:
Issue Dt:
07/21/2015
Application #:
14079705
Filing Dt:
11/14/2013
Publication #:
Pub Dt:
03/12/2015
Title:
MOBILE DEVICE PASSWORD RESET
40
Patent #:
Issue Dt:
05/05/2015
Application #:
14079757
Filing Dt:
11/14/2013
Publication #:
Pub Dt:
05/14/2015
Title:
FIN-TYPE TRANSISTOR STRUCTURES WITH EXTENDED EMBEDDED STRESS ELEMENTS AND FABRICATION METHODS
41
Patent #:
Issue Dt:
08/22/2017
Application #:
14079784
Filing Dt:
11/14/2013
Publication #:
Pub Dt:
05/14/2015
Title:
SYSTEM AND METHOD TO ADJUST VEHICLE TEMPERATURE BASED ON DRIVER LOCATION
42
Patent #:
Issue Dt:
05/27/2014
Application #:
14079981
Filing Dt:
11/14/2013
Publication #:
Pub Dt:
03/06/2014
Title:
NON-VOLATILE MEMORY DEVICE FORMED BY DUAL FLOATING GATE DEPOSIT
43
Patent #:
Issue Dt:
12/29/2015
Application #:
14080157
Filing Dt:
11/14/2013
Publication #:
Pub Dt:
05/14/2015
Title:
Securely Associating an Application With a Well-Known Entity
44
Patent #:
Issue Dt:
09/23/2014
Application #:
14080160
Filing Dt:
11/14/2013
Publication #:
Pub Dt:
03/13/2014
Title:
SEMICONDUCTOR INTERCONNECT STRUCTURE HAVING ENHANCED PERFORMANCE AND RELIABILITY
45
Patent #:
Issue Dt:
11/10/2015
Application #:
14080558
Filing Dt:
11/14/2013
Publication #:
Pub Dt:
05/14/2015
Title:
METHODS FOR FABRICATING INTEGRATED CIRCUITS WITH ROBUST GATE ELECTRODE STRUCTURE PROTECTION
46
Patent #:
Issue Dt:
02/16/2016
Application #:
14080562
Filing Dt:
11/14/2013
Publication #:
Pub Dt:
03/13/2014
Title:
3-D INTEGRATION USING MULTI STAGE VIAS
47
Patent #:
Issue Dt:
07/07/2015
Application #:
14080842
Filing Dt:
11/15/2013
Publication #:
Pub Dt:
05/21/2015
Title:
METHOD AND DEVICE FOR SELF-ALIGNED CONTACT ON A NON-RECESSED METAL GATE
48
Patent #:
Issue Dt:
11/25/2014
Application #:
14080866
Filing Dt:
11/15/2013
Title:
DESIGN LAYOUT PATTERN CORRECTION FOR INTEGRATED CIRCUITS
49
Patent #:
Issue Dt:
07/15/2014
Application #:
14080931
Filing Dt:
11/15/2013
Publication #:
Pub Dt:
03/13/2014
Title:
POST-GATE SHALLOW TRENCH ISOLATION STRUCTURE FORMATION
50
Patent #:
Issue Dt:
07/07/2015
Application #:
14080939
Filing Dt:
11/15/2013
Publication #:
Pub Dt:
05/21/2015
Title:
EUV MASK FOR USE DURING EUV PHOTOLITHOGRAPHY PROCESSES
51
Patent #:
Issue Dt:
09/06/2016
Application #:
14081019
Filing Dt:
11/15/2013
Publication #:
Pub Dt:
05/21/2015
Title:
METHODS OF FORMING GATE STRUCTURES FOR SEMICONDUCTOR DEVICES USING A REPLACEMENT GATE TECHNIQUE AND THE RESULTING DEVICES
52
Patent #:
Issue Dt:
03/24/2015
Application #:
14081075
Filing Dt:
11/15/2013
Publication #:
Pub Dt:
03/13/2014
Title:
HYBRID PHOTORESIST COMPOSITION AND PATTERN FORMING METHOD USING THEREOF
53
Patent #:
Issue Dt:
12/22/2015
Application #:
14081320
Filing Dt:
11/15/2013
Publication #:
Pub Dt:
03/13/2014
Title:
SEMICONDUCTOR DEVICES HAVING FIN STRUCTURES, AND METHODS OF FORMING SEMICONDUCTOR DEVICES HAVING FIN STRUCTURES
54
Patent #:
Issue Dt:
02/09/2016
Application #:
14081417
Filing Dt:
11/15/2013
Publication #:
Pub Dt:
03/13/2014
Title:
SEMICONDUCTOR DEVICE INCLUDING GRADED GATE STACK, RELATED METHOD AND DESIGN STRUCTURE
55
Patent #:
Issue Dt:
01/05/2016
Application #:
14081675
Filing Dt:
11/15/2013
Publication #:
Pub Dt:
05/21/2015
Title:
VLAG PIM LINK FAILOVER USING PIM HELLO MESSAGE
56
Patent #:
Issue Dt:
06/16/2015
Application #:
14081736
Filing Dt:
11/15/2013
Publication #:
Pub Dt:
05/21/2015
Title:
FORMING FINFET CELL WITH FIN TIP AND RESULTING DEVICE
57
Patent #:
Issue Dt:
10/27/2015
Application #:
14082125
Filing Dt:
11/16/2013
Publication #:
Pub Dt:
05/21/2015
Title:
GENERATING AN ICONV MODULE IN REAL TIME
58
Patent #:
Issue Dt:
05/31/2016
Application #:
14082199
Filing Dt:
11/18/2013
Publication #:
Pub Dt:
05/21/2015
Title:
DYNAMIC WRITE PRIORITY BASED ON VIRTUAL WRITE QUEUE HIGH WATER MARK FOR SET ASSOCIATIVE CACHE USING CACHE CLEANER WHEN MODIFIED SETS EXCEED THRESHOLD
59
Patent #:
Issue Dt:
11/03/2015
Application #:
14082263
Filing Dt:
11/18/2013
Publication #:
Pub Dt:
05/21/2015
Title:
FORMING A LOW VOTAGE ANTIFUSE DEVICE AND RESULTING DEVICE
60
Patent #:
Issue Dt:
08/09/2016
Application #:
14082560
Filing Dt:
11/18/2013
Publication #:
Pub Dt:
05/21/2015
Title:
COOLING APPARATUS WITH DYNAMIC LOAD ADJUSTMENT
61
Patent #:
Issue Dt:
12/13/2016
Application #:
14082652
Filing Dt:
11/18/2013
Publication #:
Pub Dt:
05/21/2015
Title:
Techniques for Increasing Vector Processing Utilization and Efficiency Through Vector Lane Predication Prediction
62
Patent #:
Issue Dt:
01/26/2016
Application #:
14083517
Filing Dt:
11/19/2013
Publication #:
Pub Dt:
05/21/2015
Title:
FINFET STRUCTURES WITH FINS RECESSED BENEATH THE GATE
63
Patent #:
Issue Dt:
11/24/2015
Application #:
14083544
Filing Dt:
11/19/2013
Publication #:
Pub Dt:
05/21/2015
Title:
STRESS INDUCING CONTACT METAL IN FINFET CMOS
64
Patent #:
Issue Dt:
04/26/2016
Application #:
14083571
Filing Dt:
11/19/2013
Publication #:
Pub Dt:
05/21/2015
Title:
SELF-ALIGNED DUAL-HEIGHT ISOLATION FOR BULK FINFET
65
Patent #:
Issue Dt:
02/28/2017
Application #:
14083604
Filing Dt:
11/19/2013
Publication #:
Pub Dt:
05/21/2015
Title:
INVERTED CONTACT
66
Patent #:
Issue Dt:
04/28/2015
Application #:
14083610
Filing Dt:
11/19/2013
Publication #:
Pub Dt:
03/20/2014
Title:
SOLDER INTERCONNECT WITH NON-WETTABLE SIDEWALL PILLARS AND METHODS OF MANUFACTURE
67
Patent #:
Issue Dt:
05/10/2016
Application #:
14083781
Filing Dt:
11/19/2013
Publication #:
Pub Dt:
05/21/2015
Title:
LOAD SENSING VOLTAGE CHARGE PUMP SYSTEM
68
Patent #:
Issue Dt:
10/13/2015
Application #:
14083797
Filing Dt:
11/19/2013
Publication #:
Pub Dt:
05/21/2015
Title:
INTEGRATED CIRCUITS WITH CLOSE ELECTRICAL CONTACTS AND METHODS FOR FABRICATING THE SAME
69
Patent #:
Issue Dt:
09/09/2014
Application #:
14083962
Filing Dt:
11/19/2013
Publication #:
Pub Dt:
03/20/2014
Title:
REPAIRING ANOMALOUS STIFF PILLAR BUMPS
70
Patent #:
Issue Dt:
05/24/2016
Application #:
14083965
Filing Dt:
11/19/2013
Publication #:
Pub Dt:
05/21/2015
Title:
DATA ENCRYPTION AT THE CLIENT AND SERVER LEVEL
71
Patent #:
Issue Dt:
11/17/2015
Application #:
14084043
Filing Dt:
11/19/2013
Publication #:
Pub Dt:
05/21/2015
Title:
ERROR-CORRECTING CODE DISTRIBUTION FOR MEMORY SYSTEMS
72
Patent #:
Issue Dt:
06/09/2015
Application #:
14084205
Filing Dt:
11/19/2013
Publication #:
Pub Dt:
03/13/2014
Title:
RECESSED SINGLE CRYSTALLINE SOURCE AND DRAIN FOR SEMICONDUCTOR-ON-INSULATOR DEVICES
73
Patent #:
Issue Dt:
11/22/2016
Application #:
14084641
Filing Dt:
11/20/2013
Publication #:
Pub Dt:
05/21/2015
Title:
WORDLINE DECODER CIRCUITS FOR EMBEDDED CHARGE TRAP MULTI-TIME-PROGRAMMABLE-READ-ONLY-MEMORY
74
Patent #:
Issue Dt:
05/31/2016
Application #:
14084644
Filing Dt:
11/20/2013
Publication #:
Pub Dt:
05/21/2015
Title:
BITLINE CIRCUITS FOR EMBEDDED CHARGE TRAP MULTI-TIME-PROGRAMMABLE-READ-ONLY-MEMORY
75
Patent #:
Issue Dt:
09/22/2015
Application #:
14084652
Filing Dt:
11/20/2013
Publication #:
Pub Dt:
05/21/2015
Title:
METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR MODELING RESISTANCE OF A MULTI-LAYERED CONDUCTIVE COMPONENT
76
Patent #:
Issue Dt:
05/03/2016
Application #:
14084676
Filing Dt:
11/20/2013
Publication #:
Pub Dt:
05/21/2015
Title:
OVERLAY METROLOGY SYSTEM AND METHOD
77
Patent #:
Issue Dt:
09/08/2015
Application #:
14084729
Filing Dt:
11/20/2013
Publication #:
Pub Dt:
05/21/2015
Title:
CONTROLLING SWITCH MECHANISM FOR DETECTING FIBRE CHANNEL OVER ETHERNET DATA FORWARDER FAILURE
78
Patent #:
Issue Dt:
07/21/2015
Application #:
14084899
Filing Dt:
11/20/2013
Publication #:
Pub Dt:
05/21/2015
Title:
SILICON-ON-INSULATOR FINFET WITH BULK SOURCE AND DRAIN
79
Patent #:
Issue Dt:
06/02/2015
Application #:
14085285
Filing Dt:
11/20/2013
Publication #:
Pub Dt:
04/23/2015
Title:
COMPUTER-BASED MODELING OF INTEGRATED CIRCUIT CONGESTION AND WIRE DISTRIBUTION FOR PRODUCTS AND SERVICES
80
Patent #:
Issue Dt:
04/14/2015
Application #:
14085748
Filing Dt:
11/20/2013
Publication #:
Pub Dt:
03/20/2014
Title:
FABRICATING PHOTONICS DEVICES FULLY INTEGRATED INTO A CMOS MANUFACTURING PROCESS
81
Patent #:
Issue Dt:
04/14/2015
Application #:
14085752
Filing Dt:
11/20/2013
Publication #:
Pub Dt:
03/20/2014
Title:
FABRICATING PHOTONICS DEVICES FULLY INTEGRATED INTO A CMOS MANUFACTURING PROCESS
82
Patent #:
Issue Dt:
07/28/2015
Application #:
14085906
Filing Dt:
11/21/2013
Publication #:
Pub Dt:
05/21/2015
Title:
MODIFIED, ETCH-RESISTANT GATE STRUCTURE(S) FACILITATING CIRCUIT FABRICATION
83
Patent #:
Issue Dt:
11/03/2015
Application #:
14085932
Filing Dt:
11/21/2013
Publication #:
Pub Dt:
05/21/2015
Title:
STORING PHOTOGRAPHIC METADATA FOR SCENE REPRODUCTION
84
Patent #:
Issue Dt:
11/10/2015
Application #:
14085983
Filing Dt:
11/21/2013
Publication #:
Pub Dt:
05/21/2015
Title:
AUTOMATED TILT AND SHIFT OPTIMIZATION
85
Patent #:
Issue Dt:
09/15/2015
Application #:
14086039
Filing Dt:
11/21/2013
Publication #:
Pub Dt:
05/21/2015
Title:
METHOD AND SYSTEM FOR ANONYMIZATION IN CONTINUOUS LOCATION-BASED SERVICES
86
Patent #:
NONE
Issue Dt:
Application #:
14086199
Filing Dt:
11/21/2013
Publication #:
Pub Dt:
05/21/2015
Title:
UNDOPED EPITAXIAL LAYER FOR JUNCTION ISOLATION IN A FIN FIELD EFFECT TRANSISTOR (FINFET) DEVICE
87
Patent #:
Issue Dt:
01/27/2015
Application #:
14086456
Filing Dt:
11/21/2013
Publication #:
Pub Dt:
03/20/2014
Title:
Method of Fabricating Isolated Capacitors and Structure Thereof
88
Patent #:
Issue Dt:
04/26/2016
Application #:
14086513
Filing Dt:
11/21/2013
Publication #:
Pub Dt:
05/29/2014
Title:
PHOTOVOLTAIC DEVICE WITH SOLUTION-PROCESSED CHALCOGENIDE ABSORBER LAYER
89
Patent #:
Issue Dt:
09/01/2015
Application #:
14086563
Filing Dt:
11/21/2013
Publication #:
Pub Dt:
03/20/2014
Title:
ENCAPSULATION OF CLOSELY SPACED GATE ELECTRODE STRUCTURES
90
Patent #:
Issue Dt:
09/01/2015
Application #:
14087006
Filing Dt:
11/22/2013
Publication #:
Pub Dt:
05/28/2015
Title:
SRAM WRITE-ASSISTED OPERATION WITH VDD-TO-VCS LEVEL SHIFTING
91
Patent #:
Issue Dt:
01/05/2016
Application #:
14087341
Filing Dt:
11/22/2013
Publication #:
Pub Dt:
05/28/2015
Title:
HIGH SPEED DIFFERENTIAL WIRING IN GLASS CERAMIC MCMS
92
Patent #:
Issue Dt:
07/14/2015
Application #:
14087655
Filing Dt:
11/22/2013
Publication #:
Pub Dt:
05/28/2015
Title:
FinFET HAVING SUPPRESSED LEAKAGE CURRENT
93
Patent #:
Issue Dt:
10/27/2015
Application #:
14087684
Filing Dt:
11/22/2013
Publication #:
Pub Dt:
05/28/2015
Title:
DEEP TRENCH MIM CAPACITOR AND MOAT ISOLATION WITH EPITAXIAL SEMICONDUCTOR WAFER SCHEME
94
Patent #:
Issue Dt:
05/10/2016
Application #:
14087819
Filing Dt:
11/22/2013
Publication #:
Pub Dt:
05/28/2015
Title:
DYNAMIC RANDOM ACCESS MEMORY CELL EMPLOYING TRENCHES LOCATED BETWEEN LENGTHWISE EDGES OF SEMICONDUCTOR FINS
95
Patent #:
Issue Dt:
05/31/2016
Application #:
14088025
Filing Dt:
11/22/2013
Publication #:
Pub Dt:
05/28/2015
Title:
STRUCTURE AND METHOD FOR FORMING CMOS WITH NFET AND PFET HAVING DIFFERENT CHANNEL MATERIALS
96
Patent #:
Issue Dt:
02/24/2015
Application #:
14088115
Filing Dt:
11/22/2013
Publication #:
Pub Dt:
03/20/2014
Title:
THREE-DIMENSIONAL INTEGRATED CIRCUIT DEVICE USING A WAFER SCALE MEMBRANE
97
Patent #:
Issue Dt:
03/22/2016
Application #:
14088461
Filing Dt:
11/25/2013
Publication #:
Pub Dt:
05/28/2015
Title:
INTEGRATED MULTIPLE GATE LENGTH SEMICONDUCTOR DEVICE INCLUDING SELF-ALIGNED CONTACTS
98
Patent #:
Issue Dt:
07/19/2016
Application #:
14088462
Filing Dt:
11/25/2013
Publication #:
Pub Dt:
05/28/2015
Title:
VARIABLE LENGTH MULTI-CHANNEL REPLACEMENT METAL GATE INCLUDING SILICON HARD MASK
99
Patent #:
Issue Dt:
12/29/2015
Application #:
14088473
Filing Dt:
11/25/2013
Publication #:
Pub Dt:
05/28/2015
Title:
FIN CAPACITOR EMPLOYING SIDEWALL IMAGE TRANSFER
100
Patent #:
Issue Dt:
01/05/2016
Application #:
14088484
Filing Dt:
11/25/2013
Publication #:
Pub Dt:
05/28/2015
Title:
POWER AWARE EQUALIZATION IN A SERIAL COMMUNICATIONS LINK
Assignor
1
Exec Dt:
11/27/2018
Assignee
1
1100 NORTH MARKET STREET
WILMINGTON, DELAWARE 19801
Correspondence name and address
CT CORPORATION
4400 EASTON COMMONS WAY
SUITE 125
COLUMBUS, OH 43219

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