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Patent #:
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Issue Dt:
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09/14/2004
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Application #:
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09718850
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Filing Dt:
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11/22/2000
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Title:
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LOGIC SOI STRUCTURE, PROCESS AND APPLICATION FOR VERTICAL BIPOLAR TRANSISTOR
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Patent #:
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Issue Dt:
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09/17/2002
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Application #:
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09722222
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Filing Dt:
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11/27/2000
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Title:
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HOW TO IMPROVE THE ESD ON SOI DEVICES
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Patent #:
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Issue Dt:
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04/09/2002
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Application #:
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09723812
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Filing Dt:
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11/28/2000
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Title:
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Graded compound seed layers for semiconductors
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Patent #:
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Issue Dt:
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03/25/2003
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Application #:
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09724134
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Filing Dt:
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11/28/2000
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Title:
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SYSTEMS AND METHODS FOR GENERATING HARDWARE DESCRIPTION CODE
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Patent #:
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Issue Dt:
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07/10/2001
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Application #:
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09725412
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Filing Dt:
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11/29/2000
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Title:
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Embedded vertical dram cells and dual workfunction logic gates
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Patent #:
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Issue Dt:
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04/22/2003
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Application #:
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09726697
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Filing Dt:
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11/29/2000
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Publication #:
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Pub Dt:
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05/30/2002
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Title:
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FLUX COMPOSITION AND SOLDERING METHOD FOR HIGH DENSITY ARRAYS
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Patent #:
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Issue Dt:
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11/26/2002
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Application #:
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09727572
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Filing Dt:
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11/30/2000
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Publication #:
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Pub Dt:
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05/30/2002
| | | | |
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Title:
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METHOD TO STABILIZE A CARBON ALIGNMENT LAYER FOR LIQUID CRYSTAL DISPLAYS
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Patent #:
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Issue Dt:
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09/03/2002
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Application #:
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09728312
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Filing Dt:
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11/30/2000
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Title:
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METHOD OF REDUCING CARBON, SULPHUR, AND OXYGEN IMPURITIES IN A CALCIUM-DOPED COPPER SURFACE AND SEMICONDUCTOR DEVICE THEREBY FORMED
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Patent #:
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Issue Dt:
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09/18/2001
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Application #:
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09728315
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Filing Dt:
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11/30/2000
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Title:
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Method of forming Cu-Ca-O thin films on Cu surfaces in a chemical solution and semiconductor device thereby formed
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Patent #:
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Issue Dt:
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09/03/2002
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Application #:
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09729295
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Filing Dt:
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12/04/2000
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Title:
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ELECTRON BEAM FLOOD EXPOSURE TECHNIQUE TO REDUCE THE CARBON CONTAMINATION
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Patent #:
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Issue Dt:
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08/12/2003
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Application #:
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09729699
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Filing Dt:
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12/06/2000
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Publication #:
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Pub Dt:
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06/06/2002
| | | | |
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Title:
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METHOD OF FORMING NICKEL SILICIDE USING A ONE-STEP RAPID THERMAL ANNEAL PROCESS AND BACKEND PROCESSING
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Patent #:
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Issue Dt:
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08/06/2002
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Application #:
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09730673
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Filing Dt:
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12/06/2000
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Publication #:
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Pub Dt:
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06/06/2002
| | | | |
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Title:
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DRAM CAM CELL WITH HIDDEN REFRESH
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Patent #:
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Issue Dt:
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11/05/2002
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Application #:
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09731031
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Filing Dt:
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12/07/2000
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Publication #:
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Pub Dt:
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08/01/2002
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Title:
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DAMASCENE NISI METAL GATE HIGH-K TRANSISTOR
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Patent #:
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Issue Dt:
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06/10/2003
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Application #:
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09731147
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Filing Dt:
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12/05/2000
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Publication #:
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Pub Dt:
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08/01/2002
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Title:
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METHOD AND APPARATUS FOR INITIALIZING AN INTEGRATED CIRCUIT USING COMPRESSED DATA FROM A REMOTE FUSEBOX
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Patent #:
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Issue Dt:
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12/31/2002
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Application #:
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09731577
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Filing Dt:
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12/06/2000
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Publication #:
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Pub Dt:
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06/06/2002
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Title:
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RESIST TRIM PROCESS TO DEFINE SMALL OPENINGS IN DIELECTRIC LAYERS
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Patent #:
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Issue Dt:
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06/11/2002
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Application #:
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09731616
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Filing Dt:
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12/07/2000
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Title:
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ENHANCED INTERFACE THERMOELECTRIC COOLERS WITH ALL-METAL TIPS
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Patent #:
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Issue Dt:
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08/05/2003
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Application #:
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09731620
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Filing Dt:
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12/07/2000
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Publication #:
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Pub Dt:
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06/13/2002
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Title:
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SHALLOW TRENCH ISOLATION FOR THIN SILICON/SILICON-ON-INSULATOR SUBSTRATES BY UTILIZING POLYSILICON
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Patent #:
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Issue Dt:
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05/07/2002
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Application #:
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09731997
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Filing Dt:
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12/07/2000
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Title:
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THERMOELECTRIC COOLERS WITH ENHANCED STRUCTURED INTERFACES
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Patent #:
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Issue Dt:
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12/17/2002
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Application #:
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09733295
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Filing Dt:
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12/08/2000
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Publication #:
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Pub Dt:
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08/15/2002
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Title:
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METHOD AND APPARATUS FOR TESTING A WRITE FUNCTION OF A DUAL-PORT STATIC MEMORY CELL
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Patent #:
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Issue Dt:
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05/14/2002
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Application #:
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09733778
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Filing Dt:
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12/08/2000
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Title:
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METHOD OF SALICIDE FORMATION BY SILICIDING A GATE AREA PRIOR TO SLILICIDING A SOURCE AND DRAIN AREA
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Patent #:
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Issue Dt:
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01/06/2004
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Application #:
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09733968
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Filing Dt:
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12/12/2000
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Publication #:
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Pub Dt:
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02/21/2002
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Title:
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NANOPARTICLE STRUCTURES UTILIZING SYNTHETIC DNA LATTICES
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Patent #:
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Issue Dt:
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04/09/2002
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Application #:
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09734186
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Filing Dt:
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12/12/2000
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Title:
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SILICIDE GATE TRANSISTORS
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Patent #:
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Issue Dt:
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01/29/2002
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Application #:
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09734189
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Filing Dt:
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12/12/2000
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Title:
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Damascene NiSi metal gate high-K transistor
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Patent #:
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Issue Dt:
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08/05/2003
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Application #:
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09734207
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Filing Dt:
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12/12/2000
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Title:
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METAL SILICIDE GATE TRANSISTORS
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Patent #:
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Issue Dt:
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09/14/2004
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Application #:
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09734225
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Filing Dt:
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12/11/2000
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Publication #:
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Pub Dt:
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06/13/2002
| | | | |
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Title:
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BACKSIDE INTEGRATED CIRCUIT DIE SURFACE FINISHING TECHNIQUE AND TOOL
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Patent #:
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Issue Dt:
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09/30/2003
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Application #:
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09734830
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Filing Dt:
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12/12/2000
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Publication #:
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Pub Dt:
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08/15/2002
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Title:
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ELECTROPLATING APPARATUS WITH VERTICAL ELECTRICAL CONTACT
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Patent #:
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Issue Dt:
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04/02/2002
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Application #:
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09735197
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Filing Dt:
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12/06/2000
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Title:
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PROCESSOR CONFIGURED TO FETCH A BRANCH TARGET ADDRESS FROM ONE SEVERAL INSTRUCTION CACHES RESPONSIVE TO A SIZE OF A DISPLACEMENT OF A CORRESPONDING BRANCH INSTRUCTION
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Patent #:
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Issue Dt:
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07/09/2002
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Application #:
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09735988
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Filing Dt:
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12/13/2000
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Publication #:
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Pub Dt:
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08/08/2002
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Title:
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METHOD FOR FORMING A LINER IN A TRENCH
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Patent #:
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Issue Dt:
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02/18/2003
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Application #:
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09737012
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Filing Dt:
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12/14/2000
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Publication #:
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Pub Dt:
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08/15/2002
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Title:
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METHOD FOR SUPPLY VOLTAGE DROP ANALYSIS DURING PLACEMENT PHASE OF CHIP DESIGN
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Patent #:
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Issue Dt:
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02/26/2002
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Application #:
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09737198
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Filing Dt:
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12/14/2000
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Title:
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Increased polish removal rate of dielectric layers using fixed abrasive pads
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Patent #:
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Issue Dt:
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09/17/2002
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Application #:
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09739935
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Filing Dt:
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12/18/2000
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Publication #:
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Pub Dt:
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06/20/2002
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Title:
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METHOD FOR FORMING A POROUS DIELECTRIC MATERIAL LAYER IN A SEMICONDUCTOR DEVICE AND DEVICE FORMED
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Patent #:
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Issue Dt:
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01/07/2003
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Application #:
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09740089
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Filing Dt:
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12/18/2000
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Pub Dt:
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06/20/2002
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Title:
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INTERCONNECTS WITH TI-CONTAINING LINERS
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Patent #:
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Issue Dt:
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08/06/2002
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Application #:
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09742976
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Filing Dt:
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12/20/2000
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Publication #:
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Pub Dt:
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08/23/2001
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Title:
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MICROPROCESSOR HAVING AIR AS A DIELECTRIC AND ENCAPSULATED LINES
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Patent #:
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Issue Dt:
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01/20/2004
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Application #:
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09745047
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Filing Dt:
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12/20/2000
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Title:
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CONTACT CAPPING LOCAL INTERCONNECT
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Issue Dt:
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11/18/2003
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Application #:
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09745273
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Filing Dt:
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12/20/2000
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Publication #:
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Pub Dt:
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11/08/2001
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Title:
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DEVICE FOR CONTACTING AND/OR MODIFYING A SURFACE HAVING A CANTILEVER AND A METHOD FOR PRODUCTION OF SAID CANTILEVER
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Patent #:
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Issue Dt:
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08/27/2002
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Application #:
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09745361
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Filing Dt:
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12/21/2000
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Title:
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METHOD OF FABRICATING A POLY-POLY CAPACITOR WITH A SIGE BICMOS INTEGRATION SCHEME
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Patent #:
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Issue Dt:
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04/22/2003
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Application #:
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09745951
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Filing Dt:
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12/22/2000
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Pub Dt:
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06/27/2002
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Title:
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DUAL PURPOSE LOW POWER INPUT CIRCUIT FOR A MEMORY DEVICE INTERFACE
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Issue Dt:
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11/30/2004
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Application #:
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09748256
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Filing Dt:
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12/27/2000
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Title:
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SEMICONDUCTOR DEVICE ON A COMBINATION BULK SILICON AND SILICON-ON-INSULATOR (SOI) SUBSTRATE
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Patent #:
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Issue Dt:
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09/21/2004
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Application #:
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09748965
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Filing Dt:
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12/27/2000
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Publication #:
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Pub Dt:
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05/17/2001
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Title:
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INTEGRATED COBALT SILICIDE PROCESS FOR SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
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02/26/2002
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Application #:
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09749112
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Filing Dt:
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12/26/2000
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Publication #:
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Pub Dt:
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05/03/2001
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Title:
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Method for determining a polishing recipe based upon the measured pre-polish thickness of a process layer
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Patent #:
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Issue Dt:
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05/13/2003
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Application #:
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09749162
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Filing Dt:
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12/27/2000
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Publication #:
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Pub Dt:
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06/27/2002
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Title:
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DISTRIBUTED CONNECTOR SYSTEM FOR WEARABLE COMPUTERS
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Patent #:
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Issue Dt:
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04/13/2004
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Application #:
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09749191
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Filing Dt:
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12/26/2000
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Publication #:
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Pub Dt:
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01/22/2004
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Title:
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PREVENTION OF PRECIPITATION DEFECTS ON COPPER INTERCONNECTS DURING CPM BY USE OF SOLUTIONS CONTAINING ORGANIC COMPOUNDS WITH SILICA ADSORPTION AND COPPER CORROSION INHIBITING PROPERTIES
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Patent #:
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Issue Dt:
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05/27/2003
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Application #:
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09749293
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Filing Dt:
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12/27/2000
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Title:
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METHOD AND APPARATUS FOR USING LATENCY TIME AS A RUN-TO RUN CONTROL PARAMETER
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Patent #:
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Issue Dt:
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11/12/2013
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Application #:
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09750475
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Filing Dt:
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12/28/2000
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Publication #:
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Pub Dt:
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04/04/2002
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Title:
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DATA SOURCE INTERFACE ENHANCED ERROR RECOVERY
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Patent #:
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Issue Dt:
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12/04/2001
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Application #:
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09750593
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Filing Dt:
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12/28/2000
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Publication #:
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Pub Dt:
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05/31/2001
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Title:
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Chemical-mechanical polishing slurry that reduces wafer defects
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Issue Dt:
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02/03/2004
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Application #:
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09750969
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Filing Dt:
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12/28/2000
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Publication #:
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Pub Dt:
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08/22/2002
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Title:
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SYSTEM AND METHOD FOR INSERTING LEAKAGE REDUCTION CONTROL IN LOGIC CIRCUITS
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Patent #:
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Issue Dt:
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05/21/2002
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Application #:
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09752571
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Filing Dt:
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12/28/2000
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Publication #:
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Pub Dt:
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08/23/2001
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Title:
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PROCESS FOR FABRICATING SINGLE CRYSTAL RESONANT DEVICES THAT ARE COMPATIBLE WITH INTEGRATED CIRCUIT PROCESSING
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Issue Dt:
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10/18/2005
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Application #:
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09752719
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Filing Dt:
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01/03/2001
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Publication #:
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Pub Dt:
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07/04/2002
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Title:
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METHOD AND APPARATUS FOR PERFORMING PRIORITY-BASED FLOW CONTROL
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Patent #:
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Issue Dt:
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09/17/2002
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Application #:
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09753015
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Filing Dt:
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01/02/2001
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Publication #:
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Pub Dt:
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09/20/2001
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Title:
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COMPOSITE LAMINATE CIRCUIT STRUCTURE AND METHOD OF FORMING THE SAME
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Patent #:
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Issue Dt:
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12/03/2002
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Application #:
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09753284
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Filing Dt:
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01/02/2001
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Publication #:
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Pub Dt:
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07/04/2002
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Title:
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SPIRAL INDUCTOR SEMICONDUCTING DEVICE WITH GROUNDING STRIPS AND CONDUCTING VIAS
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Patent #:
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Issue Dt:
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07/01/2003
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Application #:
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09753705
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Filing Dt:
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01/03/2001
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Title:
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USE OF ENDPOINT SYSTEM TO MATCH INDIVIDUAL PROCESSING STATIONS WITHIN A TOOL
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Patent #:
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Issue Dt:
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11/12/2002
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Application #:
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09753809
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Filing Dt:
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01/03/2001
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Title:
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LOW DEFECT ORGANIC BARC COATING IN A SEMICONDUCTOR STRUCTURE
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Patent #:
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Issue Dt:
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07/23/2002
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Application #:
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09753845
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Filing Dt:
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01/03/2001
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Title:
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METHODOLOGY FOR ELECTRICALLY INDUCED SELECTIVE BREAKDOWN OF NANOTUBES
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Issue Dt:
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04/22/2003
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Application #:
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09754910
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Filing Dt:
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01/05/2001
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Publication #:
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Pub Dt:
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07/11/2002
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Title:
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METHOD TO DETERMINE OPTICAL PROXIMITY CORRECTION AND ASSIST FEATURE RULES WHICH ACCOUNT FOR VARIATIONS IN MASK DIMENSIONS
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Issue Dt:
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09/16/2003
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Application #:
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09755012
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Filing Dt:
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01/05/2001
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Title:
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SOI DIE ANALYSIS OF CIRCUITRY LOGIC STATES VIA COUPLING THROUGH THE INSULATOR
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Issue Dt:
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12/14/2004
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Application #:
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09755164
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Filing Dt:
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01/08/2001
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Publication #:
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Pub Dt:
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07/11/2002
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Title:
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ALUMINUM NITRIDE AND ALUMINUM OXIDE/ALUMINUM NITRIDE HETEROSTRUCTURE GATE DIELECTRIC STACK BASED FIELD EFFECT TRANSISTORS AND METHOD FOR FORMING SAME
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Patent #:
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Issue Dt:
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10/29/2002
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Application #:
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09755216
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Filing Dt:
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01/04/2001
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Title:
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DEVICE FOR POWER SUPPLY DETECTION AND POWER ON RESET
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Issue Dt:
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10/15/2002
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Application #:
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09757107
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Filing Dt:
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01/08/2001
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Publication #:
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Pub Dt:
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07/11/2002
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Title:
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LINEAR VOLTAGE CONTROLLED OSCILLATOR TRANSCONDUCTOR WITH GAIN COMPENSATION
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Issue Dt:
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10/08/2002
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Application #:
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09757118
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Filing Dt:
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01/09/2001
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Title:
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Method and apparatus for measuring effects of packaging stresses of common IC electrical performance parameters at wafer sort
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Patent #:
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Issue Dt:
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06/10/2003
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Application #:
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09757159
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Filing Dt:
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01/09/2001
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Publication #:
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Pub Dt:
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01/17/2002
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Title:
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METHOD FOR BONDING HEAT SINKS TO OVERMOLDS AND DEVICE FORMED THEREBY
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Patent #:
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Issue Dt:
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04/13/2004
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Application #:
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09757185
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Filing Dt:
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01/09/2001
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Publication #:
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Pub Dt:
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05/17/2001
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Title:
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METHOD FOR BONDING HEAT SINKS TO OVERMOLDS AND DEVICE FORMED THEREBY
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Patent #:
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Issue Dt:
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07/16/2002
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Application #:
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09757267
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Filing Dt:
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01/09/2001
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Publication #:
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Pub Dt:
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07/11/2002
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Title:
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PROGRAMMABLE LATCH DEVICE WITH INTEGRATED PROGRAMMABLE ELEMENT
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Patent #:
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Issue Dt:
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12/02/2003
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Application #:
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09757317
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Filing Dt:
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01/09/2001
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Publication #:
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Pub Dt:
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07/11/2002
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Title:
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GROUND-PLANE DEVICE WITH BACK OXIDE TOPOGRAPHY
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Patent #:
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Issue Dt:
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02/01/2005
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Application #:
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09757965
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Filing Dt:
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01/10/2001
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Publication #:
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Pub Dt:
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07/11/2002
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Title:
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FULLY-DEPLETED-COLLECTOR SILICON-ON-INSULATOR (SOI) BIPOLAR TRANSISTOR USEFUL ALONE OR IN SOI BICMOS
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Patent #:
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Issue Dt:
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02/26/2002
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Application #:
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09758487
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Filing Dt:
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01/10/2001
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Title:
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Apparatus and method for monitoring the performance of a microprocessor
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Patent #:
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Issue Dt:
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01/01/2002
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Application #:
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09758989
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Filing Dt:
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01/12/2001
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Title:
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Wafer cleaning apparatus
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Patent #:
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Issue Dt:
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06/10/2003
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Application #:
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09759013
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Filing Dt:
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01/11/2001
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Publication #:
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Pub Dt:
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07/11/2002
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Title:
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PROCESS WINDOW BASED OPTICAL PROXIMITY CORRECTION OF LITHOGRAPHIC IMAGES
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Patent #:
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Issue Dt:
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08/20/2002
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Application #:
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09759258
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Filing Dt:
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01/16/2001
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Publication #:
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Pub Dt:
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04/25/2002
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Title:
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THIN FILM METAL BARRIER FOR ELECTRICAL INTERCONNECTIONS
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Patent #:
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Issue Dt:
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06/11/2002
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Application #:
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09760241
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Filing Dt:
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01/12/2001
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Title:
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CROSS-SHAPED RESIST DISPENSING SYSTEM AND METHOD
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Patent #:
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Issue Dt:
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11/12/2002
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Application #:
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09760421
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Filing Dt:
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01/11/2001
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Title:
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DIELECTRIC TREATMENT IN INTEGRATED CIRCUIT INTERCONNECTS
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Patent #:
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Issue Dt:
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05/02/2006
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Application #:
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09760560
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Filing Dt:
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01/16/2001
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Publication #:
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Pub Dt:
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09/26/2002
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Title:
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METHOD AND INTERFACE FOR GLITCH-FREE CLOCK SWITCHING
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Patent #:
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Issue Dt:
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11/12/2002
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Application #:
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09760955
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Filing Dt:
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01/16/2001
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Title:
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BOND PAD STRUCTURE AND METHOD FOR REDUCED DOWNWARD FORCE WIREBONDING
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Patent #:
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Issue Dt:
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11/26/2002
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Application #:
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09761124
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Filing Dt:
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01/16/2001
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Publication #:
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Pub Dt:
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07/18/2002
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Title:
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COMPLIANT LAYER FOR ENCAPSULATED CLOUMNS
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Patent #:
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Issue Dt:
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02/18/2003
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Application #:
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09761464
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Filing Dt:
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01/16/2001
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Publication #:
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Pub Dt:
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07/18/2002
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Title:
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METHOD FOR ADDING DECOUPLING CAPACITANCE DURING INTEGRATED CIRCUIT DESIGN
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Patent #:
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Issue Dt:
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04/08/2003
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Application #:
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09764048
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Filing Dt:
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01/17/2001
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Publication #:
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Pub Dt:
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10/03/2002
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Title:
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ADJUSTING FILLET GEOMETRY TO COUPLE A HEAT SPREADER TO A CHIP CARRIER
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Patent #:
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Issue Dt:
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01/28/2003
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Application #:
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09764132
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Filing Dt:
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01/19/2001
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Title:
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HEAT SINK GROUNDED TO A GROUNDED PACKAGE LID
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Patent #:
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Issue Dt:
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04/01/2003
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Application #:
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09764674
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Filing Dt:
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01/18/2001
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Publication #:
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Pub Dt:
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07/18/2002
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Title:
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METHOD OF FORMING A SHALLOW TRENCH ISOLATION USING NON-CONFORMAL DIELECTRIC MATERIAL AND PLANARIZATRION
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Patent #:
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Issue Dt:
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02/03/2004
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Application #:
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09764833
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Filing Dt:
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01/17/2001
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Publication #:
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Pub Dt:
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07/18/2002
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Title:
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STRUCTURE AND METHOD OF FORMING BITLINE CONTACTS FOR A VERTICAL DRAM ARRAY USING A LINE BITLINE CONTACT MASK
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Patent #:
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Issue Dt:
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04/16/2002
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Application #:
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09765035
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Filing Dt:
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01/17/2001
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Title:
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INTEGRATED FUSE LATCH AND SHIFT REGISTER FOR EFFICIENT PROGRAMMING AND FUSE READOUT
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Patent #:
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Issue Dt:
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06/04/2002
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Application #:
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09765666
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Filing Dt:
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01/22/2001
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Publication #:
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Pub Dt:
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08/23/2001
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Title:
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INTEGRATION OF LOW-K SIOF FOR DAMASCENE STRUCTURE
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Patent #:
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Issue Dt:
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04/01/2003
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Application #:
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09766005
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Filing Dt:
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01/18/2001
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Publication #:
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Pub Dt:
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07/18/2002
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Title:
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METHOD AND APPARATUS FOR LITHOGRAPHICALLY PRINTING TIGHTLY NESTED AND ISOLATED DEVICE FEATURES USING MULTIPLE MASK EXPOSURES
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Patent #:
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Issue Dt:
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03/18/2003
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Application #:
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09766481
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Filing Dt:
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01/19/2001
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Title:
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CIRCUIT FOR DETECTING A COOLING DEVICE IN A COMPUTER SYSTEM
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Patent #:
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Issue Dt:
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04/02/2002
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Application #:
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09766737
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Filing Dt:
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01/22/2001
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Title:
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Automated variation of stepper exposure dose based upon across wafer variations in device characteristics, and system for accomplishing same
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Patent #:
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Issue Dt:
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08/13/2002
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Application #:
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09766799
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Filing Dt:
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01/22/2001
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Publication #:
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Pub Dt:
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07/25/2002
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Title:
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REFRESH CONTROL CIRCUIT FOR LOW-POWER SRAM APPLICATIONS
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Patent #:
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Issue Dt:
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03/19/2002
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Application #:
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09768112
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Filing Dt:
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01/23/2001
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Publication #:
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Pub Dt:
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05/31/2001
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Title:
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Rolling ball connector
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Patent #:
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Issue Dt:
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03/16/2004
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Application #:
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09768122
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Filing Dt:
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01/23/2001
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Publication #:
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Pub Dt:
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07/25/2002
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Title:
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METHOD FOR GUARANTEEING A MINIMUM DATA STROBE VALID WINDOW AND A MINIMUM DATA VALID WINDOW FOR DDR MEMORY DEVICES
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Patent #:
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Issue Dt:
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09/11/2001
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Application #:
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09768493
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Filing Dt:
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01/24/2001
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Publication #:
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Pub Dt:
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07/19/2001
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Title:
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Silicon-germanium BiCMOS on SOI
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Patent #:
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Issue Dt:
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11/18/2003
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Application #:
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09768833
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Filing Dt:
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01/24/2001
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Publication #:
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Pub Dt:
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07/25/2002
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Title:
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APPARATUS AND METHOD FOR WAFER CLEANING
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Patent #:
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Issue Dt:
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08/10/2004
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Application #:
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09769170
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Filing Dt:
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01/25/2001
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Publication #:
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Pub Dt:
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07/25/2002
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Title:
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TRANSFERABLE DEVICE-CONTAINING LAYER FOR SILICON-ON-INSULATOR APPLICATIONS
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Patent #:
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Issue Dt:
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01/06/2004
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Application #:
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09769640
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Filing Dt:
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01/25/2001
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Publication #:
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Pub Dt:
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07/25/2002
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Title:
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STI PULL-DOWN TO CONTROL SIGE FACET GROWTH
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Patent #:
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Issue Dt:
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10/15/2002
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Application #:
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09769667
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Filing Dt:
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01/25/2001
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Publication #:
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Pub Dt:
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07/25/2002
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Title:
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ESD ROBUST SILICON GERMANIUM TRANSISTOR WITH EMITTER NP-BLOCK MASK EXTRINSIC BASE BALLASTING RESISTOR WITH DOPED FACET REGION
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Patent #:
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Issue Dt:
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07/23/2002
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Application #:
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09770065
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Filing Dt:
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01/25/2001
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Publication #:
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Pub Dt:
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02/28/2002
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Title:
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PROGRAMMABLE GAIN AMPLIFIER FOR USE IN DATA NETWORK
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Patent #:
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Issue Dt:
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09/10/2002
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Application #:
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09770468
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Filing Dt:
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01/29/2001
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Title:
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ULTRA THIN ETCH STOP LAYER FOR DAMASCENE PROCESS
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Patent #:
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Issue Dt:
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10/29/2002
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Application #:
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09770469
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Filing Dt:
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01/29/2001
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Title:
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DIELECTRIC LAYER WITH TREATED TOP SURFACE FORMING AN ETCH STOP LAYER AND METHOD OF MAKING THE SAME
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Patent #:
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Issue Dt:
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09/23/2003
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Application #:
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09770730
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Filing Dt:
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01/26/2001
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Title:
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PELLICLE FOR USE IN EUV LITHOGRAPHY AND A METHOD OF MAKING SUCH A PELLICLE
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Patent #:
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Issue Dt:
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04/08/2003
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Application #:
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09770733
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Filing Dt:
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01/26/2001
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Publication #:
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Pub Dt:
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09/12/2002
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Title:
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PELLICLE FOR USE IN SMALL WAVELENGTH LITHOGRAPHY AND A METHOD FOR MAKING SUCH A PELLICLE
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Patent #:
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Issue Dt:
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03/30/2004
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Application #:
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09770788
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Filing Dt:
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01/26/2001
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Publication #:
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Pub Dt:
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08/01/2002
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Title:
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T-RAM ARRAY HAVING A PLANAR CELL STRUCTURE AND METHOD FOR FABRICATING THE SAME
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Patent #:
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Issue Dt:
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01/21/2003
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Application #:
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09771149
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Filing Dt:
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01/26/2001
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Publication #:
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Pub Dt:
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10/10/2002
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Title:
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NORBORNENE FLUOROACRYLATE COPOLYMERS AND PROCESS FOR USE THEREOF
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Patent #:
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Issue Dt:
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07/15/2003
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Application #:
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09771236
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Filing Dt:
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01/26/2001
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Title:
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PELLICLE FOR USE IN SMALL WAVELENGTH LITHOGRAPHY AND A METHOD FOR MAKING SUCH A PELLICLE USING A SILICON LAYER
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Patent #:
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Issue Dt:
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05/04/2004
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Application #:
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09771261
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Filing Dt:
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01/26/2001
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Publication #:
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Pub Dt:
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10/10/2002
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Title:
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LITHOGRAPHIC PHOTORESIST COMPOSITION AND PROCESS FOR ITS USE
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