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Patent Assignment Details
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Reel/Frame:049490/0001   Pages: 892
Recorded: 11/29/2018
Conveyance: SECURITY AGREEMENT
1
Patent #:
Issue Dt:
01/12/2016
Application #:
14590238
Filing Dt:
01/06/2015
Publication #:
Pub Dt:
05/21/2015
Title:
ASYMMETRIC SPACERS
2
Patent #:
Issue Dt:
04/19/2016
Application #:
14590327
Filing Dt:
01/06/2015
Publication #:
Pub Dt:
05/07/2015
Title:
U-SHAPED SEMICONDUCTOR STRUCTURE
3
Patent #:
Issue Dt:
01/30/2018
Application #:
14590591
Filing Dt:
01/06/2015
Publication #:
Pub Dt:
07/07/2016
Title:
ELECTRICALLY INSULATED FIN STRUCTURE(S) WITH ALTERNATIVE CHANNEL MATERIALS AND FABRICATION METHODS
4
Patent #:
Issue Dt:
09/13/2016
Application #:
14592069
Filing Dt:
01/08/2015
Publication #:
Pub Dt:
07/14/2016
Title:
COINTEGRATION OF BULK AND SOI SEMICONDUCTOR DEVICES
5
Patent #:
Issue Dt:
05/12/2015
Application #:
14592412
Filing Dt:
01/08/2015
Publication #:
Pub Dt:
05/07/2015
Title:
Band Engineered Semiconductor Device and Method for Manufacturing Thereof
6
Patent #:
Issue Dt:
06/14/2016
Application #:
14592421
Filing Dt:
01/08/2015
Publication #:
Pub Dt:
05/21/2015
Title:
CRACK CONTROL FOR SUBSTRATE SEPARATION
7
Patent #:
Issue Dt:
11/29/2016
Application #:
14593183
Filing Dt:
01/09/2015
Publication #:
Pub Dt:
07/14/2016
Title:
TEMPERATURE-CONTROLLED IMPLANTING OF A DIFFUSION-SUPPRESSING DOPANT IN A SEMICONDUCTOR STRUCTURE
8
Patent #:
Issue Dt:
08/16/2016
Application #:
14593264
Filing Dt:
01/09/2015
Publication #:
Pub Dt:
07/14/2016
Title:
STRESS MODULATION IN FIELD EFFECT TRANSISTORS IN REDUCING CONTACT RESISTANCE AND INCREASING CHARGE CARRIER MOBILITY
9
Patent #:
Issue Dt:
07/21/2015
Application #:
14593282
Filing Dt:
01/09/2015
Publication #:
Pub Dt:
04/30/2015
Title:
BIPOLAR JUNCTION TRANSISTORS WITH SELF-ALIGNED TERMINALS
10
Patent #:
Issue Dt:
10/18/2016
Application #:
14595756
Filing Dt:
01/13/2015
Publication #:
Pub Dt:
05/07/2015
Title:
METHOD TO IMPROVE RELIABILITY OF REPLACEMENT GATE DEVICE
11
Patent #:
Issue Dt:
01/10/2017
Application #:
14595850
Filing Dt:
01/13/2015
Publication #:
Pub Dt:
05/07/2015
Title:
PASSGATE STRENGTH CALIBRATION TECHNIQUES FOR VOLTAGE REGULATORS
12
Patent #:
Issue Dt:
08/15/2017
Application #:
14596331
Filing Dt:
01/14/2015
Publication #:
Pub Dt:
07/14/2016
Title:
FDSOI - CAPACITOR
13
Patent #:
Issue Dt:
08/09/2016
Application #:
14597327
Filing Dt:
01/15/2015
Publication #:
Pub Dt:
05/28/2015
Title:
THREE-DIMENSIONAL INTEGRATED CIRCUIT DEVICE FABRICATION INCLUDING WAFER SCALE MEMBRANE
14
Patent #:
Issue Dt:
10/06/2015
Application #:
14598154
Filing Dt:
01/15/2015
Publication #:
Pub Dt:
05/07/2015
Title:
ADJUSTING TENSION IN A TAPE MEDIA TO COUNTER TAPE DIMENSIONAL STABILITY (TDS) ERRORS IN A TAPE MEDIA
15
Patent #:
Issue Dt:
06/14/2016
Application #:
14598256
Filing Dt:
01/16/2015
Publication #:
Pub Dt:
06/11/2015
Title:
SOFTWARE VULNERABILITY NOTIFICATION VIA ICON DECORATIONS
16
Patent #:
Issue Dt:
03/01/2016
Application #:
14598701
Filing Dt:
01/16/2015
Publication #:
Pub Dt:
05/07/2015
Title:
CAPACITORS POSITIONED AT THE DEVICE LEVEL IN AN INTEGRATED CIRCUIT PRODUCT AND METHODS OF MAKING SUCH CAPACITORS
17
Patent #:
Issue Dt:
07/10/2018
Application #:
14599576
Filing Dt:
01/19/2015
Publication #:
Pub Dt:
05/14/2015
Title:
ELECTRONIC FUSE HAVING AN INSULATION LAYER
18
Patent #:
Issue Dt:
04/05/2016
Application #:
14599873
Filing Dt:
01/19/2015
Publication #:
Pub Dt:
05/21/2015
Title:
DEVICE ISOLATION IN FINFET CMOS
19
Patent #:
Issue Dt:
09/13/2016
Application #:
14600097
Filing Dt:
01/20/2015
Publication #:
Pub Dt:
05/14/2015
Title:
TRANSISTOR INCLUDING A GATE ELECTRODE EXTENDING ALL AROUND ONE OR MORE CHANNEL REGIONS
20
Patent #:
Issue Dt:
08/23/2016
Application #:
14600229
Filing Dt:
01/20/2015
Publication #:
Pub Dt:
05/14/2015
Title:
NON-VOLATILE MEMORY DEVICE EMPLOYING SEMICONDUCTOR NANOPARTICLES
21
Patent #:
Issue Dt:
07/12/2016
Application #:
14600273
Filing Dt:
01/20/2015
Publication #:
Pub Dt:
05/21/2015
Title:
INTEGRATED CIRCUIT AND INTERCONNECT, AND METHOD OF FABRICATING SAME
22
Patent #:
Issue Dt:
12/29/2015
Application #:
14601172
Filing Dt:
01/20/2015
Publication #:
Pub Dt:
05/28/2015
Title:
ITERATIVE DATA STORAGE READ CHANNEL ARCHITECTURE
23
Patent #:
Issue Dt:
01/10/2017
Application #:
14601655
Filing Dt:
01/21/2015
Publication #:
Pub Dt:
07/21/2016
Title:
BIPOLAR JUNCTION TRANSISTOR WITH MULTIPLE EMITTER FINGERS
24
Patent #:
Issue Dt:
08/04/2015
Application #:
14601745
Filing Dt:
01/21/2015
Publication #:
Pub Dt:
05/14/2015
Title:
Semiconductor Device With Raised Source/Drain And Replacement Metal Gate
25
Patent #:
Issue Dt:
05/16/2017
Application #:
14602567
Filing Dt:
01/22/2015
Publication #:
Pub Dt:
07/28/2016
Title:
SYMMETRIC MULTI-PORT INDUCTOR FOR DIFFERENTIAL MULTI-BAND RF CIRCUITS
26
Patent #:
Issue Dt:
10/25/2016
Application #:
14602940
Filing Dt:
01/22/2015
Publication #:
Pub Dt:
05/21/2015
Title:
SEMICONDUCTOR DEVICE INCLUDING A RESISTOR AND METHOD FOR THE FORMATION THEREOF
27
Patent #:
Issue Dt:
10/27/2015
Application #:
14603856
Filing Dt:
01/23/2015
Publication #:
Pub Dt:
05/14/2015
Title:
INTEGRATED ANTENNA FOR RFIC PACKAGE APPLICATIONS
28
Patent #:
Issue Dt:
10/04/2016
Application #:
14604009
Filing Dt:
01/23/2015
Publication #:
Pub Dt:
07/28/2016
Title:
DATA-DEPENDENT SELF-BIASED DIFFERENTIAL SENSE AMPLIFIER
29
Patent #:
Issue Dt:
02/16/2016
Application #:
14606224
Filing Dt:
01/27/2015
Publication #:
Pub Dt:
05/21/2015
Title:
REPLACEMENT GATE STRUCTURES AND METHODS OF MANUFACTURING
30
Patent #:
Issue Dt:
03/29/2016
Application #:
14607191
Filing Dt:
01/28/2015
Publication #:
Pub Dt:
05/28/2015
Title:
LOCALLY ISOLATED PROTECTED BULK FINFET SEMICONDUCTOR DEVICE
31
Patent #:
Issue Dt:
11/01/2016
Application #:
14608288
Filing Dt:
01/29/2015
Publication #:
Pub Dt:
08/04/2016
Title:
NON-PLANAR EXCITON TRANSISTOR (BISFET) AND METHODS FOR MAKING
32
Patent #:
Issue Dt:
07/21/2015
Application #:
14608365
Filing Dt:
01/29/2015
Publication #:
Pub Dt:
05/28/2015
Title:
CMOS WITH DUAL RAISED SOURCE AND DRAIN FOR NMOS AND PMOS
33
Patent #:
Issue Dt:
02/16/2016
Application #:
14608370
Filing Dt:
01/29/2015
Publication #:
Pub Dt:
05/21/2015
Title:
CMOS WITH DUAL RAISED SOURCE AND DRAIN FOR NMOS AND PMOS
34
Patent #:
Issue Dt:
02/16/2016
Application #:
14608374
Filing Dt:
01/29/2015
Publication #:
Pub Dt:
05/21/2015
Title:
CMOS WITH DUAL RAISED SOURCE AND DRAIN FOR NMOS AND PMOS
35
Patent #:
Issue Dt:
03/29/2016
Application #:
14608386
Filing Dt:
01/29/2015
Publication #:
Pub Dt:
05/21/2015
Title:
CMOS WITH DUAL RAISED SOURCE AND DRAIN FOR NMOS AND PMOS
36
Patent #:
Issue Dt:
11/10/2015
Application #:
14608508
Filing Dt:
01/29/2015
Publication #:
Pub Dt:
05/28/2015
Title:
READING METHOD FOR LINEAR TAPE OPEN
37
Patent #:
Issue Dt:
05/24/2016
Application #:
14608625
Filing Dt:
01/29/2015
Title:
METHODS OF FORMING FIN ISOLATION REGIONS ON FINFET SEMICONDUCTOR DEVICES USING AN OXIDATION-BLOCKING LAYER OF MATERIAL
38
Patent #:
Issue Dt:
03/22/2016
Application #:
14608675
Filing Dt:
01/29/2015
Publication #:
Pub Dt:
05/21/2015
Title:
FABRICATING SELF-FORMED NANOMETER PORE ARRAY AT WAFER SCALE FOR DNA SEQUENCING
39
Patent #:
Issue Dt:
06/06/2017
Application #:
14608729
Filing Dt:
01/29/2015
Publication #:
Pub Dt:
08/04/2016
Title:
METHODS OF FORMING FIN ISOLATION REGIONS ON FINFET SEMICONDUCTOR DEVICES BY IMPLANTATION OF AN OXIDATION-RETARDING MATERIAL
40
Patent #:
Issue Dt:
08/04/2015
Application #:
14608781
Filing Dt:
01/29/2015
Publication #:
Pub Dt:
05/21/2015
Title:
NANOGAP DEVICE WITH CAPPED NANOWIRE STRUCTURES
41
Patent #:
Issue Dt:
07/17/2018
Application #:
14608815
Filing Dt:
01/29/2015
Publication #:
Pub Dt:
08/04/2016
Title:
METHODS OF FORMING FIN ISOLATION REGIONS UNDER TENSILE-STRAINED FINS ON FINFET SEMICONDUCTOR DEVICES
42
Patent #:
Issue Dt:
08/22/2017
Application #:
14608902
Filing Dt:
01/29/2015
Publication #:
Pub Dt:
08/04/2016
Title:
METHODS OF FORMING NMOS AND PMOS FINFET DEVICES AND THE RESULTING PRODUCT
43
Patent #:
Issue Dt:
05/30/2017
Application #:
14609105
Filing Dt:
01/29/2015
Publication #:
Pub Dt:
08/04/2016
Title:
NON-PLANAR SEMICONDUCTOR STRUCTURE WITH PRESERVED ISOLATION REGION
44
Patent #:
Issue Dt:
10/18/2016
Application #:
14609115
Filing Dt:
01/29/2015
Publication #:
Pub Dt:
08/04/2016
Title:
ULTRATHIN BODY (UTB) FINFET SEMICONDUCTOR STRUCTURE
45
Patent #:
Issue Dt:
06/07/2016
Application #:
14609171
Filing Dt:
01/29/2015
Title:
CONTACT FORMATION FOR SEMICONDUCTOR DEVICE
46
Patent #:
Issue Dt:
08/09/2016
Application #:
14609271
Filing Dt:
01/29/2015
Publication #:
Pub Dt:
08/04/2016
Title:
SEMICONDUCTOR STRUCTURE HAVING SOURCE/DRAIN GOUGING IMMUNITY
47
Patent #:
Issue Dt:
01/31/2017
Application #:
14609504
Filing Dt:
01/30/2015
Publication #:
Pub Dt:
08/04/2016
Title:
FABRICATING TRANSISTORS HAVING RESURFACED SOURCE/DRAIN REGIONS WITH STRESSED PORTIONS
48
Patent #:
Issue Dt:
08/30/2016
Application #:
14609564
Filing Dt:
01/30/2015
Publication #:
Pub Dt:
08/04/2016
Title:
SINGLE DIFFUSION BREAK WITH IMPROVED ISOLATION AND PROCESS WINDOW AND REDUCED COST
49
Patent #:
Issue Dt:
09/06/2016
Application #:
14609588
Filing Dt:
01/30/2015
Publication #:
Pub Dt:
08/04/2016
Title:
METHOD FOR A LOW PROFILE ETCHABLE EUV ABSORBER LAYER WITH EMBEDDED PARTICLES IN A PHOTOLITHOGRAPHY MASK
50
Patent #:
Issue Dt:
06/14/2016
Application #:
14609614
Filing Dt:
01/30/2015
Title:
METHOD FOR UNIFORM RECESS DEPTH AND FILL IN SINGLE DIFFUSION BREAK FOR FIN-TYPE PROCESS AND RESULTING DEVICES
51
Patent #:
Issue Dt:
08/23/2016
Application #:
14609653
Filing Dt:
01/30/2015
Publication #:
Pub Dt:
08/04/2016
Title:
PROCESS FOR SINGLE DIFFUSION BREAK WITH SIMPLIFIED PROCESS
52
Patent #:
Issue Dt:
05/10/2016
Application #:
14610260
Filing Dt:
01/30/2015
Title:
SPECIAL CONSTRUCTS FOR CONTINUOUS NON-UNIFORM ACTIVE REGION FINFET STANDARD CELLS
53
Patent #:
Issue Dt:
10/04/2016
Application #:
14611496
Filing Dt:
02/02/2015
Publication #:
Pub Dt:
08/04/2016
Title:
DFT STRUCTURE FOR TSVS IN 3D ICS WHILE MAINTAINING FUNCTIONAL PURPOSE
54
Patent #:
Issue Dt:
04/19/2016
Application #:
14611740
Filing Dt:
02/02/2015
Title:
MOISTURE SCAVENGING LAYER FOR THINNER BARRIER APPLICATION IN BEOL INTEGRATION
55
Patent #:
Issue Dt:
06/21/2016
Application #:
14611908
Filing Dt:
02/02/2015
Title:
INTEGRATED CIRCUITS WITH CAPACITORS AND METHODS OF PRODUCING THE SAME
56
Patent #:
Issue Dt:
01/24/2017
Application #:
14612683
Filing Dt:
02/03/2015
Publication #:
Pub Dt:
08/04/2016
Title:
Method for an Efficient Modeling of the Impact of Device-Level Self-Heating on Electromigration Limited Current Specifications
57
Patent #:
Issue Dt:
04/26/2016
Application #:
14613425
Filing Dt:
02/04/2015
Title:
METHOD OF FORMING A SEMICONDUCTOR DEVICE AND RESULTING SEMICONDUCTOR DEVICES
58
Patent #:
Issue Dt:
12/26/2017
Application #:
14613570
Filing Dt:
02/04/2015
Publication #:
Pub Dt:
08/04/2016
Title:
EXTRACTION OF RESISTANCE ASSOCIATED WITH LATERALLY DIFFUSED DOPANT PROFILES IN CMOS DEVICES
59
Patent #:
Issue Dt:
11/03/2015
Application #:
14613781
Filing Dt:
02/04/2015
Publication #:
Pub Dt:
06/18/2015
Title:
FIN ISOLATION IN MULTI-GATE FIELD EFFECT TRANSISTORS
60
Patent #:
Issue Dt:
11/29/2016
Application #:
14613983
Filing Dt:
02/04/2015
Publication #:
Pub Dt:
08/04/2016
Title:
METHODS OF FABRICATING NANOWIRE STRUCTURES
61
Patent #:
Issue Dt:
02/23/2016
Application #:
14614470
Filing Dt:
02/05/2015
Title:
SYSTEM AND METHOD FOR MANAGING CIRCUIT PERFORMANCE AND POWER CONSUMPTION BY SELECTIVELY ADJUSTING SUPPLY VOLTAGE OVER TIME
62
Patent #:
Issue Dt:
07/12/2016
Application #:
14614489
Filing Dt:
02/05/2015
Title:
METHOD OF FORMING A COMPLEMENTARY METAL OXIDE SEMICONDUCTOR STRUCTURE WITH N-TYPE AND P-TYPE FIELD EFFECT TRANSISTORS HAVING SYMMETRIC SOURCE/DRAIN JUNCTIONS AND OPTIONAL DUAL SILICIDES
63
Patent #:
Issue Dt:
05/03/2016
Application #:
14615470
Filing Dt:
02/06/2015
Title:
FABRICATING TRANSISTOR(S) WITH RAISED ACTIVE REGIONS HAVING ANGLED UPPER SURFACES
64
Patent #:
Issue Dt:
08/09/2016
Application #:
14615529
Filing Dt:
02/06/2015
Publication #:
Pub Dt:
08/11/2016
Title:
METHODS OF FORMING A COMPLEX GAA FET DEVICE AT ADVANCED TECHNOLOGY NODES
65
Patent #:
Issue Dt:
11/10/2015
Application #:
14615762
Filing Dt:
02/06/2015
Publication #:
Pub Dt:
06/25/2015
Title:
FINFET INTEGRATED CIRCUITS AND METHODS FOR THEIR FABRICATION
66
Patent #:
Issue Dt:
09/13/2016
Application #:
14616226
Filing Dt:
02/06/2015
Publication #:
Pub Dt:
08/11/2016
Title:
INTEGRATED CIRCUITS WITH MIDDLE OF LINE CAPACITANCE REDUCTION IN SELF-ALIGNED CONTACT PROCESS FLOW AND FABRICATION METHODS
67
Patent #:
Issue Dt:
02/23/2016
Application #:
14616614
Filing Dt:
02/06/2015
Publication #:
Pub Dt:
06/04/2015
Title:
MULTI-FORMAT READ DRIVE
68
Patent #:
Issue Dt:
11/14/2017
Application #:
14616855
Filing Dt:
02/09/2015
Publication #:
Pub Dt:
12/29/2016
Title:
PLANAR QUBITS HAVING INCREASED COHERENCE TIMES
69
Patent #:
Issue Dt:
06/21/2016
Application #:
14617314
Filing Dt:
02/09/2015
Publication #:
Pub Dt:
06/04/2015
Title:
Techniques to Form Uniform and Stable Silicide
70
Patent #:
Issue Dt:
06/21/2016
Application #:
14618498
Filing Dt:
02/10/2015
Publication #:
Pub Dt:
06/25/2015
Title:
DEFECTIVE P-N JUNCTION FOR BACKGATED FULLY DEPLETED SILICON ON INSULATOR MOSFET
71
Patent #:
Issue Dt:
04/05/2016
Application #:
14620233
Filing Dt:
02/12/2015
Publication #:
Pub Dt:
06/25/2015
Title:
LOCALLY RAISED EPITAXY FOR IMPROVED CONTACT BY LOCAL SILICON CAPPING DURING TRENCH SILICIDE PROCESSINGS
72
Patent #:
Issue Dt:
04/11/2017
Application #:
14620273
Filing Dt:
02/12/2015
Publication #:
Pub Dt:
08/18/2016
Title:
SYSTEMS AND METHODS TO PREVENT INCORPORATION OF A USED INTEGRATED CIRCUIT CHIP INTO A PRODUCT
73
Patent #:
Issue Dt:
10/20/2015
Application #:
14621039
Filing Dt:
02/12/2015
Publication #:
Pub Dt:
06/04/2015
Title:
LATERAL ETCH STOP FOR NEMS RELEASE ETCH FOR HIGH DENSITY NEMS/CMOS MONOLITHIC INTEGRATION
74
Patent #:
Issue Dt:
07/21/2015
Application #:
14621785
Filing Dt:
02/13/2015
Publication #:
Pub Dt:
06/11/2015
Title:
TITANIUM OXYNITRIDE HARD MASK FOR LITHOGRAPHIC PATTERNING
75
Patent #:
Issue Dt:
10/09/2018
Application #:
14622997
Filing Dt:
02/16/2015
Publication #:
Pub Dt:
08/18/2016
Title:
MODIFIED TUNGSTEN SILICON
76
Patent #:
Issue Dt:
01/29/2019
Application #:
14623115
Filing Dt:
02/16/2015
Publication #:
Pub Dt:
08/18/2016
Title:
MODIFIED TUNGSTEN SILICON
77
Patent #:
Issue Dt:
06/16/2015
Application #:
14623720
Filing Dt:
02/17/2015
Publication #:
Pub Dt:
06/11/2015
Title:
III-V Device with Overlapped Extension Regions Using Replacement Gate
78
Patent #:
Issue Dt:
06/23/2015
Application #:
14623732
Filing Dt:
02/17/2015
Publication #:
Pub Dt:
06/11/2015
Title:
III-V FET Device with Overlapped Extension Regions Using Gate Last
79
Patent #:
Issue Dt:
01/09/2018
Application #:
14624601
Filing Dt:
02/18/2015
Publication #:
Pub Dt:
06/11/2015
Title:
LASER ASHING OF POLYIMIDE FOR SEMICONDUCTOR MANUFACTURING
80
Patent #:
Issue Dt:
04/18/2017
Application #:
14624907
Filing Dt:
02/18/2015
Publication #:
Pub Dt:
08/18/2016
Title:
SYSTEM AND METHOD FOR IDENTIFYING OPERATING TEMPERATURES AND MODIFYING OF INTEGRATED CIRCUITS
81
Patent #:
Issue Dt:
09/25/2018
Application #:
14626191
Filing Dt:
02/19/2015
Publication #:
Pub Dt:
06/11/2015
Title:
SCANNING PROBE WITH TWIN-NANOPORE OR A-SINGLE-NANOPORE FOR SENSING BIOMOLECULES
82
Patent #:
Issue Dt:
08/02/2016
Application #:
14628446
Filing Dt:
02/23/2015
Publication #:
Pub Dt:
08/25/2016
Title:
SAMPLE PLAN CREATION FOR OPTICAL PROXIMITY CORRECTION WITH MINIMAL NUMBER OF CLIPS
83
Patent #:
Issue Dt:
10/11/2016
Application #:
14628947
Filing Dt:
02/23/2015
Publication #:
Pub Dt:
08/25/2016
Title:
SEMICONDUCTOR STRUCTURE INCLUDING AT LEAST ONE ELECTRICALLY CONDUCTIVE PILLAR, SEMICONDUCTOR STRUCTURE INCLUDING A CONTACT CONTACTING AN OUTER LAYER OF AN ELECTRICALLY CONDUCTIVE STRUCTURE AND METHOD FOR THE FORMATION THEREOF
84
Patent #:
Issue Dt:
12/04/2018
Application #:
14630529
Filing Dt:
02/24/2015
Publication #:
Pub Dt:
08/25/2016
Title:
METHOD, APPARATUS AND SYSTEM FOR ADVANCED CHANNEL CMOS INTEGRATION
85
Patent #:
Issue Dt:
12/27/2016
Application #:
14630676
Filing Dt:
02/25/2015
Publication #:
Pub Dt:
08/25/2016
Title:
METHODS FOR FABRICATING INTEGRATED CIRCUITS USING DIRECTED SELF-ASSEMBLY INCLUDING A SUBSTANTIALLY PERIODIC ARRAY OF TOPOGRAPHICAL FEATURES THAT INCLUDES ETCH RESISTANT TOPOGRAPHICAL FEATURES FOR TRANSFERABILITY CONTROL
86
Patent #:
Issue Dt:
11/14/2017
Application #:
14630774
Filing Dt:
02/25/2015
Publication #:
Pub Dt:
08/25/2016
Title:
MITIGATING COLLISIONS IN A PHYSICAL SPACE DURING GAMING
87
Patent #:
Issue Dt:
10/02/2018
Application #:
14632180
Filing Dt:
02/26/2015
Publication #:
Pub Dt:
07/09/2015
Title:
METHOD AND DEVICE FOR COOLING A HEAT GENERATING COMPONENT
88
Patent #:
Issue Dt:
04/30/2019
Application #:
14632194
Filing Dt:
02/26/2015
Publication #:
Pub Dt:
06/25/2015
Title:
METHOD AND DEVICE FOR COOLING A HEAT GENERATING COMPONENT
89
Patent #:
Issue Dt:
06/28/2016
Application #:
14632313
Filing Dt:
02/26/2015
Publication #:
Pub Dt:
06/18/2015
Title:
INTEGRATION OF DENSE AND VARIABLE PITCH FIN STRUCTURES
90
Patent #:
Issue Dt:
05/10/2016
Application #:
14633069
Filing Dt:
02/26/2015
Publication #:
Pub Dt:
08/06/2015
Title:
TRANSFERRING HEAT THROUGH AN OPTICAL LAYER OF INTEGRATED CIRCUITRY
91
Patent #:
NONE
Issue Dt:
Application #:
14633246
Filing Dt:
02/27/2015
Publication #:
Pub Dt:
09/01/2016
Title:
METHODS FOR FABRICATING SEMICONDUCTOR STRUCTURE WITH CONDENSED SILICON GERMANIUM LAYER
92
Patent #:
NONE
Issue Dt:
Application #:
14633341
Filing Dt:
02/27/2015
Publication #:
Pub Dt:
09/01/2016
Title:
SELF ALIGNED RAISED FIN TIP END STI TO IMPROVE THE FIN END EPI QUALITY
93
Patent #:
Issue Dt:
08/23/2016
Application #:
14633351
Filing Dt:
02/27/2015
Publication #:
Pub Dt:
09/01/2016
Title:
INTEGRATED CIRCUITS WITH FETS HAVING NANOWIRES AND METHODS OF MANUFACTURING THE SAME
94
Patent #:
Issue Dt:
08/08/2017
Application #:
14633477
Filing Dt:
02/27/2015
Publication #:
Pub Dt:
09/03/2015
Title:
METHOD AND APPARATUS FOR PHYSICAL-AWARE HOLD VIOLATION FIXING
95
Patent #:
Issue Dt:
01/17/2017
Application #:
14633544
Filing Dt:
02/27/2015
Publication #:
Pub Dt:
09/01/2016
Title:
METHODS OF PERFORMING FIN CUT ETCH PROCESSES FOR FINFET SEMICONDUCTOR DEVICES AND THE RESULTING DEVICES
96
Patent #:
Issue Dt:
12/13/2016
Application #:
14633914
Filing Dt:
02/27/2015
Publication #:
Pub Dt:
09/01/2016
Title:
INTEGRATED CIRCUITS AND METHODS FOR FABRICATING INTEGRATED CIRCUITS WITH SELF-ALIGNED VIAS
97
Patent #:
Issue Dt:
06/07/2016
Application #:
14633998
Filing Dt:
02/27/2015
Title:
LOW LINE RESISTIVITY AND REPEATABLE METAL RECESS USING CVD COBALT REFLOW
98
Patent #:
Issue Dt:
01/24/2017
Application #:
14634483
Filing Dt:
02/27/2015
Publication #:
Pub Dt:
09/01/2016
Title:
CO-FABRICATION OF NON-PLANAR SEMICONDUCTOR DEVICES HAVING DIFFERENT THRESHOLD VOLTAGES
99
Patent #:
Issue Dt:
09/04/2018
Application #:
14634535
Filing Dt:
02/27/2015
Publication #:
Pub Dt:
09/03/2015
Title:
THIN NIB OR COB CAPPING LAYER FOR NON-NOBLE METALLIC BONDING LANDING PADS
100
Patent #:
NONE
Issue Dt:
Application #:
14634978
Filing Dt:
03/02/2015
Publication #:
Pub Dt:
09/08/2016
Title:
COIL INDUCTOR
Assignor
1
Exec Dt:
11/27/2018
Assignee
1
1100 NORTH MARKET STREET
WILMINGTON, DELAWARE 19801
Correspondence name and address
CT CORPORATION
4400 EASTON COMMONS WAY
SUITE 125
COLUMBUS, OH 43219

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