skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:049490/0001   Pages: 892
Recorded: 11/29/2018
Conveyance: SECURITY AGREEMENT
Total properties: 13706
Page 123 of 138
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138
1
Patent #:
10134577
Issue Dt:
11/20/2018
Application #:
14718747
Filing Dt:
05/21/2015
Publication #:
US20160343564
Pub Dt:
11/24/2016
Title:
EDGE TRIM PROCESSES AND RESULTANT STRUCTURES
2
Patent #:
9514995
Issue Dt:
12/06/2016
Application #:
14718760
Filing Dt:
05/21/2015
Publication #:
US20160343623
Pub Dt:
11/24/2016
Title:
IMPLANT-FREE PUNCH THROUGH DOPING LAYER FORMATION FOR BULK FINFET STRUCTURES
3
Patent #:
9613181
Issue Dt:
04/04/2017
Application #:
14719424
Filing Dt:
05/22/2015
Publication #:
US20150349120
Pub Dt:
12/03/2015
Title:
SEMICONDUCTOR DEVICE STRUCTURE INCLUDING ACTIVE REGION HAVING AN EXTENSION PORTION
4
Patent #:
9484430
Issue Dt:
11/01/2016
Application #:
14720328
Filing Dt:
05/22/2015
Publication #:
US20150255574
Pub Dt:
09/10/2015
Title:
BACK-END TRANSISTORS WITH HIGHLY DOPED LOW-TEMPERATURE CONTACTS
5
Patent #:
10062618
Issue Dt:
08/28/2018
Application #:
14721402
Filing Dt:
05/26/2015
Publication #:
US20160351453
Pub Dt:
12/01/2016
Title:
METHOD AND STRUCTURE FOR FORMATION OF REPLACEMENT METAL GATE FIELD EFFECT TRANSISTORS
6
Patent #:
9791849
Issue Dt:
10/17/2017
Application #:
14722074
Filing Dt:
05/26/2015
Publication #:
US20160349735
Pub Dt:
12/01/2016
Title:
DEFECT DETECTION PROCESS IN A SEMICONDUCTOR MANUFACTURING ENVIRONMENT
7
Patent #:
9362230
Issue Dt:
06/07/2016
Application #:
14722302
Filing Dt:
05/27/2015
Title:
METHODS TO FORM CONDUCTIVE THIN FILM STRUCTURES
8
Patent #:
9397003
Issue Dt:
07/19/2016
Application #:
14722818
Filing Dt:
05/27/2015
Title:
METHOD FOR FORMING SOURCE/DRAIN CONTACTS DURING CMOS INTEGRATION USING CONFINED EPITAXIAL GROWTH TECHNIQUES
9
Patent #:
9379135
Issue Dt:
06/28/2016
Application #:
14723681
Filing Dt:
05/28/2015
Publication #:
US20150263046
Pub Dt:
09/17/2015
Title:
FINFET SEMICONDUCTOR DEVICE HAVING INCREASED GATE HEIGHT CONTROL
10
Patent #:
9847213
Issue Dt:
12/19/2017
Application #:
14723703
Filing Dt:
05/28/2015
Publication #:
US20150262795
Pub Dt:
09/17/2015
Title:
VACUUM TRAP
11
Patent #:
9406717
Issue Dt:
08/02/2016
Application #:
14725151
Filing Dt:
05/29/2015
Publication #:
US20150263064
Pub Dt:
09/17/2015
Title:
PASSIVATION OF BACK-ILLUMINATED IMAGE SENSOR
12
Patent #:
9431507
Issue Dt:
08/30/2016
Application #:
14725392
Filing Dt:
05/29/2015
Publication #:
US20150263120
Pub Dt:
09/17/2015
Title:
REPLACEMENT GATE STRUCTURE WITH LOW-K SIDEWALL SPACER FOR SEMICONDUCTOR DEVICES
13
Patent #:
9343371
Issue Dt:
05/17/2016
Application #:
14725552
Filing Dt:
05/29/2015
Title:
FABRICATING FIN STRUCTURES WITH DOPED MIDDLE PORTIONS
14
Patent #:
9391144
Issue Dt:
07/12/2016
Application #:
14725581
Filing Dt:
05/29/2015
Publication #:
US20150287790
Pub Dt:
10/08/2015
Title:
SELECTIVE GALLIUM NITRIDE REGROWTH ON (100) SILICON
15
Patent #:
9318388
Issue Dt:
04/19/2016
Application #:
14725663
Filing Dt:
05/29/2015
Publication #:
US20150294912
Pub Dt:
10/15/2015
Title:
METHODS OF FORMING SUBSTANTIALLY SELF-ALIGNED ISOLATION REGIONS ON FINFET SEMICONDUCTOR DEVICES AND THE RESULTING DEVICES
16
Patent #:
9391180
Issue Dt:
07/12/2016
Application #:
14725755
Filing Dt:
05/29/2015
Publication #:
US20150263129
Pub Dt:
09/17/2015
Title:
HETEROJUNCTION BIPOLAR TRANSISTORS WITH INTRINSIC INTERLAYERS
17
Patent #:
9779960
Issue Dt:
10/03/2017
Application #:
14726712
Filing Dt:
06/01/2015
Publication #:
US20160351411
Pub Dt:
12/01/2016
Title:
HYBRID FIN CUTTING PROCESSES FOR FINFET SEMICONDUCTOR DEVICES
18
Patent #:
9602271
Issue Dt:
03/21/2017
Application #:
14726945
Filing Dt:
06/01/2015
Publication #:
US20160352500
Pub Dt:
12/01/2016
Title:
SUB-NANOSECOND DISTRIBUTED CLOCK SYNCHRONIZATION USING ALIGNMENT MARKER IN ETHERNET IEEE 1588 PROTOCOL
19
Patent #:
9437496
Issue Dt:
09/06/2016
Application #:
14727219
Filing Dt:
06/01/2015
Title:
MERGED SOURCE DRAIN EPITAXY
20
Patent #:
9536990
Issue Dt:
01/03/2017
Application #:
14727458
Filing Dt:
06/01/2015
Publication #:
US20160351681
Pub Dt:
12/01/2016
Title:
METHODS OF FORMING REPLACEMENT FINS FOR A FINFET DEVICE USING A TARGETED THICKNESS FOR THE PATTERNED FIN ETCH MASK
21
Patent #:
9928335
Issue Dt:
03/27/2018
Application #:
14728100
Filing Dt:
06/02/2015
Publication #:
US20160357898
Pub Dt:
12/08/2016
Title:
DESIGN OF TEMPERATURE-COMPLIANT INTEGRATED CIRCUITS
22
Patent #:
9576894
Issue Dt:
02/21/2017
Application #:
14729188
Filing Dt:
06/03/2015
Publication #:
US20160358851
Pub Dt:
12/08/2016
Title:
INTEGRATED CIRCUITS INCLUDING ORGANIC INTERLAYER DIELECTRIC LAYERS AND METHODS FOR FABRICATING THE SAME
23
Patent #:
9865546
Issue Dt:
01/09/2018
Application #:
14729298
Filing Dt:
06/03/2015
Publication #:
US20160358860
Pub Dt:
12/08/2016
Title:
CONTACTS TO SEMICONDUCTOR SUBSTRATE AND METHODS OF FORMING SAME
24
Patent #:
9553017
Issue Dt:
01/24/2017
Application #:
14729342
Filing Dt:
06/03/2015
Publication #:
US20160218034
Pub Dt:
07/28/2016
Title:
METHODS FOR FABRICATING INTEGRATED CIRCUITS INCLUDING BACK-END-OF-THE-LINE INTERCONNECT STRUCTURES
25
Patent #:
9443776
Issue Dt:
09/13/2016
Application #:
14729446
Filing Dt:
06/03/2015
Publication #:
US20150262899
Pub Dt:
09/17/2015
Title:
METHOD AND STRUCTURE FOR DETERMINING THERMAL CYCLE RELIABILITY
26
Patent #:
9754941
Issue Dt:
09/05/2017
Application #:
14729845
Filing Dt:
06/03/2015
Publication #:
US20160358922
Pub Dt:
12/08/2016
Title:
METHOD AND STRUCTURE TO FORM TENSILE STRAINED SIGE FINS AND COMPRESSIVE STRAINED SIGE FINS ON A SAME SUBSTRATE
27
Patent #:
9768325
Issue Dt:
09/19/2017
Application #:
14730294
Filing Dt:
06/04/2015
Publication #:
US20160359056
Pub Dt:
12/08/2016
Title:
DIODES AND FABRICATION METHODS THEREOF
28
Patent #:
9496341
Issue Dt:
11/15/2016
Application #:
14730320
Filing Dt:
06/04/2015
Publication #:
US20160359001
Pub Dt:
12/08/2016
Title:
SILICON GERMANIUM FIN
29
Patent #:
9483782
Issue Dt:
11/01/2016
Application #:
14730375
Filing Dt:
06/04/2015
Publication #:
US20150269640
Pub Dt:
09/24/2015
Title:
Automating Capacity Upgrade on Demand
30
Patent #:
10058388
Issue Dt:
08/28/2018
Application #:
14730503
Filing Dt:
06/04/2015
Publication #:
US20150265351
Pub Dt:
09/24/2015
Title:
Laser Surgical Apparatus and Methods of its Use Minimizing Damage During the Ablation of Tissue Using a Focused Ultrashort Pulsed Laser Beam Wherein the Slope of Fluence Breakdown is a Function of the Pulse Width
31
Patent #:
9391174
Issue Dt:
07/12/2016
Application #:
14730735
Filing Dt:
06/04/2015
Title:
METHOD OF UNIFORM FIN RECESSING USING ISOTROPIC ETCH
32
Patent #:
9543216
Issue Dt:
01/10/2017
Application #:
14731480
Filing Dt:
06/05/2015
Publication #:
US20160358826
Pub Dt:
12/08/2016
Title:
INTEGRATION OF HYBRID GERMANIUM AND GROUP III-V CONTACT EPILAYER IN CMOS
33
Patent #:
9711503
Issue Dt:
07/18/2017
Application #:
14731569
Filing Dt:
06/05/2015
Publication #:
US20150270262
Pub Dt:
09/24/2015
Title:
GATE STRUCTURES WITH PROTECTED END SURFACES TO ELIMINATE OR REDUCE UNWANTED EPI MATERIAL GROWTH
34
Patent #:
9331202
Issue Dt:
05/03/2016
Application #:
14731876
Filing Dt:
06/05/2015
Publication #:
US20150364595
Pub Dt:
12/17/2015
Title:
REPLACEMENT GATE STRUCTURE ON FINFET DEVICES WITH REDUCED SIZE FIN IN THE CHANNEL REGION
35
Patent #:
9780178
Issue Dt:
10/03/2017
Application #:
14731960
Filing Dt:
06/05/2015
Publication #:
US20160359009
Pub Dt:
12/08/2016
Title:
METHODS OF FORMING A GATE CONTACT ABOVE AN ACTIVE REGION OF A SEMICONDUCTOR DEVICE
36
Patent #:
10546854
Issue Dt:
01/28/2020
Application #:
14732038
Filing Dt:
06/05/2015
Publication #:
US20160358908
Pub Dt:
12/08/2016
Title:
METHODS OF FORMING V0 STRUCTURES FOR SEMICONDUCTOR DEVICES BY FORMING A PROTECTION LAYER WITH A NON-UNIFORM THICKNESS
37
Patent #:
9412660
Issue Dt:
08/09/2016
Application #:
14732078
Filing Dt:
06/05/2015
Title:
METHODS OF FORMING V0 STRUCTURES FOR SEMICONDUCTOR DEVICES THAT INCLUDES RECESSING A CONTACT STRUCTURE
38
Patent #:
9368420
Issue Dt:
06/14/2016
Application #:
14732689
Filing Dt:
06/06/2015
Publication #:
US20150270187
Pub Dt:
09/24/2015
Title:
FLEXIBLE, STRETCHABLE ELECTRONIC DEVICES
39
Patent #:
9590001
Issue Dt:
03/07/2017
Application #:
14732835
Filing Dt:
06/08/2015
Publication #:
US20150303229
Pub Dt:
10/22/2015
Title:
CMOS PROTECTION DURING GERMANIUM PHOTODETECTOR PROCESSING
40
Patent #:
9708508
Issue Dt:
07/18/2017
Application #:
14733235
Filing Dt:
06/08/2015
Publication #:
US20150267084
Pub Dt:
09/24/2015
Title:
SLURRY FOR CHEMICAL-MECHANICAL POLISHING OF METALS AND USE THEREOF
41
Patent #:
9716036
Issue Dt:
07/25/2017
Application #:
14733398
Filing Dt:
06/08/2015
Publication #:
US20160358852
Pub Dt:
12/08/2016
Title:
ELECTRONIC DEVICE INCLUDING MOAT POWER METALLIZATION IN TRENCH
42
Patent #:
9812359
Issue Dt:
11/07/2017
Application #:
14733445
Filing Dt:
06/08/2015
Publication #:
US20160358821
Pub Dt:
12/08/2016
Title:
THRU-SILICON-VIA STRUCTURES
43
Patent #:
9977002
Issue Dt:
05/22/2018
Application #:
14734018
Filing Dt:
06/09/2015
Publication #:
US20150268206
Pub Dt:
09/24/2015
Title:
NANOPOROUS STRUCTURES BY REACTIVE ION ETCHING
44
Patent #:
9276002
Issue Dt:
03/01/2016
Application #:
14734310
Filing Dt:
06/09/2015
Publication #:
US20150294973
Pub Dt:
10/15/2015
Title:
INTEGRATED CIRCUIT STRUCTURE WITH BULK SILICON FINFET
45
Patent #:
9501607
Issue Dt:
11/22/2016
Application #:
14734411
Filing Dt:
06/09/2015
Publication #:
US20160364516
Pub Dt:
12/15/2016
Title:
COMPOSITE VIEWS FOR IP BLOCKS IN ASIC DESIGNS
46
Patent #:
9601200
Issue Dt:
03/21/2017
Application #:
14734504
Filing Dt:
06/09/2015
Publication #:
US20160365146
Pub Dt:
12/15/2016
Title:
TCAM STRUCTURES WITH REDUCED POWER SUPPLY NOISE
47
Patent #:
9570155
Issue Dt:
02/14/2017
Application #:
14734525
Filing Dt:
06/09/2015
Publication #:
US20160365139
Pub Dt:
12/15/2016
Title:
CIRCUIT TO IMPROVE SRAM STABILITY
48
Patent #:
9240448
Issue Dt:
01/19/2016
Application #:
14734713
Filing Dt:
06/09/2015
Publication #:
US20150311283
Pub Dt:
10/29/2015
Title:
BIPOLAR JUNCTION TRANSISTORS WITH REDUCED BASE-COLLECTOR JUNCTION CAPACITANCE
49
Patent #:
9853128
Issue Dt:
12/26/2017
Application #:
14735283
Filing Dt:
06/10/2015
Publication #:
US20160365451
Pub Dt:
12/15/2016
Title:
DEVICES AND METHODS OF FORMING UNMERGED EPITAXY FOR FINFET DEVICE
50
Patent #:
9613958
Issue Dt:
04/04/2017
Application #:
14735984
Filing Dt:
06/10/2015
Publication #:
US20160365346
Pub Dt:
12/15/2016
Title:
SPACER CHAMFERING GATE STACK SCHEME
51
Patent #:
9257433
Issue Dt:
02/09/2016
Application #:
14736695
Filing Dt:
06/11/2015
Publication #:
US20150279843
Pub Dt:
10/01/2015
Title:
STRUCTURE AND METHOD OF FORMING ENHANCED ARRAY DEVICE ISOLATION FOR IMPLANTED PLATE EDRAM
52
Patent #:
9401312
Issue Dt:
07/26/2016
Application #:
14736769
Filing Dt:
06/11/2015
Title:
TSV REDUNDANCY SCHEME AND ARCHITECTURE USING DECODER/ENCODER
53
Patent #:
9337436
Issue Dt:
05/10/2016
Application #:
14736942
Filing Dt:
06/11/2015
Publication #:
US20150280157
Pub Dt:
10/01/2015
Title:
TRANSFERABLE TRANSPARENT CONDUCTIVE OXIDE
54
Patent #:
9595478
Issue Dt:
03/14/2017
Application #:
14737551
Filing Dt:
06/12/2015
Publication #:
US20160365288
Pub Dt:
12/15/2016
Title:
DUMMY GATE USED AS INTERCONNECTION AND METHOD OF MAKING THE SAME
55
Patent #:
9676075
Issue Dt:
06/13/2017
Application #:
14737915
Filing Dt:
06/12/2015
Publication #:
US20160361791
Pub Dt:
12/15/2016
Title:
METHODS AND STRUCTURES FOR ACHIEVING TARGET RESISTANCE POST CMP USING IN-SITU RESISTANCE MEASUREMENTS
56
Patent #:
9361921
Issue Dt:
06/07/2016
Application #:
14738025
Filing Dt:
06/12/2015
Publication #:
US20150279397
Pub Dt:
10/01/2015
Title:
TAPE SERVO TRACK WRITE COMPENSATION
57
Patent #:
9553092
Issue Dt:
01/24/2017
Application #:
14738288
Filing Dt:
06/12/2015
Publication #:
US20160365347
Pub Dt:
12/15/2016
Title:
ALTERNATIVE THRESHOLD VOLTAGE SCHEME VIA DIRECT METAL GATE PATTERNING FOR HIGH PERFORMANCE CMOS FinFETs
58
Patent #:
9530843
Issue Dt:
12/27/2016
Application #:
14738336
Filing Dt:
06/12/2015
Publication #:
US20150279936
Pub Dt:
10/01/2015
Title:
FINFET HAVING AN EPITAXIALLY GROWN SEMICONDUCTOR ON THE FIN IN THE CHANNEL REGION
59
Patent #:
9953117
Issue Dt:
04/24/2018
Application #:
14738355
Filing Dt:
06/12/2015
Publication #:
US20150278412
Pub Dt:
10/01/2015
Title:
PLANNING ECONOMIC ENERGY DISPATCH IN ELECTRICAL GRID UNDER UNCERTAINTY
60
Patent #:
9431494
Issue Dt:
08/30/2016
Application #:
14739137
Filing Dt:
06/15/2015
Publication #:
US20150311302
Pub Dt:
10/29/2015
Title:
LOW INTERFACIAL DEFECT FIELD EFFECT TRANSISTOR
61
Patent #:
10134840
Issue Dt:
11/20/2018
Application #:
14739543
Filing Dt:
06/15/2015
Publication #:
US20160365411
Pub Dt:
12/15/2016
Title:
SERIES RESISTANCE REDUCTION IN VERTICALLY STACKED SILICON NANOWIRE TRANSISTORS
62
Patent #:
9653571
Issue Dt:
05/16/2017
Application #:
14739662
Filing Dt:
06/15/2015
Publication #:
US20160365425
Pub Dt:
12/15/2016
Title:
FREESTANDING SPACER HAVING SUB-LITHOGRAPHIC LATERAL DIMENSION AND METHOD OF FORMING SAME
63
Patent #:
9332628
Issue Dt:
05/03/2016
Application #:
14739703
Filing Dt:
06/15/2015
Publication #:
US20150289361
Pub Dt:
10/08/2015
Title:
MICROELECTRONIC STRUCTURE INCLUDING AIR GAP
64
Patent #:
9741610
Issue Dt:
08/22/2017
Application #:
14740035
Filing Dt:
06/15/2015
Publication #:
US20160365277
Pub Dt:
12/15/2016
Title:
SACRIFICIAL AMORPHOUS SILICON HARD MASK FOR BEOL
65
Patent #:
9728615
Issue Dt:
08/08/2017
Application #:
14740872
Filing Dt:
06/16/2015
Publication #:
US20160372559
Pub Dt:
12/22/2016
Title:
FIN SHAPE CONTACTS AND METHODS FOR FORMING FIN SHAPE CONTACTS
66
Patent #:
9564372
Issue Dt:
02/07/2017
Application #:
14740987
Filing Dt:
06/16/2015
Publication #:
US20160372380
Pub Dt:
12/22/2016
Title:
DUAL LINER SILICIDE
67
Patent #:
9368506
Issue Dt:
06/14/2016
Application #:
14741528
Filing Dt:
06/17/2015
Publication #:
US20150333080
Pub Dt:
11/19/2015
Title:
INTEGRATED CIRCUITS AND METHODS FOR OPERATING INTEGRATED CIRCUITS WITH NON-VOLATILE MEMORY
68
Patent #:
9496234
Issue Dt:
11/15/2016
Application #:
14741802
Filing Dt:
06/17/2015
Title:
WAFER-LEVEL CHIP-SCALE PACKAGE STRUCTURE UTILIZING CONDUCTIVE POLYMER
69
Patent #:
9337022
Issue Dt:
05/10/2016
Application #:
14742471
Filing Dt:
06/17/2015
Title:
VIRTUAL RELAXED SUBSTRATE ON EDGE-RELAXED COMPOSITE SEMICONDUCTOR PILLARS
70
Patent #:
9385126
Issue Dt:
07/05/2016
Application #:
14742537
Filing Dt:
06/17/2015
Publication #:
US20150287727
Pub Dt:
10/08/2015
Title:
SILICON-ON-INSULATOR FINFET WITH BULK SOURCE AND DRAIN
71
Patent #:
9639645
Issue Dt:
05/02/2017
Application #:
14742801
Filing Dt:
06/18/2015
Publication #:
US20160371413
Pub Dt:
12/22/2016
Title:
INTEGRATED CIRCUIT CHIP RELIABILITY USING RELIABILITY-OPTIMIZED FAILURE MECHANISM TARGETING
72
Patent #:
10103060
Issue Dt:
10/16/2018
Application #:
14742895
Filing Dt:
06/18/2015
Publication #:
US20160372389
Pub Dt:
12/22/2016
Title:
TEST STRUCTURES FOR DIELECTRIC RELIABILITY EVALUATIONS
73
Patent #:
9941179
Issue Dt:
04/10/2018
Application #:
14742917
Filing Dt:
06/18/2015
Publication #:
US20160370311
Pub Dt:
12/22/2016
Title:
CAPACITIVE MEASUREMENTS OF DIVOTS IN SEMICONDUCTOR DEVICES
74
Patent #:
9437588
Issue Dt:
09/06/2016
Application #:
14742935
Filing Dt:
06/18/2015
Title:
MIDDLE-OF-LINE ARCHITECTURE FOR DENSE LIBRARY LAYOUT USING M0 HAND-SHAKE
75
Patent #:
9299590
Issue Dt:
03/29/2016
Application #:
14743030
Filing Dt:
06/18/2015
Title:
INTEGRATED MICRO-PELTIER COOLING COMPONENTS IN SILICON-ON-INSULATOR (SOI) LAYERS
76
Patent #:
10103068
Issue Dt:
10/16/2018
Application #:
14743208
Filing Dt:
06/18/2015
Publication #:
US20160370421
Pub Dt:
12/22/2016
Title:
DETECTING A VOID BETWEEN A VIA AND A WIRING LINE
77
Patent #:
9508560
Issue Dt:
11/29/2016
Application #:
14743511
Filing Dt:
06/18/2015
Publication #:
US20160372334
Pub Dt:
12/22/2016
Title:
SiARC REMOVAL WITH PLASMA ETCH AND FLUORINATED WET CHEMICAL SOLUTION COMBINATION
78
Patent #:
9892979
Issue Dt:
02/13/2018
Application #:
14744198
Filing Dt:
06/19/2015
Publication #:
US20160372385
Pub Dt:
12/22/2016
Title:
NON-DESTRUCTIVE DIELECTRIC LAYER THICKNESS AND DOPANT MEASURING METHOD
79
Patent #:
9779783
Issue Dt:
10/03/2017
Application #:
14744800
Filing Dt:
06/19/2015
Publication #:
US20160372164
Pub Dt:
12/22/2016
Title:
LATCHING CURRENT SENSING AMPLIFIER FOR MEMORY ARRAY
80
Patent #:
9685553
Issue Dt:
06/20/2017
Application #:
14745547
Filing Dt:
06/22/2015
Publication #:
US20160372598
Pub Dt:
12/22/2016
Title:
GENERATING TENSILE STRAIN IN BULK FINFET CHANNEL
81
Patent #:
10446644
Issue Dt:
10/15/2019
Application #:
14745704
Filing Dt:
06/22/2015
Publication #:
US20160372582
Pub Dt:
12/22/2016
Title:
DEVICE STRUCTURES FOR A SILICON-ON-INSULATOR SUBSTRATE WITH A HIGH-RESISTANCE HANDLE WAFER
82
Patent #:
9728603
Issue Dt:
08/08/2017
Application #:
14745764
Filing Dt:
06/22/2015
Publication #:
US20160372548
Pub Dt:
12/22/2016
Title:
BIPOLAR JUNCTION TRANSISTORS WITH DOUBLE-TAPERED EMITTER FINGERS
83
Patent #:
NONE
Issue Dt:
Application #:
14745800
Filing Dt:
06/22/2015
Publication #:
US20160372396
Pub Dt:
12/22/2016
Title:
CHIP PACKAGE WITH REDUCED TEMPERATURE VARIATION HAVING EMITTER FINGERS FORMATION ACCORDING TO THEIR PROXIMITY TO THE THERMAL PATHWAY STRUCTURE AND A METHOD FOR FORMING A SAME
84
Patent #:
9461042
Issue Dt:
10/04/2016
Application #:
14746017
Filing Dt:
06/22/2015
Publication #:
US20150287721
Pub Dt:
10/08/2015
Title:
SUBLITHOGRAPHIC WIDTH FINFET EMPLOYING SOLID PHASE EPITAXY
85
Patent #:
9576899
Issue Dt:
02/21/2017
Application #:
14746891
Filing Dt:
06/23/2015
Publication #:
US20160379930
Pub Dt:
12/29/2016
Title:
ELECTRICAL FUSE WITH HIGH OFF RESISTANCE
86
Patent #:
9496377
Issue Dt:
11/15/2016
Application #:
14747525
Filing Dt:
06/23/2015
Publication #:
US20150311324
Pub Dt:
10/29/2015
Title:
SELF-ALIGNED EMITTER-BASE-COLLECTOR BIPOLAR JUNCTION TRANSISTORS WITH A SINGLE CRYSTAL RAISED EXTRINSIC BASE
87
Patent #:
9425269
Issue Dt:
08/23/2016
Application #:
14747604
Filing Dt:
06/23/2015
Title:
REPLACEMENT EMITTER FOR REDUCED CONTACT RESISTANCE
88
Patent #:
9722057
Issue Dt:
08/01/2017
Application #:
14747668
Filing Dt:
06/23/2015
Publication #:
US20160380088
Pub Dt:
12/29/2016
Title:
BIPOLAR JUNCTION TRANSISTORS WITH A BURIED DIELECTRIC REGION IN THE ACTIVE DEVICE REGION
89
Patent #:
9530798
Issue Dt:
12/27/2016
Application #:
14748355
Filing Dt:
06/24/2015
Publication #:
US20160379999
Pub Dt:
12/29/2016
Title:
HIGH PERFORMANCE HEAT SHIELDS WITH REDUCED CAPACITANCE
90
Patent #:
9582621
Issue Dt:
02/28/2017
Application #:
14748595
Filing Dt:
06/24/2015
Publication #:
US20160378897
Pub Dt:
12/29/2016
Title:
MODELING LOCALIZED TEMPERATURE CHANGES ON AN INTEGRATED CIRCUIT CHIP USING THERMAL POTENTIAL THEORY
91
Patent #:
9691971
Issue Dt:
06/27/2017
Application #:
14749165
Filing Dt:
06/24/2015
Publication #:
US20160190207
Pub Dt:
06/30/2016
Title:
INTEGRATED CIRCUITS INCLUDING MAGNETIC TUNNEL JUNCTIONS FOR MAGNETORESISTIVE RANDOM-ACCESS MEMORY AND METHODS FOR FABRICATING THE SAME
92
Patent #:
9287180
Issue Dt:
03/15/2016
Application #:
14749245
Filing Dt:
06/24/2015
Publication #:
US20150294915
Pub Dt:
10/15/2015
Title:
INTEGRATED CIRCUITS HAVING FINFETS WITH IMPROVED DOPED CHANNEL REGIONS AND METHODS FOR FABRICATING SAME
93
Patent #:
9368608
Issue Dt:
06/14/2016
Application #:
14749809
Filing Dt:
06/25/2015
Title:
HETEROJUNCTION BIPOLAR TRANSISTOR WITH IMPROVED PERFORMANCE AND BREAKDOWN VOLTAGE
94
Patent #:
9673091
Issue Dt:
06/06/2017
Application #:
14749817
Filing Dt:
06/25/2015
Publication #:
US20160379878
Pub Dt:
12/29/2016
Title:
STRUCTURE FOR BEOL METAL LEVELS WITH MULTIPLE DIELECTRIC LAYERS FOR IMPROVED DIELECTRIC TO METAL ADHESION
95
Patent #:
9536784
Issue Dt:
01/03/2017
Application #:
14749843
Filing Dt:
06/25/2015
Publication #:
US20160379883
Pub Dt:
12/29/2016
Title:
INTEGRATED CIRCUIT (IC) CHIPS WITH THROUGH SILICON VIAS (TSV) AND METHOD OF FORMING THE IC
96
Patent #:
9606291
Issue Dt:
03/28/2017
Application #:
14749907
Filing Dt:
06/25/2015
Publication #:
US20160377806
Pub Dt:
12/29/2016
Title:
MULTILEVEL WAVEGUIDE STRUCTURE
97
Patent #:
9690898
Issue Dt:
06/27/2017
Application #:
14749909
Filing Dt:
06/25/2015
Publication #:
US20160378902
Pub Dt:
12/29/2016
Title:
GENERATIVE LEARNING FOR REALISTIC AND GROUND RULE CLEAN HOT SPOT SYNTHESIS
98
Patent #:
9748270
Issue Dt:
08/29/2017
Application #:
14750236
Filing Dt:
06/25/2015
Publication #:
US20160379993
Pub Dt:
12/29/2016
Title:
TUNABLE CAPACITOR FOR FDSOI APPLICATIONS
99
Patent #:
9558995
Issue Dt:
01/31/2017
Application #:
14750741
Filing Dt:
06/25/2015
Publication #:
US20160379873
Pub Dt:
12/29/2016
Title:
HDP FILL WITH REDUCED VOID FORMATION AND SPACER DAMAGE
100
Patent #:
9519747
Issue Dt:
12/13/2016
Application #:
14751222
Filing Dt:
06/26/2015
Publication #:
US20160378903
Pub Dt:
12/29/2016
Title:
DYNAMIC AND ADAPTIVE TIMING SENSITIVITY DURING STATIC TIMING ANALYSIS USING LOOK-UP TABLE
Assignor
1
GLOBALFOUNDRIES INC.
Exec Dt:
11/27/2018
Assignee
1
WILMINGTON TRUST, NATIONAL ASSOCIATION
1100 NORTH MARKET STREET
WILMINGTON, DELAWARE 19801
Correspondence name and address
CT CORPORATION
4400 EASTON COMMONS WAY
SUITE 125
COLUMBUS, OH 43219

Search Results as of: 05/08/2024 06:56 AM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT