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Reel/Frame:049490/0001   Pages: 892
Recorded: 11/29/2018
Conveyance: SECURITY AGREEMENT
Total properties: 13706
Page 26 of 138
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138
1
Patent #:
7646649
Issue Dt:
01/12/2010
Application #:
10707053
Filing Dt:
11/18/2003
Publication #:
US20050108468
Pub Dt:
05/19/2005
Title:
MEMORY DEVICE WITH PROGRAMMABLE RECEIVERS TO IMPROVE PERFORMANCE
2
Patent #:
7170181
Issue Dt:
01/30/2007
Application #:
10707064
Filing Dt:
11/19/2003
Publication #:
US20050104188
Pub Dt:
05/19/2005
Title:
OPTIMUM PADSET FOR WIRE BONDING RF TECHNOLOGIES WITH HIGH-Q INDUCTORS
3
Patent #:
7129561
Issue Dt:
10/31/2006
Application #:
10707065
Filing Dt:
11/19/2003
Publication #:
US20050104157
Pub Dt:
05/19/2005
Title:
TRI-METAL AND DUAL-METAL STACKED INDUCTORS
4
Patent #:
6940324
Issue Dt:
09/06/2005
Application #:
10707121
Filing Dt:
11/21/2003
Publication #:
US20050110534
Pub Dt:
05/26/2005
Title:
VARIATION OF EFFECTIVE FILTER CAPACITANCE IN PHASE LOCK LOOP CIRCUIT LOOP FILTERS
5
Patent #:
7122462
Issue Dt:
10/17/2006
Application #:
10707122
Filing Dt:
11/21/2003
Publication #:
US20050112864
Pub Dt:
05/26/2005
Title:
BACK END INTERCONNECT WITH A SHAPED INTERFACE
6
Patent #:
6989322
Issue Dt:
01/24/2006
Application #:
10707175
Filing Dt:
11/25/2003
Publication #:
US20050112857
Pub Dt:
05/26/2005
Title:
METHOD OF FORMING ULTRA-THIN SILICIDATION-STOP EXTENSIONS IN MOSFET DEVICES
7
Patent #:
7106164
Issue Dt:
09/12/2006
Application #:
10707283
Filing Dt:
12/03/2003
Publication #:
US20050122204
Pub Dt:
06/09/2005
Title:
APPARATUS AND METHOD FOR ELECTRONIC FUSE WITH IMPROVED ESD TOLERANCE
8
Patent #:
7240261
Issue Dt:
07/03/2007
Application #:
10707373
Filing Dt:
12/09/2003
Publication #:
US20050138508
Pub Dt:
06/23/2005
Title:
SCAN CHAIN DIAGNOSTICS USING LOGIC PATHS
9
Patent #:
7391620
Issue Dt:
06/24/2008
Application #:
10707479
Filing Dt:
12/17/2003
Publication #:
US20040207989
Pub Dt:
10/21/2004
Title:
SYSTEM FOR IMPROVING POWER DISTRIBUTION CURRENT MEASUREMENT ON PRINTED CIRCUIT BOARDS
10
Patent #:
7247912
Issue Dt:
07/24/2007
Application #:
10707690
Filing Dt:
01/05/2004
Publication #:
US20050145954
Pub Dt:
07/07/2005
Title:
STRUCTURES AND METHODS FOR MAKING STRAINED MOSFETS
11
Patent #:
7119401
Issue Dt:
10/10/2006
Application #:
10707722
Filing Dt:
01/07/2004
Publication #:
US20050151223
Pub Dt:
07/14/2005
Title:
TUNABLE SEMICONDUCTOR DIODES
12
Patent #:
7056794
Issue Dt:
06/06/2006
Application #:
10707757
Filing Dt:
01/09/2004
Publication #:
US20050153530
Pub Dt:
07/14/2005
Title:
FET GATE STRUCTURE WITH METAL GATE ELECTRODE AND SILICIDE CONTACT
13
Patent #:
7315990
Issue Dt:
01/01/2008
Application #:
10707776
Filing Dt:
01/12/2004
Publication #:
US20050155008
Pub Dt:
07/14/2005
Title:
METHOD AND SYSTEM FOR CREATING, VIEWING, EDITING, AND SHARING OUTPUT FROM A DESIGN CHECKING SYSTEM
14
Patent #:
6987316
Issue Dt:
01/17/2006
Application #:
10707810
Filing Dt:
01/14/2004
Publication #:
US20050151241
Pub Dt:
07/14/2005
Title:
MULTILAYER CERAMIC SUBSTRATE WITH SINGLE VIA ANCHORED PAD AND METHOD OF FORMING
15
Patent #:
7118999
Issue Dt:
10/10/2006
Application #:
10707842
Filing Dt:
01/16/2004
Publication #:
US20050158955
Pub Dt:
07/21/2005
Title:
METHOD AND APPARATUS TO INCREASE STRAIN EFFECT IN A TRANSISTOR CHANNEL
16
Patent #:
7207096
Issue Dt:
04/24/2007
Application #:
10707896
Filing Dt:
01/22/2004
Publication #:
US20050160575
Pub Dt:
07/28/2005
Title:
Method of manufacturing high performance copper inductors with bond pads
17
Patent #:
7138691
Issue Dt:
11/21/2006
Application #:
10707897
Filing Dt:
01/22/2004
Publication #:
US20050164444
Pub Dt:
07/28/2005
Title:
SELECTIVE NITRIDATION OF GATE OXIDES
18
Patent #:
7229722
Issue Dt:
06/12/2007
Application #:
10707962
Filing Dt:
01/28/2004
Publication #:
US20050166175
Pub Dt:
07/28/2005
Title:
ALTERNATING PHASE SHIFT MASK DESIGN FOR HIGH PERFORMANCE CIRCUITRY
19
Patent #:
7061304
Issue Dt:
06/13/2006
Application #:
10707963
Filing Dt:
01/28/2004
Publication #:
US20050162799
Pub Dt:
07/28/2005
Title:
FUSE LATCH WITH COMPENSATED PROGRAMMABLE RESISTIVE TRIP POINT
20
Patent #:
7224029
Issue Dt:
05/29/2007
Application #:
10707964
Filing Dt:
01/28/2004
Publication #:
US20050161739
Pub Dt:
07/28/2005
Title:
METHOD AND STRUCTURE TO CREATE MULTIPLE DEVICE WIDTHS IN FINFET TECHNOLOGY IN BOTH BULK AND SOI
21
Patent #:
7405147
Issue Dt:
07/29/2008
Application #:
10707996
Filing Dt:
01/30/2004
Publication #:
US20050167838
Pub Dt:
08/04/2005
Title:
DEVICE AND METHODOLOGY FOR REDUCING EFFECTIVE DIELECTRIC CONSTANT IN SEMICONDUCTOR DEVICES
22
Patent #:
7166904
Issue Dt:
01/23/2007
Application #:
10708023
Filing Dt:
02/03/2004
Publication #:
US20050167786
Pub Dt:
08/04/2005
Title:
STRUCTURE AND METHOD FOR LOCAL RESISTOR ELEMENT IN INTEGRATED CIRCUIT TECHNOLOGY
23
Patent #:
7404164
Issue Dt:
07/22/2008
Application #:
10708039
Filing Dt:
02/04/2004
Publication #:
US20050172247
Pub Dt:
08/04/2005
Title:
IC DESIGN MODELING ALLOWING DIMENSION-DEPENDENT RULE CHECKING
24
Patent #:
7194670
Issue Dt:
03/20/2007
Application #:
10708184
Filing Dt:
02/13/2004
Publication #:
US20050193253
Pub Dt:
09/01/2005
Title:
A COMMAND MULTIPLIER FOR BUILT-IN-SELF-TEST
25
Patent #:
6949981
Issue Dt:
09/27/2005
Application #:
10708233
Filing Dt:
02/18/2004
Publication #:
US20050179501
Pub Dt:
08/18/2005
Title:
DYNAMIC THRESHOLD FOR VCO CALIBRATION
26
Patent #:
7472320
Issue Dt:
12/30/2008
Application #:
10708316
Filing Dt:
02/24/2004
Publication #:
US20050188289
Pub Dt:
08/25/2005
Title:
Autonomous Self-Monitoring and Corrective Operation of an Integrated Circuit
27
Patent #:
7120732
Issue Dt:
10/10/2006
Application #:
10708317
Filing Dt:
02/24/2004
Publication #:
US20050185436
Pub Dt:
08/25/2005
Title:
CONTENT ADDRESSABLE MEMORY STRUCTURE
28
Patent #:
7425754
Issue Dt:
09/16/2008
Application #:
10708340
Filing Dt:
02/25/2004
Publication #:
US20050184359
Pub Dt:
08/25/2005
Title:
STRUCTURE AND METHOD OF SELF-ALIGNED BIPOLAR TRANSISTOR HAVING TAPERED COLLECTOR
29
Patent #:
7923782
Issue Dt:
04/12/2011
Application #:
10708378
Filing Dt:
02/27/2004
Publication #:
US20050189589
Pub Dt:
09/01/2005
Title:
HYBRID SOI/BULK SEMICONDUCTOR TRANSISTORS
30
Patent #:
7543203
Issue Dt:
06/02/2009
Application #:
10708382
Filing Dt:
02/27/2004
Publication #:
US20050204244
Pub Dt:
09/15/2005
Title:
LSSD-COMPATIBLE EDGE-TRIGGERED SHIFT REGISTER LATCH
31
Patent #:
7105391
Issue Dt:
09/12/2006
Application #:
10708451
Filing Dt:
03/04/2004
Publication #:
US20050196912
Pub Dt:
09/08/2005
Title:
PLANAR PEDESTAL MULTI GATE DEVICE
32
Patent #:
7173338
Issue Dt:
02/06/2007
Application #:
10708486
Filing Dt:
03/06/2004
Publication #:
US20050194689
Pub Dt:
09/08/2005
Title:
SUPPRESSION OF LOCALIZED METAL PRECIPITATE FORMATION AND CORRESPONDING METALLIZATION DEPLETION IN SEMICONDUCTOR PROCESSING
33
Patent #:
7005665
Issue Dt:
02/28/2006
Application #:
10708667
Filing Dt:
03/18/2004
Publication #:
US20050208699
Pub Dt:
09/22/2005
Title:
PHASE CHANGE MEMORY CELL ON SILICON-ON INSULATOR SUBSTRATE
34
Patent #:
7124396
Issue Dt:
10/17/2006
Application #:
10708684
Filing Dt:
03/18/2004
Publication #:
US20050210436
Pub Dt:
09/22/2005
Title:
ALTERNATING PHASE-SHIFT MASK RULE COMPLIANT IC DESIGN
35
Patent #:
6936910
Issue Dt:
08/30/2005
Application #:
10708743
Filing Dt:
03/23/2004
Publication #:
US20040222486
Pub Dt:
11/11/2004
Title:
BICMOS TECHNOLOGY ON SOI SUBSTRATES
36
Patent #:
6998684
Issue Dt:
02/14/2006
Application #:
10708907
Filing Dt:
03/31/2004
Publication #:
US20050224875
Pub Dt:
10/13/2005
Title:
HIGH MOBILITY PLANE CMOS SOI
37
Patent #:
7115920
Issue Dt:
10/03/2006
Application #:
10709076
Filing Dt:
04/12/2004
Publication #:
US20050224890
Pub Dt:
10/13/2005
Title:
FINFET TRANSISTOR AND CIRCUIT
38
Patent #:
7239006
Issue Dt:
07/03/2007
Application #:
10709115
Filing Dt:
04/14/2004
Publication #:
US20050230785
Pub Dt:
10/20/2005
Title:
RESISTOR TUNING
39
Patent #:
7087940
Issue Dt:
08/08/2006
Application #:
10709220
Filing Dt:
04/22/2004
Publication #:
US20050236645
Pub Dt:
10/27/2005
Title:
STRUCTURE AND METHOD OF FORMING BIPOLAR TRANSISTOR HAVING A SELF-ALIGNED RAISED EXTRINSIC BASE USING SELF-ALIGNED ETCH STOP LAYER
40
Patent #:
7504693
Issue Dt:
03/17/2009
Application #:
10709239
Filing Dt:
04/23/2004
Publication #:
US20050236668
Pub Dt:
10/27/2005
Title:
DISLOCATION FREE STRESSED CHANNELS IN BULK SILICON AND SOI CMOS DEVICES BY GATE STRESS ENGINEERING
41
Patent #:
7260790
Issue Dt:
08/21/2007
Application #:
10709292
Filing Dt:
04/27/2004
Publication #:
US20060150130
Pub Dt:
07/06/2006
Title:
INTEGRATED CIRCUIT YIELD ENHANCEMENT USING VORONOI DIAGRAMS
42
Patent #:
7143371
Issue Dt:
11/28/2006
Application #:
10709293
Filing Dt:
04/27/2004
Publication #:
US20050240839
Pub Dt:
10/27/2005
Title:
CRITICAL AREA COMPUTATION OF COMPOSITE FAULT MECHANISMS USING VORONOI DIAGRAMS
43
Patent #:
7353477
Issue Dt:
04/01/2008
Application #:
10709327
Filing Dt:
04/28/2004
Publication #:
US20050243869
Pub Dt:
11/03/2005
Title:
METHOD OF IDENTIFYING PATHS WITH DELAYS DOMINATED BY A PARTICULAR FACTOR
44
Patent #:
7280939
Issue Dt:
10/09/2007
Application #:
10709362
Filing Dt:
04/29/2004
Publication #:
US20050246117
Pub Dt:
11/03/2005
Title:
SYSTEM AND METHOD OF ANALYZING TIMING EFFECTS OF SPATIAL DISTRIBUTION IN CIRCUITS
45
Patent #:
7009237
Issue Dt:
03/07/2006
Application #:
10709450
Filing Dt:
05/06/2004
Publication #:
US20050247966
Pub Dt:
11/10/2005
Title:
OUT OF THE BOX VERTICAL TRANSISTOR FOR EDRAM ON SOI
46
Patent #:
7129169
Issue Dt:
10/31/2006
Application #:
10709534
Filing Dt:
05/12/2004
Publication #:
US20050255699
Pub Dt:
11/17/2005
Title:
METHOD FOR CONTROLLING VOIDING AND BRIDGING IN SILICIDE FORMATION
47
Patent #:
7145218
Issue Dt:
12/05/2006
Application #:
10709692
Filing Dt:
05/24/2004
Publication #:
US20050258513
Pub Dt:
11/24/2005
Title:
THIN-FILM RESISTOR AND METHOD OF MANUFACTURING THE SAME
48
Patent #:
6943409
Issue Dt:
09/13/2005
Application #:
10709699
Filing Dt:
05/24/2004
Title:
TRENCH OPTICAL DEVICE
49
Patent #:
7078814
Issue Dt:
07/18/2006
Application #:
10709722
Filing Dt:
05/25/2004
Publication #:
US20050275104
Pub Dt:
12/15/2005
Title:
METHOD OF FORMING A SEMICONDUCTOR DEVICE HAVING AIR GAPS AND THE STRUCTURE SO FORMED
50
Patent #:
7253650
Issue Dt:
08/07/2007
Application #:
10709729
Filing Dt:
05/25/2004
Publication #:
US20050267706
Pub Dt:
12/01/2005
Title:
INCREASE PRODUCTIVITY AT WAFER TEST USING PROBE RETEST DATA ANALYSIS
51
Patent #:
7198872
Issue Dt:
04/03/2007
Application #:
10709733
Filing Dt:
05/25/2004
Publication #:
US20050266317
Pub Dt:
12/01/2005
Title:
LIGHT SCATTERING EUVL MASK
52
Patent #:
7726016
Issue Dt:
06/01/2010
Application #:
10709752
Filing Dt:
05/26/2004
Publication #:
US20040222015
Pub Dt:
11/11/2004
Title:
MANUFACTURING METHOD OF PRINTED CIRCUIT BOARD
53
Patent #:
7373567
Issue Dt:
05/13/2008
Application #:
10709754
Filing Dt:
05/26/2004
Publication #:
US20050278588
Pub Dt:
12/15/2005
Title:
A SYSTEM AND METHOD OF PROVIDING ERROR DETECTION AND CORRECTION CAPABILITY IN AN INTEGRATED CIRCUIT USING REDUNDANT LOGIC CELLS OF AN EMBEDDED FPGA
54
Patent #:
6961403
Issue Dt:
11/01/2005
Application #:
10709804
Filing Dt:
05/28/2004
Title:
PROGRAMMABLE FREQUENCY DIVIDER WITH SYMMETRICAL OUTPUT
55
Patent #:
7282404
Issue Dt:
10/16/2007
Application #:
10709829
Filing Dt:
06/01/2004
Publication #:
US20050274987
Pub Dt:
12/15/2005
Title:
INEXPENSIVE METHOD OF FABRICATING A HIGHER PERFORMANCE CAPACITANCE DENSITY MIMCAP INTEGRABLE INTO A COPPER INTERCONNECT SCHEME
56
Patent #:
7211507
Issue Dt:
05/01/2007
Application #:
10709865
Filing Dt:
06/02/2004
Publication #:
US20050269703
Pub Dt:
12/08/2005
Title:
PE-ALD OF TAN DIFFUSION BARRIER REGION ON LOW-K MATERIALS
57
Patent #:
7426555
Issue Dt:
09/16/2008
Application #:
10709867
Filing Dt:
06/02/2004
Publication #:
US20050273519
Pub Dt:
12/08/2005
Title:
METHOD, SYSTEM, AND STORAGE MEDIUM FOR PROVIDING CONTINUOUS COMMUNICATION BETWEEN PROCESS EQUIPMENT AND AN AUTOMATED MATERIAL HANDLING SYSTEM
58
Patent #:
7217988
Issue Dt:
05/15/2007
Application #:
10709905
Filing Dt:
06/04/2004
Publication #:
US20050269664
Pub Dt:
12/08/2005
Title:
BIPOLAR TRANSISTOR WITH ISOLATION AND DIRECT CONTACTS
59
Patent #:
7301752
Issue Dt:
11/27/2007
Application #:
10709907
Filing Dt:
06/04/2004
Publication #:
US20050272219
Pub Dt:
12/08/2005
Title:
FORMATION OF METAL-INSULATOR-METAL CAPACITOR SIMULTANEOUSLY WITH ALUMINUM METAL WIRING LEVEL USING A HARDMASK
60
Patent #:
7403884
Issue Dt:
07/22/2008
Application #:
10709949
Filing Dt:
06/08/2004
Publication #:
US20050273307
Pub Dt:
12/08/2005
Title:
TRANSIENT SIMULATION USING ADAPTIVE PIECEWISE CONSTANT MODEL
61
Patent #:
7084461
Issue Dt:
08/01/2006
Application #:
10709998
Filing Dt:
06/11/2004
Publication #:
US20050275040
Pub Dt:
12/15/2005
Title:
BACK GATE FINFET SRAM
62
Patent #:
7009265
Issue Dt:
03/07/2006
Application #:
10710007
Filing Dt:
06/11/2004
Publication #:
US20050275045
Pub Dt:
12/15/2005
Title:
LOW CAPACITANCE FET FOR OPERATION AT SUBTHRESHOLD VOLTAGES
63
Patent #:
7023064
Issue Dt:
04/04/2006
Application #:
10710063
Filing Dt:
06/16/2004
Publication #:
US20050280099
Pub Dt:
12/22/2005
Title:
TEMPERATURE STABLE METAL NITRIDE GATE ELECTRODE
64
Patent #:
7584077
Issue Dt:
09/01/2009
Application #:
10710113
Filing Dt:
06/18/2004
Publication #:
US20040221250
Pub Dt:
11/04/2004
Title:
PHYSICAL DESIGN CHARACTERIZATION SYSTEM
65
Patent #:
7180187
Issue Dt:
02/20/2007
Application #:
10710147
Filing Dt:
06/22/2004
Publication #:
US20050280152
Pub Dt:
12/22/2005
Title:
INTERLAYER CONNECTOR FOR PREVENTING DELAMINATION OF SEMICONDUCTOR DEVICE
66
Patent #:
7378195
Issue Dt:
05/27/2008
Application #:
10710224
Filing Dt:
06/28/2004
Publication #:
US20050287444
Pub Dt:
12/29/2005
Title:
SYSTEM FOR COLORING A PARTIALLY COLORED DESIGN IN AN ALTERNATING PHASE SHIFT MASK
67
Patent #:
7288443
Issue Dt:
10/30/2007
Application #:
10710244
Filing Dt:
06/29/2004
Publication #:
US20050285192
Pub Dt:
12/29/2005
Title:
STRUCTURES AND METHODS FOR MANUFACTURING P-TYPE MOSFET WITHGRADED EMBEDDED SILICON-GERMANIUM SOURCE-DRAIN AND/OR EXTENSION
68
Patent #:
7102204
Issue Dt:
09/05/2006
Application #:
10710256
Filing Dt:
06/29/2004
Publication #:
US20050287718
Pub Dt:
12/29/2005
Title:
INTEGRATED SOI FINGERED DECOUPLING CAPACITOR
69
Patent #:
8669145
Issue Dt:
03/11/2014
Application #:
10710272
Filing Dt:
06/30/2004
Publication #:
US20060014338
Pub Dt:
01/19/2006
Title:
METHOD AND STRUCTURE FOR STRAINED FINFET DEVICES
70
Patent #:
7084667
Issue Dt:
08/01/2006
Application #:
10710453
Filing Dt:
07/13/2004
Publication #:
US20060012398
Pub Dt:
01/19/2006
Title:
LOW LEAKAGE MONOTONIC CMOS LOGIC
71
Patent #:
7601646
Issue Dt:
10/13/2009
Application #:
10710566
Filing Dt:
07/21/2004
Publication #:
US20060019443
Pub Dt:
01/26/2006
Title:
TOP-OXIDE-EARLY PROCESS AND ARRAY TOP OXIDE PLANARIZATION
72
Patent #:
7404174
Issue Dt:
07/22/2008
Application #:
10710648
Filing Dt:
07/27/2004
Publication #:
US20060023932
Pub Dt:
02/02/2006
Title:
METHOD FOR GENERATING A SET OF TEST PATTERNS FOR AN OPTICAL PROXIMITY CORRECTION ALGORITHM
73
Patent #:
7259420
Issue Dt:
08/21/2007
Application #:
10710680
Filing Dt:
07/28/2004
Publication #:
US20060022253
Pub Dt:
02/02/2006
Title:
MULTIPLE-GATE DEVICE WITH FLOATING BACK GATE
74
Patent #:
7106110
Issue Dt:
09/12/2006
Application #:
10710681
Filing Dt:
07/28/2004
Publication #:
US20060022723
Pub Dt:
02/02/2006
Title:
CLOCK DITHERING SYSTEM AND METHOD DURING FREQUENCY SCALING
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Title:
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Assignor
1
GLOBALFOUNDRIES INC.
Exec Dt:
11/27/2018
Assignee
1
WILMINGTON TRUST, NATIONAL ASSOCIATION
1100 NORTH MARKET STREET
WILMINGTON, DELAWARE 19801
Correspondence name and address
CT CORPORATION
4400 EASTON COMMONS WAY
SUITE 125
COLUMBUS, OH 43219

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