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Reel/Frame:	049490/0001			Pages:	892
		Recorded:	11/29/2018
Conveyance:	SECURITY AGREEMENT

Total properties: 13706
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Patent #:	7308669	Issue Dt:	12/11/2007	Application #:	10908593	Filing Dt:	05/18/2005
Publication #:	US20060265684	Pub Dt:	11/23/2006
Title:	THE USE OF REDUNDANT ROUTES TO INCREASE THE YIELD AND RELIABILITY OF A VLSI LAYOUT

Patent #:	7829965	Issue Dt:	11/09/2010	Application #:	10908601	Filing Dt:	05/18/2005
Publication #:	US20060261426	Pub Dt:	11/23/2006
Title:	A TOUCHING MICROLENS STRUCTURE FOR A PIXEL SENSOR AND METHOD OF FABRICATION

Patent #:	7305334	Issue Dt:	12/04/2007	Application #:	10908724	Filing Dt:	05/24/2005
Publication #:	US20060282246	Pub Dt:	12/14/2006
Title:	METHODOLOGY FOR IMAGE FIDELITY VERIFICATION

Patent #:	7319591	Issue Dt:	01/15/2008	Application #:	10908796	Filing Dt:	05/26/2005
Publication #:	US20060268521	Pub Dt:	11/30/2006
Title:	OPTIMIZED THERMALLY CONDUCTIVE PLATE AND ATTACHMENT METHOD FOR ENHANCED THERMAL PERFORMANCE AND RELIABILITY OF FLIP CHIP ORGANIC PACKAGES

Patent #:	7287468	Issue Dt:	10/30/2007	Application #:	10908883	Filing Dt:	05/31/2005
Publication #:	US20060269770	Pub Dt:	11/30/2006
Title:	NICKEL ALLOY PLATED STRUCTURE

Patent #:	7214603	Issue Dt:	05/08/2007	Application #:	10908931	Filing Dt:	06/01/2005
Publication #:	US20060183314	Pub Dt:	08/17/2006
Title:	METHOD FOR FABRICATING INTERCONNECT STRUCTURES WITH REDUCED PLASMA DAMAGE

Patent #:	8040813	Issue Dt:	10/18/2011	Application #:	10908959	Filing Dt:	06/02/2005
Publication #:	US20060274681	Pub Dt:	12/07/2006
Title:	APPARATUS AND METHOD FOR REDUCED LOADING OF SIGNAL TRANSMISSION ELEMENTS

Patent #:	7173310	Issue Dt:	02/06/2007	Application #:	10908961	Filing Dt:	06/02/2005
Publication #:	US20060273372	Pub Dt:	12/07/2006
Title:	LATERAL LUBISTOR STRUCTURE AND METHOD

Patent #:	7217578	Issue Dt:	05/15/2007	Application #:	10909497	Filing Dt:	08/02/2004
Title:	ADVANCED PROCESS CONTROL OF THERMAL OXIDATION PROCESSES, AND SYSTEMS FOR ACCOMPLISHING SAME

Patent #:	7186650	Issue Dt:	03/06/2007	Application #:	10909509	Filing Dt:	08/02/2004
Title:	CONTROL OF BOTTOM DIMENSION OF TAPERED CONTACT VIA VARIATION(S) OF ETCH PROCESS

Patent #:	7295161	Issue Dt:	11/13/2007	Application #:	10912959	Filing Dt:	08/06/2004
Publication #:	US20060028378	Pub Dt:	02/09/2006
Title:	APPARATUS AND METHODS FOR CONSTRUCTING ANTENNAS USING WIRE BONDS AS RADIATING ELEMENTS

Patent #:	7179692	Issue Dt:	02/20/2007	Application #:	10913409	Filing Dt:	08/09/2004
Publication #:	US20050006666	Pub Dt:	01/13/2005
Title:	METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE HAVING A FIN STRUCTURE

Patent #:	7397876	Issue Dt:	07/08/2008	Application #:	10915790	Filing Dt:	08/11/2004
Publication #:	US20060045224	Pub Dt:	03/02/2006
Title:	METHODS AND ARRANGEMENTS FOR LINK POWER REDUCTION

Patent #:	7129548	Issue Dt:	10/31/2006	Application #:	10916201	Filing Dt:	08/11/2004
Publication #:	US20060033165	Pub Dt:	02/16/2006
Title:	MOSFET STRUCTURE WITH MULTIPLE SELF-ALIGNED SILICIDE CONTACTS

Patent #:	7312487	Issue Dt:	12/25/2007	Application #:	10919121	Filing Dt:	08/16/2004
Publication #:	US20060033110	Pub Dt:	02/16/2006
Title:	THREE DIMENSIONAL INTEGRATED CIRCUIT

Patent #:	7129159	Issue Dt:	10/31/2006	Application #:	10921007	Filing Dt:	08/17/2004
Publication #:	US20060040501	Pub Dt:	02/23/2006
Title:	INTEGRATED DUAL DAMASCENE RIE PROCESS WITH ORGANIC PATTERNING LAYER

Patent #:	7561541	Issue Dt:	07/14/2009	Application #:	10925112	Filing Dt:	08/24/2004
Publication #:	US20050190709	Pub Dt:	09/01/2005
Title:	DEEP SLEEP MODE FOR WLAN COMMUNICATION SYSTEMS

Patent #:	7340473	Issue Dt:	03/04/2008	Application #:	10926587	Filing Dt:	08/26/2004
Publication #:	US20060047680	Pub Dt:	03/02/2006
Title:	METHOD AND SYSTEM FOR BUILDING BINARY DECISION DIAGRAMS EFFICIENTLY IN A STRUCTURAL NETWORK REPRESENTATION OF A DIGITAL CIRCUIT

Patent #:	7395196	Issue Dt:	07/01/2008	Application #:	10929935	Filing Dt:	08/30/2004
Publication #:	US20060048082	Pub Dt:	03/02/2006
Title:	TEST-CASES FOR FUNCTIONAL VERIFICATION OF SYSTEM-LEVEL INTERCONNECT

Patent #:	6962872	Issue Dt:	11/08/2005	Application #:	10930304	Filing Dt:	08/31/2004
Publication #:	US20050023664	Pub Dt:	02/03/2005
Title:	HIGH DENSITY CHIP CARRIER WITH INTEGRATED PASSIVE DEVICES

Patent #:	7227205	Issue Dt:	06/05/2007	Application #:	10930404	Filing Dt:	08/31/2004
Publication #:	US20050285187	Pub Dt:	12/29/2005
Title:	STRAINED-SILICON CMOS DEVICE AND METHOD

Patent #:	7799517	Issue Dt:	09/21/2010	Application #:	10930432	Filing Dt:	08/31/2004
Title:	SINGLE/DOUBLE DIPOLE MASK FOR CONTACT HOLES

Patent #:	7259966	Issue Dt:	08/21/2007	Application #:	10931100	Filing Dt:	08/31/2004
Publication #:	US20060044748	Pub Dt:	03/02/2006
Title:	APPARATUS, SYSTEM, AND METHOD FOR REDUCING ROTATIONAL VIBRATION TRANSMISSION WITHIN A DATA STORAGE SYSTEM

Patent #:	7102205	Issue Dt:	09/05/2006	Application #:	10931660	Filing Dt:	09/01/2004
Publication #:	US20060043529	Pub Dt:	03/02/2006
Title:	BIPOLAR TRANSISTOR WITH EXTRINSIC STRESS LAYER

Patent #:	7141115	Issue Dt:	11/28/2006	Application #:	10932598	Filing Dt:	09/02/2004
Publication #:	US20060042542	Pub Dt:	03/02/2006
Title:	METHOD OF PRODUCING SILICON-GERMANIUM-ON-INSULATOR MATERIAL USING UNSTRAINED GE-CONTAINING SOURCE LAYERS

Patent #:	7098508	Issue Dt:	08/29/2006	Application #:	10932982	Filing Dt:	09/02/2004
Publication #:	US20050045995	Pub Dt:	03/03/2005
Title:	ULTRA-THIN SILICON-ON-INSULATOR AND STRAINED-SILICON-DIRECT-ON-INSULATOR WITH HYBRID CRYSTAL ORIENTATIONS

Patent #:	7558687	Issue Dt:	07/07/2009	Application #:	10932999	Filing Dt:	09/02/2004
Title:	METHOD AND APPARATUS FOR DYNAMIC ADJUSTMENT OF A SENSOR SAMPLING RATE

Patent #:	7434308	Issue Dt:	10/14/2008	Application #:	10933051	Filing Dt:	09/02/2004
Publication #:	US20060042825	Pub Dt:	03/02/2006
Title:	COOLING OF SUBSTRATE USING INTERPOSER CHANNELS

Patent #:	7052921	Issue Dt:	05/30/2006	Application #:	10934192	Filing Dt:	09/03/2004
Title:	SYSTEM AND METHOD USING IN SITU SCATTEROMETRY TO DETECT PHOTORESIST PATTERN INTEGRITY DURING THE PHOTOLITHOGRAPHY PROCESS

Patent #:	7239516	Issue Dt:	07/03/2007	Application #:	10939230	Filing Dt:	09/10/2004
Publication #:	US20060056156	Pub Dt:	03/16/2006
Title:	FLEXURE PLATE FOR MAINTAINING CONTACT BETWEEN A COOLING PLATE/HEAT SINK AND A MICROCHIP

Patent #:	7235812	Issue Dt:	06/26/2007	Application #:	10939736	Filing Dt:	09/13/2004
Publication #:	US20060054891	Pub Dt:	03/16/2006
Title:	METHOD OF CREATING DEFECT FREE HIGH GE CONTENT (>25%) SIGE-ON-INSULATOR (SGOI) SUBSTRATES USING WAFER BONDING TECHNIQUES

Patent #:	7305571	Issue Dt:	12/04/2007	Application #:	10940543	Filing Dt:	09/14/2004
Publication #:	US20060056128	Pub Dt:	03/16/2006
Title:	POWER NETWORK RECONFIGURATION USING MEM SWITCHES

Patent #:	6989601	Issue Dt:	01/24/2006	Application #:	10946071	Filing Dt:	09/22/2004
Title:	COPPER DAMASCENE WITH LOW-K CAPPING LAYER AND IMPROVED ELECTROMIGRATION RELIABILITY

Patent #:	7096436	Issue Dt:	08/22/2006	Application #:	10946552	Filing Dt:	09/21/2004
Publication #:	US20050039153	Pub Dt:	02/17/2005
Title:	MACRO DESIGN TECHNIQUES TO ACCOMMODATE CHIP LEVEL WIRING AND CIRCUIT PLACEMENT ACROSS THE MACRO

Patent #:	7783037	Issue Dt:	08/24/2010	Application #:	10946653	Filing Dt:	09/20/2004
Title:	MULTI-GIGABIT PER SECOND COMPUTING OF THE RIJNDAEL INVERSE CIPHER

Patent #:	7427773	Issue Dt:	09/23/2008	Application #:	10948421	Filing Dt:	09/23/2004
Publication #:	US20050104067	Pub Dt:	05/19/2005
Title:	LAYER TRANSFER OF LOW DEFECT SIGE USING AN ETCH-BACK PROCESS

Patent #:	7098476	Issue Dt:	08/29/2006	Application #:	10949837	Filing Dt:	09/24/2004
Publication #:	US20050037604	Pub Dt:	02/17/2005
Title:	MULTILAYER INTERCONNECT STRUCTURE CONTAINING AIR GAPS AND METHOD FOR MAKING

Patent #:	7358586	Issue Dt:	04/15/2008	Application #:	10951745	Filing Dt:	09/28/2004
Publication #:	US20060071274	Pub Dt:	04/06/2006
Title:	SILICON-ON-INSULATOR WAFER HAVING REENTRANT SHAPE DIELECTRIC TRENCHES

Patent #:	7191305	Issue Dt:	03/13/2007	Application #:	10952269	Filing Dt:	09/28/2004
Publication #:	US20050044337	Pub Dt:	02/24/2005
Title:	METHOD AND APPARATUS FOR ADDRESS DECODING OF EMBEDDED DRAM DEVICES

Patent #:	7173274	Issue Dt:	02/06/2007	Application #:	10953378	Filing Dt:	09/29/2004
Publication #:	US20050054171	Pub Dt:	03/10/2005
Title:	INCORPORATION OF CARBON IN SILICON/SILICON GERMANIUM EPITAXIAL LAYER TO ENHANCE YIELD FOR SI-GE BIPOLAR TECHNOLOGY

Patent #:	7296167	Issue Dt:	11/13/2007	Application #:	10956537	Filing Dt:	10/01/2004
Title:	COMBINED SYSTEM RESPONSES IN A CHIP MULTIPROCESSOR

Patent #:	7257678	Issue Dt:	08/14/2007	Application #:	10956560	Filing Dt:	10/01/2004
Publication #:	US20060075192	Pub Dt:	04/06/2006
Title:	DYNAMIC RECONFIGURATION OF CACHE MEMORY

Patent #:	7472224	Issue Dt:	12/30/2008	Application #:	10956561	Filing Dt:	10/01/2004
Title:	RECONFIGURABLE PROCESSING NODE INCLUDING FIRST AND SECOND PROCESSOR CORES

Patent #:	7165132	Issue Dt:	01/16/2007	Application #:	10956650	Filing Dt:	10/01/2004
Title:	PROCESSING NODE INCLUDING A PLURALITY OF PROCESSOR CORES AND AN INTERCONNECT CONFIGURABLE IN A TEST-MODE TO CAUSE FIRST AND SECOND TRANSACTION SOURCE INDICATORS TO BE INTERCHANGED

Patent #:	7253065	Issue Dt:	08/07/2007	Application #:	10956851	Filing Dt:	10/01/2004
Publication #:	US20050056826	Pub Dt:	03/17/2005
Title:	SELF-ALIGNED NANOTUBE FIELD EFFECT TRANSISTOR AND METHOD OF FABRICATING SAME

Patent #:	7383423	Issue Dt:	06/03/2008	Application #:	10957250	Filing Dt:	10/01/2004
Title:	SHARED RESOURCES IN A CHIP MULTIPROCESSOR

Patent #:	7799514	Issue Dt:	09/21/2010	Application #:	10957367	Filing Dt:	10/01/2004
Title:	SURFACE TREATMENT WITH AN ACIDIC COMPOSITION TO PREVENT SUBSTRATE AND ENVIRONMENTAL CONTAMINATION

Patent #:	7166521	Issue Dt:	01/23/2007	Application #:	10957833	Filing Dt:	10/04/2004
Publication #:	US20050042841	Pub Dt:	02/24/2005
Title:	SOI WAFERS WITH 30-100 ¿ BURIED OXIDE (BOX) CREATED BY WAFER BONDING USING 30-100 ¿ THIN OXIDE AS BONDING LAYER

Patent #:	7296103	Issue Dt:	11/13/2007	Application #:	10958834	Filing Dt:	10/05/2004
Title:	METHOD AND SYSTEM FOR DYNAMICALLY SELECTING WAFER LOTS FOR METROLOGY PROCESSING

Patent #:	7429552	Issue Dt:	09/30/2008	Application #:	10959938	Filing Dt:	10/06/2004
Publication #:	US20050081984	Pub Dt:	04/21/2005
Title:	SYSTEM AND METHOD OF TRANSFER PRINTING AN ORGANIC SEMICONDUCTOR

Patent #:	7249331	Issue Dt:	07/24/2007	Application #:	10960730	Filing Dt:	10/07/2004
Publication #:	US20060080625	Pub Dt:	04/13/2006
Title:	ARCHITECTURAL LEVEL THROUGHPUT BASED POWER MODELING METHODOLOGY AND APPARATUS FOR PERVASIVELY CLOCK-GATED PROCESSOR CORES

Patent #:	8187772	Issue Dt:	05/29/2012	Application #:	10961347	Filing Dt:	10/08/2004
Publication #:	US20060078637	Pub Dt:	04/13/2006
Title:	SOLID IMMERSION LENS LITHOGRAPHY

Patent #:	7225419	Issue Dt:	05/29/2007	Application #:	10962121	Filing Dt:	10/08/2004
Publication #:	US20050071794	Pub Dt:	03/31/2005
Title:	METHODS FOR MODELING LATCH TRANSPARENCY

Patent #:	7480840	Issue Dt:	01/20/2009	Application #:	10963475	Filing Dt:	10/12/2004
Publication #:	US20060085699	Pub Dt:	04/20/2006
Title:	APPARATUS, SYSTEM, AND METHOD FOR FACILITATING PORT TESTING OF A MULTI-PORT HOST ADAPTER

Patent #:	7282802	Issue Dt:	10/16/2007	Application #:	10964882	Filing Dt:	10/14/2004
Publication #:	US20060081986	Pub Dt:	04/20/2006
Title:	MODIFIED VIA BOTTOM STRUCTURE FOR RELIABILITY ENHANCEMENT

Patent #:	7223691	Issue Dt:	05/29/2007	Application #:	10965031	Filing Dt:	10/14/2004
Publication #:	US20060084256	Pub Dt:	04/20/2006
Title:	METHOD OF FORMING LOW RESISTANCE AND RELIABLE VIA IN INTER-LEVEL DIELECTRIC INTERCONNECT

Patent #:	7329948	Issue Dt:	02/12/2008	Application #:	10966202	Filing Dt:	10/15/2004
Publication #:	US20060081979	Pub Dt:	04/20/2006
Title:	MICROELECTRONIC DEVICES AND METHODS

Patent #:	7246331	Issue Dt:	07/17/2007	Application #:	10966492	Filing Dt:	10/15/2004
Publication #:	US20060085782	Pub Dt:	04/20/2006
Title:	METHOD FOR OPTIMIZING INTEGRATED CIRCUIT DEVICE DESIGN AND SERVICE

Patent #:	6999254	Issue Dt:	02/14/2006	Application #:	10967845	Filing Dt:	10/18/2004
Title:	REFRACTIVE INDEX SYSTEM MONITOR AND CONTROL FOR IMMERSION LITHOGRAPHY

Patent #:	7426416	Issue Dt:	09/16/2008	Application #:	10968181	Filing Dt:	10/20/2004
Publication #:	US20060082463	Pub Dt:	04/20/2006
Title:	SYSTEM AND METHOD FOR SENSOR REPLICATION FOR ENSEMBLE AVERAGING IN MICRO-ELECTROMECHANICAL SYSTEMS (MEMS)

Patent #:	7437611	Issue Dt:	10/14/2008	Application #:	10968917	Filing Dt:	10/21/2004
Publication #:	US20060101308	Pub Dt:	05/11/2006
Title:	SYSTEM AND METHOD FOR PROBLEM DETERMINATION USING DEPENDENCY GRAPHS AND RUN-TIME BEHAVIOR MODELS

Patent #:	7378227	Issue Dt:	05/27/2008	Application #:	10969684	Filing Dt:	10/20/2004
Publication #:	US20050058945	Pub Dt:	03/17/2005
Title:	METHOD OF MAKING A PRINTED WIRING BOARD WITH CONFORMALLY PLATED CIRCUIT TRACES

Patent #:	7050762	Issue Dt:	05/23/2006	Application #:	10970266	Filing Dt:	10/21/2004
Publication #:	US20050265401	Pub Dt:	12/01/2005
Title:	DIGITALLY CONTROLLED FILTER TUNING FOR WLAN COMMUNICATION DEVICES

Patent #:	7392169	Issue Dt:	06/24/2008	Application #:	10970469	Filing Dt:	10/21/2004
Publication #:	US20060089827	Pub Dt:	04/27/2006
Title:	METHOD, SYSTEM AND PROGRAM PRODUCT FOR DEFINING AND RECORDING MINIUM AND MAXIMUM EVENT COUNTS OF A SIMULATION UTILIZING A HIGH LEVEL LANGUAGE

Patent #:	7035127	Issue Dt:	04/25/2006	Application #:	10970522	Filing Dt:	10/21/2004
Publication #:	US20060087873	Pub Dt:	04/27/2006
Title:	METHOD AND SUM ADDRESSED CELL ENCODER FOR ENHANCED COMPARE AND SEARCH TIMING FOR CAM COMPARE

Patent #:	7142064	Issue Dt:	11/28/2006	Application #:	10973366	Filing Dt:	10/26/2004
Publication #:	US20060097802	Pub Dt:	05/11/2006
Title:	SRAM RING OSCILLATOR

Patent #:	7238591	Issue Dt:	07/03/2007	Application #:	10973871	Filing Dt:	10/26/2004
Title:	HEAT REMOVAL IN SOI DEVICES USING A BURIED OXIDE LAYER/CONDUCTIVE LAYER COMBINATION

Patent #:	7138320	Issue Dt:	11/21/2006	Application #:	10974232	Filing Dt:	10/27/2004
Publication #:	US20050093075	Pub Dt:	05/05/2005
Title:	ADVANCED TECHNIQUE FOR FORMING A TRANSISTOR HAVING RAISED DRAIN AND SOURCE REGIONS

Patent #:	6975555	Issue Dt:	12/13/2005	Application #:	10976598	Filing Dt:	10/29/2004
Publication #:	US20050094445	Pub Dt:	05/05/2005
Title:	MAGNETIC RANDOM ACCESS MEMORY USING MEMORY CELLS WITH ROTATED MAGNETIC STORAGE ELEMENTS

Patent #:	7290203	Issue Dt:	10/30/2007	Application #:	10977432	Filing Dt:	10/29/2004
Publication #:	US20060107090	Pub Dt:	05/18/2006
Title:	DYNAMIC MEMORY ARCHITECTURE EMPLOYING PASSIVE EXPIRATION OF DATA

Patent #:	7241649	Issue Dt:	07/10/2007	Application #:	10977768	Filing Dt:	10/29/2004
Publication #:	US20060091463	Pub Dt:	05/04/2006
Title:	FINFET BODY CONTACT STRUCTURE

Patent #:	7386585	Issue Dt:	06/10/2008	Application #:	10978056	Filing Dt:	10/30/2004
Publication #:	US20060095885	Pub Dt:	05/04/2006
Title:	SYSTEMS AND METHODS FOR STORAGE AREA NETWORK DESIGN

Patent #:	7126370	Issue Dt:	10/24/2006	Application #:	10978067	Filing Dt:	10/28/2004
Publication #:	US20060091913	Pub Dt:	05/04/2006
Title:	POWER GATING TECHNIQUES ABLE TO HAVE DATA RETENTION AND VARIABILITY IMMUNITY PROPERTIES

Patent #:	7724059	Issue Dt:	05/25/2010	Application #:	10978183	Filing Dt:	10/29/2004
Publication #:	US20060091928	Pub Dt:	05/04/2006
Title:	CLOCK SCALING CIRCUIT

Patent #:	7870464	Issue Dt:	01/11/2011	Application #:	10978389	Filing Dt:	11/02/2004
Publication #:	US20060107091	Pub Dt:	05/18/2006
Title:	SYSTEM AND METHOD FOR RECOVERY OF DATA FOR A LOST SECTOR IN A STORAGE SYSTEM

Patent #:	7273800	Issue Dt:	09/25/2007	Application #:	10978715	Filing Dt:	11/01/2004
Publication #:	US20060091377	Pub Dt:	05/04/2006
Title:	HETERO-INTEGRATED STRAINED SILICON N-AND P-MOSFETS

Patent #:	7263408	Issue Dt:	08/28/2007	Application #:	10979381	Filing Dt:	11/02/2004
Title:	METHOD AND SYSTEM FOR CONVERTING TOOL PROCESS ABILITY BASED UPON WORK IN PROGRESS CHARACTERISTICS

Patent #:	7161169	Issue Dt:	01/09/2007	Application #:	10980220	Filing Dt:	11/03/2004
Publication #:	US20050145837	Pub Dt:	07/07/2005
Title:	ENHANCEMENT OF ELECTRON AND HOLE MOBILITIES IN <110> SI UNDER BIAXIAL COMPRESSIVE STRAIN

Patent #:	7320855	Issue Dt:	01/22/2008	Application #:	10980365	Filing Dt:	11/03/2004
Publication #:	US20060093959	Pub Dt:	05/04/2006
Title:	SILICON CONTAINING TARC / BARRIER LAYER

Patent #:	7132896	Issue Dt:	11/07/2006	Application #:	10981155	Filing Dt:	11/04/2004
Publication #:	US20060091965	Pub Dt:	05/04/2006
Title:	NOVEL CIRCUIT FOR MINIMIZING FILTER CAPACITANCE LEAKAGE INDUCED JITTER IN PHASE LOCKED LOOPS (PLLS)

Patent #:	7335980	Issue Dt:	02/26/2008	Application #:	10981233	Filing Dt:	11/04/2004
Publication #:	US20060091559	Pub Dt:	05/04/2006
Title:	HARDMASK FOR RELIABILITY OF SILICON BASED DIELECTRICS

Patent #:	8133363	Issue Dt:	03/13/2012	Application #:	10981926	Filing Dt:	11/05/2004
Publication #:	US20050061658	Pub Dt:	03/24/2005
Title:	DUAL MAGNETIC TUNNEL JUNCTION SENSOR WITH A LONGITUDINAL BIAS STACK

Patent #:	7304328	Issue Dt:	12/04/2007	Application #:	10982411	Filing Dt:	11/05/2004
Publication #:	US20050130424	Pub Dt:	06/16/2005
Title:	USE OF HYDROGEN IMPLANTATION TO IMPROVE MATERIAL PROPERTIES OF SILICON-GERMANIUM-ON-INSULATOR MATERIAL MADE BY THERMAL DIFFUSION

Patent #:	8029186	Issue Dt:	10/04/2011	Application #:	10982575	Filing Dt:	11/05/2004
Publication #:	US20060097384	Pub Dt:	05/11/2006
Title:	METHOD FOR THERMAL CHARACTERIZATION UNDER NON-UNIFORM HEAT LOAD

Patent #:	7196014	Issue Dt:	03/27/2007	Application #:	10983345	Filing Dt:	11/08/2004
Publication #:	US20060099816	Pub Dt:	05/11/2006
Title:	SYSTEM AND METHOD FOR PLASMA INDUCED MODIFICATION AND IMPROVEMENT OF CRITICAL DIMENSION UNIFORMITY

Patent #:	7401312	Issue Dt:	07/15/2008	Application #:	10983819	Filing Dt:	11/08/2004
Publication #:	US20050132319	Pub Dt:	06/16/2005
Title:	AUTOMATIC METHOD FOR ROUTING AND DESIGNING AN LSI

Patent #:	7031178	Issue Dt:	04/18/2006	Application #:	10984055	Filing Dt:	11/09/2004
Publication #:	US20050094427	Pub Dt:	05/05/2005
Title:	MAGNETIC SHIFT REGISTER WITH SHIFTABLE MAGNETIC DOMAINS BETWEEN TWO REGIONS, AND METHOD OF USING THE SAME

Patent #:	7393777	Issue Dt:	07/01/2008	Application #:	10984439	Filing Dt:	11/09/2004
Publication #:	US20050085064	Pub Dt:	04/21/2005
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100

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Title:	INTEGRATED THERMOELECTRIC COOLING DEVICES AND METHODS FOR FABRICATING SAME

Assignor

GLOBALFOUNDRIES INC.

Exec Dt:

11/27/2018

Assignee

WILMINGTON TRUST, NATIONAL ASSOCIATION

1100 NORTH MARKET STREET

WILMINGTON, DELAWARE 19801

Correspondence name and address
	CT CORPORATION
	4400 EASTON COMMONS WAY
	SUITE 125
	COLUMBUS, OH 43219

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