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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:049490/0001   Pages: 892
Recorded: 11/29/2018
Conveyance: SECURITY AGREEMENT
1
Patent #:
Issue Dt:
03/18/2008
Application #:
11057129
Filing Dt:
02/15/2005
Publication #:
Pub Dt:
07/07/2005
Title:
METHOD FOR REDUCED N+ DIFFUSION IN STRAINED SI ON SIGE SUBSTRATE
2
Patent #:
Issue Dt:
12/25/2007
Application #:
11058706
Filing Dt:
02/15/2005
Publication #:
Pub Dt:
12/01/2005
Title:
SEMICONDUCTOR STRUCTURE COMPRISING A STRESS SENSITIVE ELEMENT AND METHOD OF MEASURING A STRESS IN A SEMICONDUCTOR STRUCTURE
3
Patent #:
Issue Dt:
11/04/2008
Application #:
11060009
Filing Dt:
02/17/2005
Publication #:
Pub Dt:
08/17/2006
Title:
METHOD, SYSTEM AND PROGRAM FOR SELECTION OF DATABASE CHARACTERISTICS
4
Patent #:
Issue Dt:
12/23/2008
Application #:
11061444
Filing Dt:
02/22/2005
Publication #:
Pub Dt:
06/30/2005
Title:
STRAINED SILICON ON A SIGE ON SOI SUBSTRATE
5
Patent #:
Issue Dt:
10/30/2007
Application #:
11063940
Filing Dt:
02/23/2005
Publication #:
Pub Dt:
08/24/2006
Title:
IMMERSION TOPCOAT MATERIALS WITH IMPROVED PERFORMANCE
6
Patent #:
Issue Dt:
09/09/2008
Application #:
11064561
Filing Dt:
02/24/2005
Publication #:
Pub Dt:
08/24/2006
Title:
TA-TAN SELECTIVE REMOVAL PROCESS FOR INTEGRATED DEVICE FABRICATION
7
Patent #:
Issue Dt:
06/19/2007
Application #:
11064730
Filing Dt:
02/24/2005
Publication #:
Pub Dt:
08/24/2006
Title:
BODY CAPACITOR FOR SOI MEMORY DESCRIPTION
8
Patent #:
Issue Dt:
03/04/2008
Application #:
11065740
Filing Dt:
02/25/2005
Publication #:
Pub Dt:
08/31/2006
Title:
DETERMINING FLEET MATCHING PROBLEM AND ROOT CAUSE ISSUE FOR MEASUREMENT SYSTEM
9
Patent #:
Issue Dt:
04/24/2007
Application #:
11066019
Filing Dt:
02/25/2005
Title:
PROCESSOR THAT MAINTAINS VIRTUAL INTERRUPT STATE AND INJECTS VIRTUAL INTERRUPTS INTO VIRTUAL MACHINE GUESTS
10
Patent #:
Issue Dt:
06/14/2011
Application #:
11066027
Filing Dt:
02/25/2005
Title:
LIMITING GUEST EXECUTION
11
Patent #:
Issue Dt:
03/27/2007
Application #:
11066738
Filing Dt:
02/28/2005
Publication #:
Pub Dt:
06/30/2005
Title:
METHOD OF MANUFACTURING AN INTRALEVEL DECOUPLING CAPACITOR
12
Patent #:
Issue Dt:
08/26/2008
Application #:
11066752
Filing Dt:
02/25/2005
Title:
EXECUTING SYSTEM MANAGEMENT MODE CODE AS VIRTUAL MACHINE GUEST
13
Patent #:
Issue Dt:
01/30/2007
Application #:
11066762
Filing Dt:
02/28/2005
Publication #:
Pub Dt:
07/21/2005
Title:
COMPLEMENTARY METAL OXIDE SEMICONDUCTOR (CMOS) GATE STACK WITH HIGH DIELECTRIC CONSTANT GATE DIELECTRIC AND INTEGRATED DIFFUSION BARRIER
14
Patent #:
Issue Dt:
02/28/2012
Application #:
11066873
Filing Dt:
02/25/2005
Title:
VIRTUALIZATION OF REAL MODE EXECUTION
15
Patent #:
Issue Dt:
11/14/2006
Application #:
11067797
Filing Dt:
02/28/2005
Publication #:
Pub Dt:
09/07/2006
Title:
STATIC RANDOM ACCESS MEMORY UTILIZING GATED DIODE TECHNOLOGY
16
Patent #:
Issue Dt:
09/18/2007
Application #:
11070347
Filing Dt:
03/02/2005
Title:
METHOD AND APPARATUS FOR SHARING AN INPUT/OUTPUT TERMINAL BY MULTIPLE COMPENSATION CIRCUITS
17
Patent #:
Issue Dt:
08/24/2010
Application #:
11072140
Filing Dt:
03/04/2005
Title:
METHODS AND SYSTEMS FOR ANALYZING PROCESS EQUIPMENT PROCESSING VARIATIONS USING SENSOR DATA
18
Patent #:
Issue Dt:
02/27/2007
Application #:
11072312
Filing Dt:
03/07/2005
Title:
METHOD AND ARRANGEMENT FOR REDUCING SOURCE/DRAIN RESISTANCE WITH EPITAXIAL GROWTH
19
Patent #:
Issue Dt:
06/09/2009
Application #:
11072661
Filing Dt:
03/04/2005
Publication #:
Pub Dt:
07/14/2005
Title:
SOI SEMICONDUCTOR DEVICE HAVING ENHANCED, SELF-ALIGNED DIELECTRIC REGIONS IN THE BULK SILICON SUBSTRATE
20
Patent #:
Issue Dt:
05/22/2007
Application #:
11074602
Filing Dt:
03/08/2005
Title:
COMPOSITE ALIGNMENT MARK SCHEME FOR MULTI-LAYERS IN LITHOGRAPHY
21
Patent #:
Issue Dt:
04/06/2010
Application #:
11076323
Filing Dt:
03/09/2005
Title:
SYSTEM FOR ENABLING AND DISABLING CACHE AND A METHOD THEREOF
22
Patent #:
Issue Dt:
01/29/2008
Application #:
11077043
Filing Dt:
03/10/2005
Publication #:
Pub Dt:
09/14/2006
Title:
HYBRID LINEAR WIRE MODEL APPROACH TO TUNING TRANSISTOR WIDTHS OF CIRCUITS WITH RC INTERCONNECT
23
Patent #:
Issue Dt:
03/11/2008
Application #:
11077804
Filing Dt:
03/11/2005
Publication #:
Pub Dt:
09/14/2006
Title:
MATERIALS HAVING PREDEFINED MORPHOLOGIES AND METHODS OF FORMATION THEREOF
24
Patent #:
Issue Dt:
05/05/2009
Application #:
11079816
Filing Dt:
03/14/2005
Publication #:
Pub Dt:
09/14/2006
Title:
METHOD FOR SELF-CORRECTING CACHE USING LINE DELETE, DATA LOGGING, AND FUSE REPAIR CORRECTION
25
Patent #:
Issue Dt:
08/26/2008
Application #:
11079952
Filing Dt:
03/15/2005
Publication #:
Pub Dt:
09/21/2006
Title:
ALTERING POWER CONSUMPTION IN COMMUNICATION LINKS BASED ON MEASURED NOISE
26
Patent #:
Issue Dt:
03/06/2007
Application #:
11081237
Filing Dt:
03/16/2005
Publication #:
Pub Dt:
09/21/2006
Title:
DC ISOLATED PHASE INVERTER AND A RING HYBRID COUPLER INCLUDING THE DC ISOLATED PHASE INVERTER
27
Patent #:
Issue Dt:
07/08/2014
Application #:
11082156
Filing Dt:
03/16/2005
Publication #:
Pub Dt:
01/05/2006
Title:
TECHNIQUE FOR FORMING A DIELECTRIC INTERLAYER ABOVE A STRUCTURE INCLUDING CLOSELY SPACED LINES
28
Patent #:
Issue Dt:
03/25/2008
Application #:
11082973
Filing Dt:
03/17/2005
Publication #:
Pub Dt:
09/21/2006
Title:
DIGITAL CIRCUIT TO MEASURE AND/OR CORRECT DUTY CYCLES
29
Patent #:
Issue Dt:
10/07/2008
Application #:
11085791
Filing Dt:
03/21/2005
Publication #:
Pub Dt:
09/21/2006
Title:
HIGHLY SPECIALIZED SCENARIOS IN RANDOM TEST GENERATION
30
Patent #:
Issue Dt:
03/25/2008
Application #:
11086719
Filing Dt:
03/22/2005
Publication #:
Pub Dt:
09/28/2006
Title:
SYSTEM AND METHOD FOR NOISE REDUCTION IN MULTI-LAYER CERAMIC PACKAGES
31
Patent #:
Issue Dt:
05/17/2011
Application #:
11087011
Filing Dt:
03/22/2005
Publication #:
Pub Dt:
07/28/2005
Title:
INVERSE RESIST COATING PROCESS
32
Patent #:
Issue Dt:
03/27/2007
Application #:
11087793
Filing Dt:
03/23/2005
Title:
ALUMINUM OXIDE AS LINER OR COVER LAYER TO SPACERS IN MEMORY DEVICE
33
Patent #:
Issue Dt:
06/17/2008
Application #:
11088595
Filing Dt:
03/24/2005
Publication #:
Pub Dt:
09/28/2006
Title:
HIGH PERFORMANCE FIELD EFFECT TRANSISTORS ON SOI SUBSTRATE WITH STRESS-INDUCING MATERIAL AS BURIED INSULATOR AND METHODS
34
Patent #:
Issue Dt:
11/28/2006
Application #:
11095327
Filing Dt:
03/31/2005
Publication #:
Pub Dt:
10/12/2006
Title:
VOLTAGE DEPENDENT PARAMETER ANALYSIS
35
Patent #:
Issue Dt:
05/06/2008
Application #:
11096485
Filing Dt:
03/31/2005
Publication #:
Pub Dt:
10/05/2006
Title:
SYSTEMS AND METHODS FOR STRUCTURAL CLUSTERING OF TIME SEQUENCES
36
Patent #:
Issue Dt:
11/27/2007
Application #:
11097552
Filing Dt:
04/01/2005
Publication #:
Pub Dt:
09/01/2005
Title:
INTEGRATED CIRCUIT LOGIC WITH SELF COMPENSATING SHAPES
37
Patent #:
Issue Dt:
04/22/2008
Application #:
11098049
Filing Dt:
04/04/2005
Publication #:
Pub Dt:
10/05/2006
Title:
ETCH PROCESS FOR CD REDUCTION OF ARC MATERIAL
38
Patent #:
Issue Dt:
06/19/2007
Application #:
11098078
Filing Dt:
04/04/2005
Publication #:
Pub Dt:
10/05/2006
Title:
PRECISION TUNING OF A PHASE-CHANGE RESISTIVE ELEMENT
39
Patent #:
Issue Dt:
08/16/2011
Application #:
11098153
Filing Dt:
04/04/2005
Publication #:
Pub Dt:
10/05/2006
Title:
SYSTEM FOR SPECULATIVE BRANCH PREDICTION OPTIMIZATION AND METHOD THEREOF
40
Patent #:
Issue Dt:
11/05/2013
Application #:
11098273
Filing Dt:
04/04/2005
Title:
System and method for aligning change-of-flow instructions in an instruction buffer
41
Patent #:
Issue Dt:
10/21/2008
Application #:
11098321
Filing Dt:
04/04/2005
Publication #:
Pub Dt:
10/05/2006
Title:
SYSTEM FOR PREDICTIVE PROCESSOR COMPONENT SUSPENSION AND METHOD THEREOF
42
Patent #:
Issue Dt:
03/06/2007
Application #:
11098873
Filing Dt:
04/05/2005
Title:
DEVICE HAVING AN INTERFACE AND METHOD THEREOF
43
Patent #:
Issue Dt:
11/13/2007
Application #:
11099161
Filing Dt:
04/05/2005
Publication #:
Pub Dt:
08/11/2005
Title:
ELECTRONIC PACKAGE REPAIR PROCESS
44
Patent #:
Issue Dt:
02/19/2008
Application #:
11099761
Filing Dt:
04/06/2005
Publication #:
Pub Dt:
01/12/2006
Title:
TECHNIQUE FOR FORMING A SUBSTRATE HAVING CRYSTALLINE SEMICONDUCTOR REGIONS OF DIFFERENT CHARACTERISTICS
45
Patent #:
Issue Dt:
04/15/2008
Application #:
11100249
Filing Dt:
04/06/2005
Publication #:
Pub Dt:
10/20/2005
Title:
OVERLAY TARGET AND MEASUREMENT METHOD USING REFERENCE AND SUB-GRIDS
46
Patent #:
Issue Dt:
06/17/2008
Application #:
11101333
Filing Dt:
04/07/2005
Publication #:
Pub Dt:
10/12/2006
Title:
EFFICIENT PRESENTATION OF FUNCTIONAL COVERAGE RESULTS
47
Patent #:
Issue Dt:
09/23/2008
Application #:
11102292
Filing Dt:
04/08/2005
Publication #:
Pub Dt:
10/12/2006
Title:
INTEGRATED CIRCUIT TRANSFORMER DEVICES FOR ON-CHIP MILLIMETER-WAVE APPLICATIONS
48
Patent #:
Issue Dt:
04/29/2008
Application #:
11105615
Filing Dt:
04/14/2005
Publication #:
Pub Dt:
11/02/2006
Title:
METHOD AND SYSTEM FOR PARAMETRIC REDUCTION OF SEQUENTIAL DESIGNS
49
Patent #:
Issue Dt:
03/25/2008
Application #:
11105616
Filing Dt:
04/14/2005
Publication #:
Pub Dt:
11/02/2006
Title:
METHOD AND SYSTEM FOR REVERSING THE EFFECTS OF SEQUENTIAL REPARAMETERIZATION ON TRACES
50
Patent #:
Issue Dt:
08/26/2008
Application #:
11105814
Filing Dt:
04/13/2005
Title:
A SYSTEM FOR CONTROLLING POWER TO SEQUENTIAL AND COMBINATORIAL LOGIC CIRCUITRY IN AN INTEGRATED CIRCUIT
51
Patent #:
Issue Dt:
03/01/2011
Application #:
11105849
Filing Dt:
04/14/2005
Publication #:
Pub Dt:
11/24/2005
Title:
NON-VOLATILE RESISTANCE SWITCHING MEMORY
52
Patent #:
Issue Dt:
12/22/2009
Application #:
11106774
Filing Dt:
04/15/2005
Publication #:
Pub Dt:
06/01/2006
Title:
EVENT LIST SPECIFICATION BASED RADIO INTERFACE CONTROL
53
Patent #:
Issue Dt:
05/29/2007
Application #:
11106887
Filing Dt:
04/15/2005
Publication #:
Pub Dt:
10/19/2006
Title:
MIM CAPACITOR AND METHOD OF FABRICATING SAME
54
Patent #:
Issue Dt:
06/07/2011
Application #:
11106913
Filing Dt:
04/15/2005
Publication #:
Pub Dt:
10/19/2006
Title:
HIGH-DENSITY LOW-POWER DATA RETENTION POWER GATING WITH DOUBLE-GATE DEVICES
55
Patent #:
Issue Dt:
10/20/2009
Application #:
11107611
Filing Dt:
04/15/2005
Publication #:
Pub Dt:
10/19/2006
Title:
HYBRID CRYSTAL ORIENTATION CMOS STRUCTURE FOR ADAPTIVE WELL BIASING AND FOR POWER AND PERFORMANCE ENHANCEMENT
56
Patent #:
Issue Dt:
09/25/2007
Application #:
11108012
Filing Dt:
04/15/2005
Publication #:
Pub Dt:
10/19/2006
Title:
HYBRID BULK-SOI 6T-SRAM CELL FOR IMPROVED CELL STABILITY AND PERFORMANCE
57
Patent #:
Issue Dt:
08/17/2010
Application #:
11110165
Filing Dt:
04/20/2005
Title:
ORDERED POROSITY TO DIRECT MEMORY ELEMENT FORMATION
58
Patent #:
Issue Dt:
02/20/2007
Application #:
11111409
Filing Dt:
04/21/2005
Publication #:
Pub Dt:
08/25/2005
Title:
BIASED, TRIPLE-WELL FULLY DEPLETED SOI STRUCTURE
59
Patent #:
Issue Dt:
12/04/2007
Application #:
11111454
Filing Dt:
04/21/2005
Publication #:
Pub Dt:
10/26/2006
Title:
ALIGNMENT INSENSITIVE D-CACHE CELL
60
Patent #:
Issue Dt:
11/06/2007
Application #:
11112527
Filing Dt:
04/22/2005
Publication #:
Pub Dt:
10/26/2006
Title:
METHOD TO DIFFERENTIALLY CONTROL LC VOLTAGE-CONTROLLED OSCILLATORS
61
Patent #:
Issue Dt:
08/21/2007
Application #:
11115606
Filing Dt:
04/27/2005
Publication #:
Pub Dt:
11/02/2006
Title:
METHOD AND APPARATUS TO DISABLE COMPACTION OF TEST RESPONSES IN DETERMINISTIC TEST-SET EMBEDDING-BASED BIST
62
Patent #:
Issue Dt:
12/16/2008
Application #:
11116053
Filing Dt:
04/27/2005
Publication #:
Pub Dt:
11/02/2006
Title:
FIELD EFFECT TRANSISTOR WITH MIXED-CRYSTAL-ORIENTATION CHANNEL AND SOURCE/DRAIN REGIONS
63
Patent #:
Issue Dt:
10/30/2007
Application #:
11116625
Filing Dt:
04/28/2005
Publication #:
Pub Dt:
11/02/2006
Title:
METHODS AND APPARATUS FOR REDUCING MEMORY ERRORS
64
Patent #:
Issue Dt:
06/10/2008
Application #:
11116700
Filing Dt:
04/27/2005
Publication #:
Pub Dt:
11/02/2006
Title:
MEMORY AND LOGIC DEVICES USING ELECTRONICALLY SCANNABLE MULTIPLEXING DEVICES
65
Patent #:
Issue Dt:
04/01/2008
Application #:
11117276
Filing Dt:
04/27/2005
Publication #:
Pub Dt:
11/02/2006
Title:
ELECTRONICALLY SCANNABLE MULTIPLEXING DEVICE
66
Patent #:
Issue Dt:
04/10/2007
Application #:
11121454
Filing Dt:
05/04/2005
Publication #:
Pub Dt:
10/20/2005
Title:
SILICON GERMANIUM HETEROJUNCTION BIPOLAR TRANSISTOR WITH CARBON INCORPORATION
67
Patent #:
Issue Dt:
12/10/2013
Application #:
11122152
Filing Dt:
05/04/2005
Publication #:
Pub Dt:
09/08/2005
Title:
Method and apparatus for dynamic manipulation and dispersion in photonic crystal devices
68
Patent #:
Issue Dt:
09/23/2008
Application #:
11124247
Filing Dt:
05/06/2005
Publication #:
Pub Dt:
10/06/2005
Title:
HIGH TOLERANCE TCR BALANCED HIGH CURRENT RESISTOR FOR RF CMOS AND RF SIGE BICMOS APPLICATIONS AND CADENCED BASED HIERARCHICAL PARAMETERIZED CELL DESIGN KIT WITH TUNABLE TCR AND ESD RESISTOR BALLASTING FEATURE
69
Patent #:
Issue Dt:
10/21/2008
Application #:
11124324
Filing Dt:
05/06/2005
Publication #:
Pub Dt:
09/08/2005
Title:
METHOD OF CREATING DEEP TRENCH CAPACITOR USING A P+ METAL ELECTRODE
70
Patent #:
Issue Dt:
05/27/2008
Application #:
11124978
Filing Dt:
05/09/2005
Publication #:
Pub Dt:
09/15/2005
Title:
SPLIT POLY-SIGE/POLY-SI ALLOY GATE STACK
71
Patent #:
Issue Dt:
10/30/2007
Application #:
11125063
Filing Dt:
05/09/2005
Publication #:
Pub Dt:
10/06/2005
Title:
DOUBLE GATED TRANSISTOR AND METHOD OF FABRICATION
72
Patent #:
Issue Dt:
03/18/2008
Application #:
11125456
Filing Dt:
05/10/2005
Title:
SYSTEM AND METHOD FOR TRACE MESSAGING
73
Patent #:
Issue Dt:
11/06/2007
Application #:
11125696
Filing Dt:
05/10/2005
Publication #:
Pub Dt:
11/16/2006
Title:
METHOD AND SYSTEM FOR LINE-DIMENSION CONTROL OF AN ETCH PROCESS
74
Patent #:
Issue Dt:
04/08/2008
Application #:
11125971
Filing Dt:
05/09/2005
Publication #:
Pub Dt:
11/09/2006
Title:
PHOTORESISTS FOR VISIBLE LIGHT IMAGING
75
Patent #:
Issue Dt:
01/22/2008
Application #:
11126675
Filing Dt:
05/11/2005
Publication #:
Pub Dt:
09/29/2005
Title:
METHOD AND STRUCTURE FOR BURIED CIRCUITS AND DEVICES
76
Patent #:
Issue Dt:
10/23/2007
Application #:
11127175
Filing Dt:
05/12/2005
Title:
POLYMER SPACERS FOR CREATING SUB-LITHOGRAPHIC SPACES
77
Patent #:
Issue Dt:
06/17/2008
Application #:
11128069
Filing Dt:
05/12/2005
Publication #:
Pub Dt:
11/16/2006
Title:
INTEGRATED CIRCUIT DESIGN UTILIZING ARRAY OF FUNCTIONALLY INTERCHANGEABLE DYNAMIC LOGIC CELLS
78
Patent #:
Issue Dt:
03/16/2010
Application #:
11128389
Filing Dt:
05/13/2005
Title:
SYSTEM AND METHOD FOR IMPROVING OXIDE-NITRIDE-OXIDE (ONO) COUPLING IN A SEMICONDUCTOR DEVICE
79
Patent #:
Issue Dt:
04/08/2008
Application #:
11129784
Filing Dt:
05/16/2005
Publication #:
Pub Dt:
01/12/2006
Title:
GENIE: A METHOD FOR CLASSIFICATION AND GRAPHICAL DISPLAY OF NEGATIVE SLACK TIMING TEST FAILURES
80
Patent #:
Issue Dt:
12/04/2007
Application #:
11129785
Filing Dt:
05/16/2005
Publication #:
Pub Dt:
01/19/2006
Title:
NEGATIVE SLACK RECOVERABILITY FACTOR - A NET WEIGHT TO ENHANCE TIMING CLOSURE BEHAVIOR
81
Patent #:
Issue Dt:
05/13/2008
Application #:
11130078
Filing Dt:
05/16/2005
Publication #:
Pub Dt:
11/16/2006
Title:
PROCESS FOR PREPARING ELECTRONICS STRUCTURES USING A SACRIFICIAL MULTILAYER HARDMASK SCHEME
82
Patent #:
Issue Dt:
11/20/2007
Application #:
11130459
Filing Dt:
05/16/2005
Title:
METHOD AND APPARATUS FOR FAST DISTURBANCE DETECTION AND CLASSIFICIATION
83
Patent #:
Issue Dt:
04/03/2007
Application #:
11131534
Filing Dt:
05/18/2005
Publication #:
Pub Dt:
11/23/2006
Title:
CIRCUITS AND METHODS FOR IMPLEMENTING POWER AMPLIFIERS FOR MILLIMETER WAVE APPLICATIONS
84
Patent #:
Issue Dt:
06/12/2007
Application #:
11135227
Filing Dt:
05/23/2005
Publication #:
Pub Dt:
12/07/2006
Title:
VERTICAL FET WITH NANOWIRE CHANNELS AND A SILICIDED BOTTOM CONTACT
85
Patent #:
Issue Dt:
09/18/2007
Application #:
11135720
Filing Dt:
05/24/2005
Publication #:
Pub Dt:
04/13/2006
Title:
CHIP BOND LAYOUT FOR CHIP CARRIER FOR FLIP CHIP APPLICATIONS
86
Patent #:
Issue Dt:
12/25/2007
Application #:
11136256
Filing Dt:
05/24/2005
Publication #:
Pub Dt:
11/30/2006
Title:
SYSTEMS, METHODS, AND MEDIA FOR BLOCK-BASED ASSERTION GENERATION, QUALIFICATION AND ANALYSIS
87
Patent #:
Issue Dt:
11/25/2008
Application #:
11136872
Filing Dt:
05/25/2005
Publication #:
Pub Dt:
11/30/2006
Title:
METHOD FOR AN EQUALIZER COMPUTATION IN A MEDIA SYSTEM USING A DATA SET SEPARATOR SEQUENCE
88
Patent #:
Issue Dt:
10/28/2008
Application #:
11137234
Filing Dt:
05/25/2005
Publication #:
Pub Dt:
11/30/2006
Title:
METHODS AND APPARATUS FOR REDUCING LEAKAGE CURRENT IN A DISABLED SOI CIRCUIT
89
Patent #:
Issue Dt:
02/26/2008
Application #:
11137245
Filing Dt:
05/25/2005
Publication #:
Pub Dt:
11/30/2006
Title:
CROSSTALK REDUCTION IN ELECTRICAL INTERCONNECTS USING DIFFERENTIAL SIGNALING
90
Patent #:
Issue Dt:
07/29/2008
Application #:
11138797
Filing Dt:
05/26/2005
Publication #:
Pub Dt:
05/18/2006
Title:
DEVICE COMPRISING DOPED NANO-COMPONENT AND METHOD OF FORMING THE DEVICE
91
Patent #:
Issue Dt:
08/14/2007
Application #:
11140780
Filing Dt:
05/31/2005
Publication #:
Pub Dt:
11/30/2006
Title:
MEMORY DEVICE AND METHOD OF MANUFACTURING THE DEVICE BY SIMULTANEOUSLY CONDITIONING TRANSITION METAL OXIDE LAYERS IN A PLURALITY OF MEMORY CELLS
92
Patent #:
Issue Dt:
06/12/2007
Application #:
11140803
Filing Dt:
05/31/2005
Title:
SERIAL INTERFACE HAVING A READ TEMPERATURE COMMAND
93
Patent #:
Issue Dt:
03/04/2008
Application #:
11142566
Filing Dt:
06/01/2005
Publication #:
Pub Dt:
12/07/2006
Title:
SYSTEM AND METHOD FOR CREATING A STANDARD CELL LIBRARY FOR REDUCED LEAKAGE AND IMPROVED PERFORMANCE
94
Patent #:
Issue Dt:
10/07/2008
Application #:
11146441
Filing Dt:
06/06/2005
Publication #:
Pub Dt:
12/07/2006
Title:
APPARATUS AND METHOD FOR FAR END NOISE REDUCTION USING CAPACITIVE CANCELLATION BY OFFSET WIRING
95
Patent #:
Issue Dt:
10/16/2007
Application #:
11146495
Filing Dt:
06/06/2005
Publication #:
Pub Dt:
12/07/2006
Title:
PLANAR ARRAY CONTACT MEMORY CARDS
96
Patent #:
Issue Dt:
06/17/2008
Application #:
11146863
Filing Dt:
06/07/2005
Publication #:
Pub Dt:
12/07/2006
Title:
MICROPROCESSOR INCLUDING A CONFIGURABLE TRANSLATION LOOKASIDE BUFFER
97
Patent #:
Issue Dt:
04/17/2007
Application #:
11147003
Filing Dt:
06/07/2005
Title:
HYSTERISIS MANAGEMENT FOR DELAY LINE
98
Patent #:
Issue Dt:
06/29/2010
Application #:
11147383
Filing Dt:
06/08/2005
Publication #:
Pub Dt:
12/14/2006
Title:
RAISED SOURCE AND DRAIN PROCESS WITH DISPOSABLE SPACERS
99
Patent #:
Issue Dt:
09/18/2007
Application #:
11148737
Filing Dt:
06/09/2005
Publication #:
Pub Dt:
12/15/2005
Title:
SEMICONDUCTOR DEVICE WITH A HIGH THERMAL DISSIPATION EFFICIENCY
100
Patent #:
Issue Dt:
05/22/2007
Application #:
11150188
Filing Dt:
06/13/2005
Publication #:
Pub Dt:
12/14/2006
Title:
METHOD AND STRUCTURE FOR HIGH PERFORMANCE PHASE CHANGE MEMORY
Assignor
1
Exec Dt:
11/27/2018
Assignee
1
1100 NORTH MARKET STREET
WILMINGTON, DELAWARE 19801
Correspondence name and address
CT CORPORATION
4400 EASTON COMMONS WAY
SUITE 125
COLUMBUS, OH 43219

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