|
|
Patent #:
|
|
Issue Dt:
|
06/02/2009
|
Application #:
|
11150565
|
Filing Dt:
|
06/10/2005
|
Publication #:
|
|
Pub Dt:
|
12/15/2005
| | | | |
Title:
|
ANTIREFLECTIVE FILM-FORMING COMPOSITION, METHOD FOR MANUFACTURING THE SAME, AND ANTIREFLECTIVE FILM AND PATTERN FORMATION METHOD USING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
12/19/2006
|
Application #:
|
11151007
|
Filing Dt:
|
06/14/2005
|
Publication #:
|
|
Pub Dt:
|
10/27/2005
| | | | |
Title:
|
MEMORY DEVICE AND METHOD OF MAKING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
09/11/2007
|
Application #:
|
11151317
|
Filing Dt:
|
06/14/2005
|
Title:
|
PCI-X ERROR CORRECTING CODE (ECC) PIN SHARING CONFIGURATION
|
|
|
Patent #:
|
|
Issue Dt:
|
02/02/2010
|
Application #:
|
11151318
|
Filing Dt:
|
06/14/2005
|
Title:
|
CONTROL OF PCI MEMORY READ BEHAVIOR USING MEMORY READ ALIAS AND MEMORY COMMAND REISSUE BITS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/02/2007
|
Application #:
|
11151470
|
Filing Dt:
|
06/13/2005
|
Publication #:
|
|
Pub Dt:
|
10/13/2005
| | | | |
Title:
|
MAGNETIC TUNNEL JUNCTIONS WITH IMPROVED TUNNELING MAGNETO-RESISTANCE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/24/2008
|
Application #:
|
11151480
|
Filing Dt:
|
06/13/2005
|
Publication #:
|
|
Pub Dt:
|
10/27/2005
| | | | |
Title:
|
LITHOGRAPHY TOOL IMAGE QUALITY EVALUATING AND CORRECTING
|
|
|
Patent #:
|
|
Issue Dt:
|
08/26/2008
|
Application #:
|
11151550
|
Filing Dt:
|
06/14/2005
|
Title:
|
STRAINED-SILICON DEVICE WITH DIFFERENT SILICON THICKNESSES
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/2008
|
Application #:
|
11151830
|
Filing Dt:
|
06/14/2005
|
Publication #:
|
|
Pub Dt:
|
12/14/2006
| | | | |
Title:
|
COMPLIANT THERMAL INTERFACE STRUCTURE UTILIZING SPRING ELEMENTS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/05/2008
|
Application #:
|
11151843
|
Filing Dt:
|
06/14/2005
|
Publication #:
|
|
Pub Dt:
|
12/14/2006
| | | | |
Title:
|
COMPLIANT THERMAL INTERFACE STRUCTURE UTILIZING SPRING ELEMENTS WITH FINS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/22/2008
|
Application #:
|
11151905
|
Filing Dt:
|
06/14/2005
|
Publication #:
|
|
Pub Dt:
|
12/14/2006
| | | | |
Title:
|
COOLING STRUCTURE USING RIGID MOVABLE ELEMENTS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/17/2008
|
Application #:
|
11152750
|
Filing Dt:
|
06/14/2005
|
Publication #:
|
|
Pub Dt:
|
12/14/2006
| | | | |
Title:
|
REPROGRAMMABLE FUSE STRUCTURE AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
12/11/2007
|
Application #:
|
11153047
|
Filing Dt:
|
06/15/2005
|
Publication #:
|
|
Pub Dt:
|
12/21/2006
| | | | |
Title:
|
CAPACITANCE MODELING
|
|
|
Patent #:
|
|
Issue Dt:
|
02/12/2008
|
Application #:
|
11153570
|
Filing Dt:
|
06/13/2005
|
Publication #:
|
|
Pub Dt:
|
10/20/2005
| | | | |
Title:
|
SYSTEM AND METHOD FOR REMOTE OPTICAL DIGITAL NETWORKING OF COMPUTING DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/23/2008
|
Application #:
|
11154905
|
Filing Dt:
|
06/16/2005
|
Publication #:
|
|
Pub Dt:
|
01/04/2007
| | | | |
Title:
|
METHOD AND APPARATUS TO SIMULATE AND VERIFY SIGNAL GLITCHING
|
|
|
Patent #:
|
|
Issue Dt:
|
10/21/2008
|
Application #:
|
11155030
|
Filing Dt:
|
06/16/2005
|
Publication #:
|
|
Pub Dt:
|
12/21/2006
| | | | |
Title:
|
COPLANAR SILICON-ON-INSULATOR (SOI) REGIONS OF DIFFERENT CRYSTAL ORIENTATIONS AND METHODS OF MAKING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
06/24/2008
|
Application #:
|
11157090
|
Filing Dt:
|
06/20/2005
|
Publication #:
|
|
Pub Dt:
|
12/21/2006
| | | | |
Title:
|
METHOD AND APPARATUS OF CAPACITY LEARNING FOR COMPUTER SYSTEMS AND APPLICATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/04/2009
|
Application #:
|
11158726
|
Filing Dt:
|
06/22/2005
|
Publication #:
|
|
Pub Dt:
|
10/27/2005
| | | | |
Title:
|
HIGH SPEED LATERAL HETEROJUNCTION MISFETS REALIZED BY 2-DIMENSIONAL BANDGAP ENGINEERING AND METHODS THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
04/15/2008
|
Application #:
|
11159946
|
Filing Dt:
|
06/23/2005
|
Publication #:
|
|
Pub Dt:
|
12/28/2006
| | | | |
Title:
|
TOPCOAT COMPOSITIONS AND METHODS OF USE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
10/17/2006
|
Application #:
|
11160054
|
Filing Dt:
|
06/07/2005
|
Title:
|
SENSE AMPLIFIER INCLUDING MULTIPLE CONDUCTION STATE FIELD EFFECT TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
06/24/2008
|
Application #:
|
11160151
|
Filing Dt:
|
06/10/2005
|
Publication #:
|
|
Pub Dt:
|
12/14/2006
| | | | |
Title:
|
SECURE ELECTRICALLY PROGRAMMABLE FUSE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/10/2008
|
Application #:
|
11160156
|
Filing Dt:
|
06/10/2005
|
Publication #:
|
|
Pub Dt:
|
12/28/2006
| | | | |
Title:
|
IMMERSION LITHOGRAPHY WITH EQUALIZED PRESSURE ON AT LEAST PROJECTION OPTICS COMPONENT AND WAFER
|
|
|
Patent #:
|
|
Issue Dt:
|
07/29/2008
|
Application #:
|
11160184
|
Filing Dt:
|
08/19/2005
|
Publication #:
|
|
Pub Dt:
|
12/08/2005
| | | | |
Title:
|
SELECTIVELY CHANGEABLE LINE WIDTH MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
12/04/2007
|
Application #:
|
11160268
|
Filing Dt:
|
06/16/2005
|
Publication #:
|
|
Pub Dt:
|
12/08/2005
| | | | |
Title:
|
ENABLING MEMORY REDUNDANCY DURING TESTING
|
|
|
Patent #:
|
|
Issue Dt:
|
12/05/2006
|
Application #:
|
11160273
|
Filing Dt:
|
06/16/2005
|
Publication #:
|
|
Pub Dt:
|
12/21/2006
| | | | |
Title:
|
SINGLE CYCLE REFRESH OF MULTI-PORT DYNAMIC RANDOM ACCESS MEMORY (DRAM)
|
|
|
Patent #:
|
|
Issue Dt:
|
01/29/2008
|
Application #:
|
11160307
|
Filing Dt:
|
06/17/2005
|
Publication #:
|
|
Pub Dt:
|
12/15/2005
| | | | |
Title:
|
NESTED DESIGN APPROACH
|
|
|
Patent #:
|
|
Issue Dt:
|
08/12/2008
|
Application #:
|
11160361
|
Filing Dt:
|
06/21/2005
|
Publication #:
|
|
Pub Dt:
|
12/21/2006
| | | | |
Title:
|
SUBSTRATE BACKGATE FOR TRIGATE FET
|
|
|
Patent #:
|
|
Issue Dt:
|
06/14/2011
|
Application #:
|
11160457
|
Filing Dt:
|
06/24/2005
|
Publication #:
|
|
Pub Dt:
|
12/28/2006
| | | | |
Title:
|
DENSE PITCH BULK FINFET PROCESS BY SELECTIVE EPI AND ETCH
|
|
|
Patent #:
|
|
Issue Dt:
|
08/19/2008
|
Application #:
|
11160463
|
Filing Dt:
|
06/24/2005
|
Publication #:
|
|
Pub Dt:
|
12/28/2006
| | | | |
Title:
|
MULTI-LEVEL INTERCONNECTIONS FOR AN INTEGRATED CIRCUIT CHIP
|
|
|
Patent #:
|
|
Issue Dt:
|
11/04/2008
|
Application #:
|
11160468
|
Filing Dt:
|
06/24/2005
|
Publication #:
|
|
Pub Dt:
|
01/18/2007
| | | | |
Title:
|
METHOD AND STRUCTURE FOR CHARGE DISSIPATION DURING FABRICATION OF INTEGRATED CIRCUITS AND ISOLATION THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
04/17/2007
|
Application #:
|
11160667
|
Filing Dt:
|
07/05/2005
|
Publication #:
|
|
Pub Dt:
|
01/11/2007
| | | | |
Title:
|
APPARATUS AND METHOD FOR SELECTED SITE BACKSIDE UNDERLAYING OF Si, GaAs, Gax Aly Asz OF SOI TECHNOLOGIES FOR SCANNING PROBE MICROSCOPY AND ATOMIC FORCE PROBING CHARACTERIZATION
|
|
|
Patent #:
|
|
Issue Dt:
|
07/05/2011
|
Application #:
|
11160956
|
Filing Dt:
|
07/18/2005
|
Publication #:
|
|
Pub Dt:
|
01/18/2007
| | | | |
Title:
|
VERTICAL PNP TRANSISTOR AND METHOD OF MAKING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
09/11/2007
|
Application #:
|
11160997
|
Filing Dt:
|
07/19/2005
|
Publication #:
|
|
Pub Dt:
|
03/01/2007
| | | | |
Title:
|
THERMAL PASTE CONTAINMENT FOR SEMICONDUCTOR MODULES
|
|
|
Patent #:
|
|
Issue Dt:
|
04/15/2008
|
Application #:
|
11161066
|
Filing Dt:
|
07/21/2005
|
Publication #:
|
|
Pub Dt:
|
01/25/2007
| | | | |
Title:
|
STRUCTURE AND METHOD FOR IMPROVED STRESS AND YIELD IN PFETS WITH EMBEDDED SIGE SOURCE/DRAIN REGIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/23/2010
|
Application #:
|
11161146
|
Filing Dt:
|
07/25/2005
|
Publication #:
|
|
Pub Dt:
|
01/25/2007
| | | | |
Title:
|
SHARED GATE FOR CONVENTIONAL PLANAR DEVICE AND HORIZONTAL CNT
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2008
|
Application #:
|
11161183
|
Filing Dt:
|
07/26/2005
|
Publication #:
|
|
Pub Dt:
|
02/01/2007
| | | | |
Title:
|
NON-VOLATILE SWITCHING AND MEMORY DEVICES USING VERTICAL NANOTUBES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/30/2007
|
Application #:
|
11161213
|
Filing Dt:
|
07/27/2005
|
Publication #:
|
|
Pub Dt:
|
02/01/2007
| | | | |
Title:
|
VIRTUAL BODY-CONTACTED TRIGATE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/30/2007
|
Application #:
|
11161321
|
Filing Dt:
|
07/29/2005
|
Publication #:
|
|
Pub Dt:
|
02/15/2007
| | | | |
Title:
|
APPARATUS AND METHOD FOR DYNAMIC CONTROL OF DOUBLE GATE DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
01/18/2011
|
Application #:
|
11161330
|
Filing Dt:
|
07/29/2005
|
Publication #:
|
|
Pub Dt:
|
02/01/2007
| | | | |
Title:
|
SUPERVISORY OPERATING SYSTEM FOR RUNNING MULTIPLE CHILD OPERATING SYSTEMS SIMULTANEOUSLY AND OPTIMIZING RESOURCE USAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/19/2009
|
Application #:
|
11161414
|
Filing Dt:
|
08/02/2005
|
Publication #:
|
|
Pub Dt:
|
02/08/2007
| | | | |
Title:
|
INTER-CHIP ESD PROTECTION STRUCTURE FOR HIGH SPEED AND HIGH FREQUENCY DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
07/15/2008
|
Application #:
|
11161415
|
Filing Dt:
|
08/02/2005
|
Publication #:
|
|
Pub Dt:
|
02/08/2007
| | | | |
Title:
|
METHOD FOR HIGH PERFORMANCE INDUCTOR FABRICATION USING A TRIPLE DAMASCENE PROCESS WITH COPPER BEOL
|
|
|
Patent #:
|
|
Issue Dt:
|
09/08/2009
|
Application #:
|
11161599
|
Filing Dt:
|
08/09/2005
|
Publication #:
|
|
Pub Dt:
|
02/15/2007
| | | | |
Title:
|
VIA BOTTOM CONTACT AND METHOD OF MANUFACTURING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
11/14/2006
|
Application #:
|
11161628
|
Filing Dt:
|
08/10/2005
|
Title:
|
DRAM WITH SELF-RESETTING DATA PATH FOR REDUCED POWER CONSUMPTION
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2008
|
Application #:
|
11161630
|
Filing Dt:
|
08/10/2005
|
Publication #:
|
|
Pub Dt:
|
02/15/2007
| | | | |
Title:
|
EVAPORATION CONTROL USING COATING
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2008
|
Application #:
|
11161742
|
Filing Dt:
|
08/15/2005
|
Publication #:
|
|
Pub Dt:
|
02/15/2007
| | | | |
Title:
|
VOLTAGE CONTROLLED STATIC RANDOM ACCESS MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
02/03/2009
|
Application #:
|
11161832
|
Filing Dt:
|
08/18/2005
|
Publication #:
|
|
Pub Dt:
|
02/22/2007
| | | | |
Title:
|
INTEGRATED BEOL THIN FILM RESISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
10/23/2012
|
Application #:
|
11161932
|
Filing Dt:
|
08/23/2005
|
Publication #:
|
|
Pub Dt:
|
05/10/2007
| | | | |
Title:
|
STACKABLE PROGRAMMABLE PASSIVE DEVICE AND A TESTING METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
12/02/2008
|
Application #:
|
11161962
|
Filing Dt:
|
08/24/2005
|
Publication #:
|
|
Pub Dt:
|
03/01/2007
| | | | |
Title:
|
DUAL PORT GAIN CELL WITH SIDE AND TOP GATED READ TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
05/27/2008
|
Application #:
|
11162196
|
Filing Dt:
|
08/31/2005
|
Publication #:
|
|
Pub Dt:
|
03/01/2007
| | | | |
Title:
|
METHOD OF FACILITATING INTEGRATED CIRCUIT DESIGN USING MANUFACTURED PROPERTY VALUES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/02/2007
|
Application #:
|
11162413
|
Filing Dt:
|
09/09/2005
|
Publication #:
|
|
Pub Dt:
|
03/15/2007
| | | | |
Title:
|
TRENCH METAL-INSULATOR-METAL (MIM) CAPACITORS INTEGRATED WITH MIDDLE-OF-LINE METAL CONTACTS, AND METHOD OF FABRICATING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
04/22/2008
|
Application #:
|
11162471
|
Filing Dt:
|
09/12/2005
|
Publication #:
|
|
Pub Dt:
|
03/15/2007
| | | | |
Title:
|
INTEGRATION OF A MIM CAPACITOR WITH A PLATE FORMED IN A WELL REGION AND WITH A HIGH-K DIELECTRIC
|
|
|
Patent #:
|
|
Issue Dt:
|
06/05/2007
|
Application #:
|
11162472
|
Filing Dt:
|
09/12/2005
|
Publication #:
|
|
Pub Dt:
|
03/15/2007
| | | | |
Title:
|
SILICON-ON-INSULATOR (SOI) READ ONLY MEMORY (ROM) ARRAY AND METHOD OF MAKING A SOI ROM
|
|
|
Patent #:
|
|
Issue Dt:
|
07/15/2008
|
Application #:
|
11162660
|
Filing Dt:
|
09/19/2005
|
Publication #:
|
|
Pub Dt:
|
03/22/2007
| | | | |
Title:
|
ASYMMETRICALLY STRESSED CMOS FINFET
|
|
|
Patent #:
|
|
Issue Dt:
|
06/26/2012
|
Application #:
|
11162661
|
Filing Dt:
|
09/19/2005
|
Publication #:
|
|
Pub Dt:
|
03/22/2007
| | | | |
Title:
|
PROCESS FOR SINGLE AND MULTIPLE LEVEL METAL-INSULATOR-METAL INTEGRATION WITH A SINGLE MASK
|
|
|
Patent #:
|
|
Issue Dt:
|
01/29/2008
|
Application #:
|
11162663
|
Filing Dt:
|
09/19/2005
|
Publication #:
|
|
Pub Dt:
|
03/22/2007
| | | | |
Title:
|
DENSE CHEVRON FINFET AND METHOD OF MANUFACTURING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
07/21/2009
|
Application #:
|
11162666
|
Filing Dt:
|
09/19/2005
|
Publication #:
|
|
Pub Dt:
|
03/22/2007
| | | | |
Title:
|
METHOD OF FORMING AN INTERCONNECT INCLUDING A DIELECTRIC CAP HAVING A TENSILE STRESS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/19/2012
|
Application #:
|
11162765
|
Filing Dt:
|
09/22/2005
|
Publication #:
|
|
Pub Dt:
|
03/22/2007
| | | | |
Title:
|
MICROELECTRONIC SUBSTRATE HAVING REMOVABLE EDGE EXTENSION ELEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
10/09/2007
|
Application #:
|
11162766
|
Filing Dt:
|
09/22/2005
|
Publication #:
|
|
Pub Dt:
|
03/22/2007
| | | | |
Title:
|
LIKE INTEGRATED CIRCUIT DEVICES WITH DIFFERENT DEPTH
|
|
|
Patent #:
|
|
Issue Dt:
|
06/17/2008
|
Application #:
|
11162776
|
Filing Dt:
|
09/22/2005
|
Publication #:
|
|
Pub Dt:
|
03/22/2007
| | | | |
Title:
|
TRENCH METAL-INSULATOR-METAL (MIM) CAPACITORS AND METHOD OF FABRICATING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
10/20/2009
|
Application #:
|
11162780
|
Filing Dt:
|
09/22/2005
|
Publication #:
|
|
Pub Dt:
|
03/22/2007
| | | | |
Title:
|
HIGHLY MANUFACTURABLE SRAM CELLS IN SUBSTRATES WITH HYBRID CRYSTAL ORIENTATION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/11/2007
|
Application #:
|
11162846
|
Filing Dt:
|
09/26/2005
|
Publication #:
|
|
Pub Dt:
|
03/29/2007
| | | | |
Title:
|
CIRCUIT DESIGN VERIFICATION USING CHECKPOINTING
|
|
|
Patent #:
|
|
Issue Dt:
|
02/22/2011
|
Application #:
|
11162847
|
Filing Dt:
|
09/26/2005
|
Publication #:
|
|
Pub Dt:
|
03/29/2007
| | | | |
Title:
|
CIRCUIT AND METHOD FOR CONTROLLING A STANDBY VOLTAGE LEVEL OF A MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
04/10/2007
|
Application #:
|
11162953
|
Filing Dt:
|
09/29/2005
|
Publication #:
|
|
Pub Dt:
|
03/29/2007
| | | | |
Title:
|
STRESS ENGINEERING USING DUAL PAD NITRIDE WITH SELECTIVE SOI DEVICE ARCHITECTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/16/2007
|
Application #:
|
11162997
|
Filing Dt:
|
09/30/2005
|
Publication #:
|
|
Pub Dt:
|
04/05/2007
| | | | |
Title:
|
FPGA POWERUP TO KNOWN FUNCTIONAL STATE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/08/2008
|
Application #:
|
11163165
|
Filing Dt:
|
10/07/2005
|
Publication #:
|
|
Pub Dt:
|
04/12/2007
| | | | |
Title:
|
STRUCTURE AND METHOD FOR FORMING ASYMMETRICAL OVERLAP CAPACITANCE IN FIELD EFFECT TRANSISTORS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/18/2008
|
Application #:
|
11163327
|
Filing Dt:
|
10/14/2005
|
Publication #:
|
|
Pub Dt:
|
04/19/2007
| | | | |
Title:
|
METHOD AND APPARATUS FOR POINT OF CARE OSMOLARITY TESTING
|
|
|
Patent #:
|
|
Issue Dt:
|
05/22/2007
|
Application #:
|
11163686
|
Filing Dt:
|
10/27/2005
|
Publication #:
|
|
Pub Dt:
|
05/03/2007
| | | | |
Title:
|
TRANSISTOR HAVING DIELECTRIC STRESSOR ELEMENTS FOR APPLYING IN-PLANE SHEAR STRESS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/25/2008
|
Application #:
|
11163687
|
Filing Dt:
|
10/27/2005
|
Publication #:
|
|
Pub Dt:
|
05/03/2007
| | | | |
Title:
|
STRUCTURE AND METHOD OF FABRICATING FINFET WITH BURIED CHANNEL
|
|
|
Patent #:
|
|
Issue Dt:
|
06/10/2008
|
Application #:
|
11163696
|
Filing Dt:
|
10/27/2005
|
Publication #:
|
|
Pub Dt:
|
05/03/2007
| | | | |
Title:
|
TEST YIELD ESTIMATE FOR SEMICONDUCTOR PRODUCTS CREATED FROM A LIBRARY
|
|
|
Patent #:
|
|
Issue Dt:
|
10/23/2007
|
Application #:
|
11163800
|
Filing Dt:
|
10/31/2005
|
Publication #:
|
|
Pub Dt:
|
05/03/2007
| | | | |
Title:
|
SYSTEM AND METHOD FOR CAPACITIVE MIS-MATCH BIT-LINE SENSING
|
|
|
Patent #:
|
|
Issue Dt:
|
10/30/2007
|
Application #:
|
11163835
|
Filing Dt:
|
11/01/2005
|
Publication #:
|
|
Pub Dt:
|
05/24/2007
| | | | |
Title:
|
HOISTING APPARATUS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/02/2010
|
Application #:
|
11163908
|
Filing Dt:
|
11/03/2005
|
Publication #:
|
|
Pub Dt:
|
05/03/2007
| | | | |
Title:
|
GATE ELECTRODE STRESS CONTROL FOR FINFET PERFORMANCE ENHANCEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
07/08/2008
|
Application #:
|
11163948
|
Filing Dt:
|
11/04/2005
|
Publication #:
|
|
Pub Dt:
|
05/24/2007
| | | | |
Title:
|
STRUCTURE AND METHOD FOR MONITORING STRESS-INDUCED DEGRADATION OF CONDUCTIVE INTERCONNECTS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/15/2009
|
Application #:
|
11164072
|
Filing Dt:
|
11/09/2005
|
Publication #:
|
|
Pub Dt:
|
05/10/2007
| | | | |
Title:
|
LIGHT SHIELD FOR CMOS IMAGER
|
|
|
Patent #:
|
|
Issue Dt:
|
02/17/2009
|
Application #:
|
11164109
|
Filing Dt:
|
11/10/2005
|
Publication #:
|
|
Pub Dt:
|
05/10/2007
| | | | |
Title:
|
COMPLEMENTARY CARBON NANOTUBE TRIPLE GATE TECHNOLOGY
|
|
|
Patent #:
|
|
Issue Dt:
|
07/31/2007
|
Application #:
|
11164214
|
Filing Dt:
|
11/15/2005
|
Publication #:
|
|
Pub Dt:
|
05/17/2007
| | | | |
Title:
|
SCHOTTKY BARRIER DIODE AND METHOD OF FORMING A SCHOTTKY BARRIER DIODE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/05/2008
|
Application #:
|
11164216
|
Filing Dt:
|
11/15/2005
|
Publication #:
|
|
Pub Dt:
|
05/17/2007
| | | | |
Title:
|
CORNER DOMINATED TRIGATE FIELD EFFECT TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
05/27/2008
|
Application #:
|
11164217
|
Filing Dt:
|
11/15/2005
|
Publication #:
|
|
Pub Dt:
|
05/17/2007
| | | | |
Title:
|
SEMICONDUCTOR OPTICAL SENSORS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/27/2007
|
Application #:
|
11164224
|
Filing Dt:
|
11/15/2005
|
Title:
|
METHOD AND STRUCTURE FOR ENHANCING BOTH NMOSFET AND PMOSFET PERFORMANCE WITH A STRESSED FILM
|
|
|
Patent #:
|
|
Issue Dt:
|
08/05/2008
|
Application #:
|
11164377
|
Filing Dt:
|
11/21/2005
|
Publication #:
|
|
Pub Dt:
|
05/24/2007
| | | | |
Title:
|
METHOD AND STRUCTURE FOR CHARGE DISSIPATION IN INTEGRATED CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/02/2010
|
Application #:
|
11164378
|
Filing Dt:
|
11/21/2005
|
Publication #:
|
|
Pub Dt:
|
05/24/2007
| | | | |
Title:
|
STRUCTURE AND METHOD FOR MOSFET WITH REDUCED EXTENSION RESISTANCE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/23/2008
|
Application #:
|
11164381
|
Filing Dt:
|
11/21/2005
|
Publication #:
|
|
Pub Dt:
|
05/24/2007
| | | | |
Title:
|
TRENCH MEMORY CELLS WITH BURIED ISOLATION COLLARS, AND METHODS OF FABRICATING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
04/07/2009
|
Application #:
|
11164513
|
Filing Dt:
|
11/28/2005
|
Publication #:
|
|
Pub Dt:
|
05/31/2007
| | | | |
Title:
|
VERTICAL SOI TRENCH SONOS CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
10/19/2010
|
Application #:
|
11164651
|
Filing Dt:
|
11/30/2005
|
Publication #:
|
|
Pub Dt:
|
05/31/2007
| | | | |
Title:
|
LOW-COST FEOL FOR ULTRA-LOW POWER, NEAR SUB-VTH DEVICE STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
01/18/2011
|
Application #:
|
11164684
|
Filing Dt:
|
12/01/2005
|
Publication #:
|
|
Pub Dt:
|
06/07/2007
| | | | |
Title:
|
COMBINED STEPPER AND DEPOSITION TOOL
|
|
|
Patent #:
|
|
Issue Dt:
|
10/27/2009
|
Application #:
|
11164765
|
Filing Dt:
|
12/05/2005
|
Publication #:
|
|
Pub Dt:
|
09/07/2006
| | | | |
Title:
|
SUSPENDED TRANSMISSION LINE STRUCTURES IN BACK END OF LINE PROCESSING
|
|
|
Patent #:
|
|
Issue Dt:
|
05/06/2008
|
Application #:
|
11164792
|
Filing Dt:
|
12/06/2005
|
Publication #:
|
|
Pub Dt:
|
06/07/2007
| | | | |
Title:
|
Y-SHAPED CARBON NANOTUBES AS AFM PROBE FOR ANALYZING SUBSTRATES WITH ANGLED TOPOGRAPHY
|
|
|
Patent #:
|
|
Issue Dt:
|
04/10/2007
|
Application #:
|
11165330
|
Filing Dt:
|
06/24/2005
|
Title:
|
METHOD OF FORMING A MEMORY DEVICE HAVING IMPROVED ERASE SPEED
|
|
|
Patent #:
|
|
Issue Dt:
|
04/03/2007
|
Application #:
|
11167662
|
Filing Dt:
|
06/27/2005
|
Publication #:
|
|
Pub Dt:
|
10/27/2005
| | | | |
Title:
|
STRUCTURE FOR REPAIRING OR MODIFYING SURFACE CONNECTIONS ON CIRCUIT BOARDS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/12/2008
|
Application #:
|
11168691
|
Filing Dt:
|
06/28/2005
|
Publication #:
|
|
Pub Dt:
|
12/28/2006
| | | | |
Title:
|
METHOD FOR POWER CONSUMPTION REDUCTION IN A LIMITED-SWITCH DYNAMIC LOGIC (LSDL) CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
02/26/2008
|
Application #:
|
11168692
|
Filing Dt:
|
06/28/2005
|
Publication #:
|
|
Pub Dt:
|
12/28/2006
| | | | |
Title:
|
DUAL GATE TRANSISTOR KEEPER DYNAMIC LOGIC
|
|
|
Patent #:
|
|
Issue Dt:
|
01/15/2008
|
Application #:
|
11172473
|
Filing Dt:
|
06/30/2005
|
Publication #:
|
|
Pub Dt:
|
01/04/2007
| | | | |
Title:
|
NON-VOLATILE CONTENT ADDRESSABLE MEMORY USING PHASE-CHANGE-MATERIAL MEMORY ELEMENTS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/28/2007
|
Application #:
|
11173257
|
Filing Dt:
|
07/01/2005
|
Publication #:
|
|
Pub Dt:
|
02/01/2007
| | | | |
Title:
|
USE OF SUPERCRITICAL FLUID TO DRY WAFER AND CLEAN LENS IN IMMERSION LITHOGRAPHY
|
|
|
Patent #:
|
|
Issue Dt:
|
03/27/2012
|
Application #:
|
11173388
|
Filing Dt:
|
07/01/2005
|
Title:
|
CIRCUIT MODULE AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
06/13/2006
|
Application #:
|
11174400
|
Filing Dt:
|
07/01/2005
|
Title:
|
SRAM DEVICES UTILIZING TENSILE-STRESSED STRAIN FILMS AND METHODS FOR FABRICATING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
03/18/2008
|
Application #:
|
11176712
|
Filing Dt:
|
07/07/2005
|
Publication #:
|
|
Pub Dt:
|
11/24/2005
| | | | |
Title:
|
WIRING OPTIMIZATIONS FOR POWER
|
|
|
Patent #:
|
|
Issue Dt:
|
02/12/2008
|
Application #:
|
11177127
|
Filing Dt:
|
07/07/2005
|
Publication #:
|
|
Pub Dt:
|
01/11/2007
| | | | |
Title:
|
HARNESSING MACHINE LEARNING TO IMPROVE THE SUCCESS RATE OF STIMULI GENERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
09/04/2007
|
Application #:
|
11179282
|
Filing Dt:
|
07/12/2005
|
Publication #:
|
|
Pub Dt:
|
12/01/2005
| | | | |
Title:
|
SEMICONDUCTOR SUBSTRATE LAYER CONFIGURED FOR INDUCEMENT OF COMPRESSIVE OR EXPANSIVE FORCE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/04/2007
|
Application #:
|
11180416
|
Filing Dt:
|
07/13/2005
|
Publication #:
|
|
Pub Dt:
|
02/08/2007
| | | | |
Title:
|
METHOD FOR ENABLING SCAN OF DEFECTIVE RAM PRIOR TO REPAIR
|
|
|
Patent #:
|
|
Issue Dt:
|
05/20/2008
|
Application #:
|
11180740
|
Filing Dt:
|
07/13/2005
|
Publication #:
|
|
Pub Dt:
|
01/12/2006
| | | | |
Title:
|
METHODS FOR PLACEMENT WHICH MAINTAIN OPTIMIZED BEHAVIOR, WHILE IMPROVING WIREABILITY POTENTIAL
|
|
|
Patent #:
|
|
Issue Dt:
|
02/05/2008
|
Application #:
|
11180788
|
Filing Dt:
|
07/14/2005
|
Publication #:
|
|
Pub Dt:
|
01/18/2007
| | | | |
Title:
|
ANTIREFLECTIVE COMPOSITION AND PROCESS OF MAKING A LITHOGRAPHIC STRUCTURE
|
|