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05/29/2008
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04/19/2007
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05/03/2007
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05/15/2008
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05/15/2008
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07/21/2009
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05/15/2008
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01/18/2011
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05/15/2008
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05/15/2008
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12/30/2008
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05/15/2008
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05/26/2009
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05/15/2008
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08/04/2009
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05/15/2008
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10/26/2010
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05/15/2008
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07/15/2008
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05/22/2008
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08/24/2010
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11/17/2006
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05/22/2008
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01/13/2009
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11/17/2006
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05/31/2007
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02/05/2008
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11/17/2006
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05/31/2007
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11/09/2010
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05/22/2008
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01/04/2011
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11/20/2006
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05/22/2008
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08/11/2009
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11/21/2006
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05/22/2008
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02/23/2010
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11/22/2006
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05/22/2008
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11/22/2006
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05/22/2008
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12/16/2008
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11/30/2006
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06/05/2008
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02/02/2010
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11/30/2006
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06/05/2008
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04/13/2010
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12/01/2006
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06/05/2008
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02/09/2010
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12/05/2006
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11/01/2007
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10/04/2011
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12/05/2006
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06/05/2008
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12/04/2007
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08/23/2006
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03/22/2007
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04/06/2010
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06/19/2008
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12/28/2010
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10/31/2006
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05/25/2010
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05/15/2008
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07/12/2011
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07/26/2011
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05/29/2008
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07/26/2011
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06/08/2010
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12/08/2006
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11/01/2007
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06/28/2011
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06/12/2008
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07/19/2011
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12/11/2006
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06/12/2008
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03/29/2011
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06/12/2008
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11/23/2010
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09/27/2007
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11/03/2009
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12/12/2006
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06/12/2008
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05/17/2011
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06/12/2008
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02/01/2011
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06/19/2008
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11/23/2010
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06/19/2008
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06/19/2008
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11/16/2010
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12/19/2006
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06/19/2008
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01/26/2010
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12/19/2006
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06/19/2008
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06/19/2008
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04/22/2008
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07/26/2011
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10/04/2007
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01/19/2010
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12/21/2006
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05/10/2007
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09/22/2009
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12/22/2006
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11/15/2007
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09/21/2010
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12/24/2006
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01/17/2008
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08/14/2007
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12/27/2006
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08/17/2010
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12/28/2006
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07/03/2008
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12/02/2008
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12/28/2006
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07/03/2008
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07/29/2008
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12/30/2006
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05/31/2007
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04/13/2010
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07/03/2008
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Title:
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METHOD FOR CO-ALIGNMENT OF MIXED OPTICAL AND ELECTRON BEAM LITHOGRAPHIC FABRICATION LEVELS
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Patent #:
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Issue Dt:
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06/10/2008
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Application #:
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11618993
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Filing Dt:
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01/02/2007
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Publication #:
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Pub Dt:
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07/03/2008
| | | | |
Title:
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METHOD OF DETERMINING STOPPING POWERS OF DESIGN STRUCTURES WITH RESPECT TO A TRAVELING PARTICLE
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Patent #:
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Issue Dt:
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04/01/2008
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Application #:
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11619019
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Filing Dt:
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01/02/2007
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Title:
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PHASE SHIFTING AND COMBINING ARCHITECTURE FOR PHASED ARRAYS
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Patent #:
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Issue Dt:
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09/22/2009
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Application #:
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11619235
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Filing Dt:
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01/03/2007
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Publication #:
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Pub Dt:
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12/06/2007
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Title:
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METALLIZATION LAYER OF A SEMICONDUCTOR DEVICE HAVING DIFFERENTLY THICK METAL LINES AND A METHOD OF FORMING THE SAME
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Patent #:
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Issue Dt:
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07/07/2009
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Application #:
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11619264
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Filing Dt:
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01/03/2007
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Publication #:
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Pub Dt:
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07/03/2008
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Title:
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REVERSIBLE ELECTRIC FUSE AND ANTIFUSE STRUCTURES FOR SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
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04/21/2009
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Application #:
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11619357
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Filing Dt:
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01/03/2007
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Publication #:
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Pub Dt:
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07/03/2008
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Title:
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DUAL STRESS STI
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Patent #:
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Issue Dt:
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10/05/2010
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Application #:
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11619511
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Filing Dt:
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01/03/2007
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Publication #:
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Pub Dt:
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05/17/2007
| | | | |
Title:
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STRAINED-SILICON CMOS DEVICE AND METHOD
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Patent #:
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Issue Dt:
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09/28/2010
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Application #:
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11619623
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Filing Dt:
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01/04/2007
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Publication #:
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Pub Dt:
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07/10/2008
| | | | |
Title:
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METHOD OF FORMING VERTICAL CONTACTS IN INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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11/10/2009
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Application #:
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11619637
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Filing Dt:
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01/04/2007
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Publication #:
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Pub Dt:
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07/10/2008
| | | | |
Title:
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SPATIALLY LOCATING RFID TAGS USING MULTIPLE READERS AND CORRECTION FACTORS
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Patent #:
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Issue Dt:
|
03/30/2010
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Application #:
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11619691
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Filing Dt:
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01/04/2007
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Publication #:
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Pub Dt:
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07/10/2008
| | | | |
Title:
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DATA-DRIVEN FINITE STATE MACHINE ENGINE FOR FLOW CONTROL
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Patent #:
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Issue Dt:
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12/30/2008
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Application #:
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11619748
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Filing Dt:
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01/04/2007
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Publication #:
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Pub Dt:
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05/17/2007
| | | | |
Title:
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DUAL DAMASCENE MULTI-LEVEL METALLIZATION
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Patent #:
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Issue Dt:
|
04/13/2010
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Application #:
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11619928
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Filing Dt:
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01/04/2007
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Publication #:
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Pub Dt:
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07/10/2008
| | | | |
Title:
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PATTERNED METAL THERMAL INTERFACE
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Patent #:
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Issue Dt:
|
04/23/2013
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Application #:
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11620138
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Filing Dt:
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01/05/2007
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Publication #:
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Pub Dt:
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07/10/2008
| | | | |
Title:
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SCALED-DOWN PHASE CHANGE MEMORY CELL IN RECESSED HEATER
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|
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Patent #:
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|
Issue Dt:
|
03/16/2010
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Application #:
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11620242
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Filing Dt:
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01/05/2007
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Publication #:
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Pub Dt:
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07/10/2008
| | | | |
Title:
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BIPOLAR TRANSISTOR WITH SILICIDED SUB-COLLECTOR
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Patent #:
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Issue Dt:
|
12/02/2008
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Application #:
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11620282
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Filing Dt:
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01/05/2007
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Publication #:
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Pub Dt:
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07/10/2008
| | | | |
Title:
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HIERARCHICAL 2T-DRAM WITH SELF-TIMED SENSING
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|
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Patent #:
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Issue Dt:
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12/30/2008
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Application #:
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11620297
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Filing Dt:
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01/05/2007
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Publication #:
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Pub Dt:
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07/10/2008
| | | | |
Title:
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HIERARCHICAL SIX-TRANSISTOR SRAM
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Patent #:
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Issue Dt:
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02/09/2010
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Application #:
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11620406
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Filing Dt:
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01/05/2007
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Publication #:
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Pub Dt:
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12/06/2007
| | | | |
Title:
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METHOD OF INCREASING TRANSISTOR DRIVE CURRENT BY RECESSING AN ISOLATION TRENCH
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|
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Patent #:
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Issue Dt:
|
01/04/2011
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Application #:
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11620423
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Filing Dt:
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01/05/2007
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Publication #:
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Pub Dt:
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07/10/2008
| | | | |
Title:
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METHODS FOR FABRICATING SILICON CARRIERS WITH CONDUCTIVE THROUGH-VIAS WITH LOW STRESS AND LOW DEFECT DENSITY
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|
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Patent #:
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Issue Dt:
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05/26/2009
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Application #:
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11620445
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Filing Dt:
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01/05/2007
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Publication #:
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Pub Dt:
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07/10/2008
| | | | |
Title:
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MEMORY STORAGE DEVICES COMPRISING DIFFERENT FERROMAGNETIC MATERIAL LAYERS, AND METHODS OF MAKING AND USING THE SAME
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|
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Patent #:
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Issue Dt:
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06/15/2010
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Application #:
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11620480
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Filing Dt:
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01/05/2007
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Publication #:
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Pub Dt:
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07/10/2008
| | | | |
Title:
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FORMATION OF NANOSTRUCTURES COMPRISING COMPOSITIONALLY MODULATED FERROMAGNETIC LAYERS BY PULSED ECD
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Patent #:
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|
Issue Dt:
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05/10/2011
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Application #:
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11621016
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Filing Dt:
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01/08/2007
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Publication #:
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Pub Dt:
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07/10/2008
| | | | |
Title:
|
TEST CIRCUIT FOR SERIAL LINK RECEIVER
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|
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Patent #:
|
|
Issue Dt:
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06/09/2009
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Application #:
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11621175
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Filing Dt:
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01/09/2007
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Publication #:
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Pub Dt:
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07/10/2008
| | | | |
Title:
|
SYSTEM ARCHITECTURES FOR AND METHODS OF SCHEDULING ON-CHIP AND ACROSS-CHIP NOISE EVENTS IN AN INTEGRATED CIRCUIT
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|
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Patent #:
|
|
Issue Dt:
|
05/26/2009
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Application #:
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11621228
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Filing Dt:
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01/09/2007
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Publication #:
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Pub Dt:
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07/10/2008
| | | | |
Title:
|
CURVED FINFETS
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|
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Patent #:
|
|
Issue Dt:
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10/07/2008
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Application #:
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11621248
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Filing Dt:
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01/09/2007
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Publication #:
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Pub Dt:
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07/10/2008
| | | | |
Title:
|
TIME BASED DRIVER OUTPUT TRANSITION (SLEW) RATE COMPENSATION
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|
|
Patent #:
|
|
Issue Dt:
|
08/23/2011
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Application #:
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11621361
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Filing Dt:
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01/09/2007
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Publication #:
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Pub Dt:
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07/10/2008
| | | | |
Title:
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TESTING AN OPERATION OF INTEGRATED CIRCUITRY
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|
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Patent #:
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Issue Dt:
|
10/26/2010
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Application #:
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11621383
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Filing Dt:
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01/09/2007
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Publication #:
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Pub Dt:
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07/10/2008
| | | | |
Title:
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PSEUDO-STRING BASED PATTERN RECOGNITION IN L3GO DESIGNS
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|
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Patent #:
|
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Issue Dt:
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10/26/2010
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Application #:
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11621389
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Filing Dt:
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01/09/2007
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Publication #:
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Pub Dt:
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07/10/2008
| | | | |
Title:
|
METAL CATALYZED SELECTIVE DEPOSITION OF MATERIALS INCLUDING GERMANIUM AND ANTIMONY
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|
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Patent #:
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Issue Dt:
|
04/12/2011
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Application #:
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11621699
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Filing Dt:
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01/10/2007
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Publication #:
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Pub Dt:
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07/10/2008
| | | | |
Title:
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ELECTRICALLY CONDUCTIVE PATH FORMING BELOW BARRIER OXIDE LAYER AND INTEGRATED CIRCUIT
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|
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Patent #:
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|
Issue Dt:
|
05/31/2011
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Application #:
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11621864
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Filing Dt:
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01/10/2007
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Publication #:
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Pub Dt:
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07/10/2008
| | | | |
Title:
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HETEROJUNCTION BIPOLAR TRANSISTOR (HBT) WITH SELF-ALIGNED SUB-LITHOGRAPHIC METAL-SEMICONDUCTOR ALLOY BASE CONTACTS
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|
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Patent #:
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Issue Dt:
|
02/15/2011
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Application #:
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11621871
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Filing Dt:
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01/10/2007
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Publication #:
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Pub Dt:
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07/10/2008
| | | | |
Title:
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SELF-ALIGNED METAL-SEMICONDUCTOR ALLOY AND METALLIZATION FOR SUB-LITHOGRAPHIC SOURCE AND DRAIN CONTACTS
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|
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Patent #:
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Issue Dt:
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12/22/2009
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Application #:
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11622057
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Filing Dt:
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01/11/2007
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Publication #:
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Pub Dt:
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07/17/2008
| | | | |
Title:
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STRUCTURE AND METHOD TO FORM IMPROVED ISOLATION IN A SEMICONDUCTOR DEVICE
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|
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Patent #:
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Issue Dt:
|
05/27/2014
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Application #:
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11622166
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Filing Dt:
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01/11/2007
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Publication #:
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Pub Dt:
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07/17/2008
| | | | |
Title:
|
METHOD AND APPARATUS FOR ON-CHIP PHASE ERROR MEASUREMENT TO DETERMINE JITTER IN PHASE-LOCKED LOOPS
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|
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Patent #:
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Issue Dt:
|
07/15/2008
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Application #:
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11622172
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Filing Dt:
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01/11/2007
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Publication #:
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Pub Dt:
|
08/07/2008
| | | | |
Title:
|
MEMORY CELL WITH INDEPENDENT-GATE CONTROLLED ACCESS DEVICES AND MEMORY USING THE CELL
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|
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Patent #:
|
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Issue Dt:
|
05/24/2011
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Application #:
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11622358
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Filing Dt:
|
01/11/2007
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Publication #:
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Pub Dt:
|
07/17/2008
| | | | |
Title:
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CORE-SHELL NANOWIRE TRANSISTOR
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|
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Patent #:
|
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Issue Dt:
|
03/06/2012
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Application #:
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11622445
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Filing Dt:
|
01/11/2007
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Publication #:
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Pub Dt:
|
07/17/2008
| | | | |
Title:
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ASYNCHRONOUS DATA INTERFACE
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|
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Patent #:
|
|
Issue Dt:
|
02/10/2009
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Application #:
|
11622519
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Filing Dt:
|
01/12/2007
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Publication #:
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Pub Dt:
|
07/17/2008
| | | | |
Title:
|
METHOD FOR IMPLEMENTING EFUSE SENSE AMPLIFIER TESTING WITHOUT BLOWING THE EFUSE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/05/2009
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Application #:
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11622543
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Filing Dt:
|
01/12/2007
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Publication #:
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Pub Dt:
|
07/17/2008
| | | | |
Title:
|
LOW-COST STRAINED SOI SUBSTRATE FOR HIGH-PERFORMANCE CMOS TECHNOLOGY
|
|
|
Patent #:
|
|
Issue Dt:
|
04/06/2010
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Application #:
|
11622586
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Filing Dt:
|
01/12/2007
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Publication #:
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Pub Dt:
|
07/17/2008
| | | | |
Title:
|
METHODS FOR FORMING DUAL FULLY SILICIDED GATES OVER FINS OF FINFET DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
08/23/2011
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Application #:
|
11622616
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Filing Dt:
|
01/12/2007
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Publication #:
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Pub Dt:
|
07/17/2008
| | | | |
Title:
|
EFUSE CONTAINING SIGE STACK
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|
|
Patent #:
|
|
Issue Dt:
|
06/14/2011
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Application #:
|
11622812
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Filing Dt:
|
01/12/2007
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Publication #:
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Pub Dt:
|
07/17/2008
| | | | |
Title:
|
DRAIN-PUMPED SUB-HARMONIC MIXER FOR MILLIMETER WAVE APPLICATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/11/2009
|
Application #:
|
11623112
|
Filing Dt:
|
01/15/2007
|
Publication #:
|
|
Pub Dt:
|
07/17/2008
| | | | |
Title:
|
CURRENT CONTROL MECHANISM FOR DYNAMIC LOGIC KEEPER CIRCUITS IN AN INTEGRATED CIRCUIT AND METHOD OF REGULATING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
07/15/2008
|
Application #:
|
11623164
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Filing Dt:
|
01/15/2007
|
Publication #:
|
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Pub Dt:
|
07/17/2008
| | | | |
Title:
|
SEMICONDUCTOR STRUCTURE WITH FIELD SHIELD AND METHOD OF FORMING THE STRUCTURE.
|
|
|
Patent #:
|
|
Issue Dt:
|
12/09/2008
|
Application #:
|
11623185
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Filing Dt:
|
01/15/2007
|
Publication #:
|
|
Pub Dt:
|
07/17/2008
| | | | |
Title:
|
LEVEL-SHIFTING DIFFERENTIAL AMPLIFIER
|
|