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Reel/Frame:049490/0001   Pages: 892
Recorded: 11/29/2018
Conveyance: SECURITY AGREEMENT
Total properties: 13706
Page 53 of 138
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138
1
Patent #:
7960790
Issue Dt:
06/14/2011
Application #:
12119765
Filing Dt:
05/13/2008
Publication #:
US20080246090
Pub Dt:
10/09/2008
Title:
SELF-ALIGNED PLANAR DOUBLE-GATE TRANSISTOR STRUCTURE
2
Patent #:
7984204
Issue Dt:
07/19/2011
Application #:
12119924
Filing Dt:
05/13/2008
Publication #:
US20090287860
Pub Dt:
11/19/2009
Title:
PROGRAMMABLE DIRECT MEMORY ACCESS CONTROLLER HAVING PIPELINED AND SEQUENTIALLY CONNECTED STAGES
3
Patent #:
8271857
Issue Dt:
09/18/2012
Application #:
12119975
Filing Dt:
05/13/2008
Publication #:
US20090287982
Pub Dt:
11/19/2009
Title:
CORRECTING ERRORS IN LONGITUDINAL POSITION (LPOS) WORDS
4
Patent #:
8115303
Issue Dt:
02/14/2012
Application #:
12120029
Filing Dt:
05/13/2008
Publication #:
US20090283902
Pub Dt:
11/19/2009
Title:
SEMICONDUCTOR PACKAGE STRUCTURES HAVING LIQUID COOLERS INTEGRATED WITH FIRST LEVEL CHIP PACKAGE MODULES
5
Patent #:
7928436
Issue Dt:
04/19/2011
Application #:
12120455
Filing Dt:
05/14/2008
Publication #:
US20080211054
Pub Dt:
09/04/2008
Title:
METHODS FOR FORMING GERMANIUM-ON-INSULATOR SEMICONDUCTOR STRUCTURES USING A POROUS LAYER AND SEMICONDUCTOR STRUCTURES FORMED BY THESE METHODS
6
Patent #:
7863126
Issue Dt:
01/04/2011
Application #:
12120658
Filing Dt:
05/15/2008
Publication #:
US20090283838
Pub Dt:
11/19/2009
Title:
FABRICATION OF A CMOS STRUCTURE WITH A HIGH-K DIELECTRIC LAYER OXIDIZING AN ALUMINUM LAYER IN PFET REGION
7
Patent #:
8146046
Issue Dt:
03/27/2012
Application #:
12120701
Filing Dt:
05/15/2008
Publication #:
US20080216031
Pub Dt:
09/04/2008
Title:
DESIGN STRUCTURES FOR SEMICONDUCTOR STRUCTURES WITH ERROR DETECTION AND CORRECTION
8
Patent #:
7936017
Issue Dt:
05/03/2011
Application #:
12120836
Filing Dt:
05/15/2008
Publication #:
US20090283828
Pub Dt:
11/19/2009
Title:
REDUCED FLOATING BODY EFFECT WITHOUT IMPACT ON PERFORMANCE-ENHANCING STRESS
9
Patent #:
8053819
Issue Dt:
11/08/2011
Application #:
12120899
Filing Dt:
05/15/2008
Publication #:
US20080203445
Pub Dt:
08/28/2008
Title:
THREE-DIMENSIONAL CASCADED POWER DISTRIBUTION IN A SEMICONDUCTOR DEVICE
10
Patent #:
7937560
Issue Dt:
05/03/2011
Application #:
12121292
Filing Dt:
05/15/2008
Publication #:
US20090287905
Pub Dt:
11/19/2009
Title:
PROCESSOR PIPELINE ARCHITECTURE LOGIC STATE RETENTION SYSTEMS AND METHODS
11
Patent #:
8010925
Issue Dt:
08/30/2011
Application #:
12121397
Filing Dt:
05/15/2008
Publication #:
US20080301612
Pub Dt:
12/04/2008
Title:
METHOD AND SYSTEM FOR PLACEMENT OF ELECTRIC CIRCUIT COMPONENTS IN INTEGRATED CIRCUIT DESIGN
12
Patent #:
7867820
Issue Dt:
01/11/2011
Application #:
12121468
Filing Dt:
05/15/2008
Publication #:
US20080280399
Pub Dt:
11/13/2008
Title:
METHODS FOR FORMING CO-PLANAR WAFER-SCALE CHIP PACKAGES
13
Patent #:
8875272
Issue Dt:
10/28/2014
Application #:
12121689
Filing Dt:
05/15/2008
Publication #:
US20080289028
Pub Dt:
11/20/2008
Title:
FIREWALL FOR CONTROLLING CONNECTIONS BETWEEN A CLIENT MACHINE AND A NETWORK
14
Patent #:
7811879
Issue Dt:
10/12/2010
Application #:
12121875
Filing Dt:
05/16/2008
Publication #:
US20090286368
Pub Dt:
11/19/2009
Title:
PROCESS FOR PCM INTEGRATION WITH POLY-EMITTER BJT AS ACCESS DEVICE
15
Patent #:
7865340
Issue Dt:
01/04/2011
Application #:
12121962
Filing Dt:
05/16/2008
Publication #:
US20080255813
Pub Dt:
10/16/2008
Title:
PROBABILISTIC REGRESSION SUITES FOR FUNCTIONAL VERIFICATION
16
Patent #:
7968946
Issue Dt:
06/28/2011
Application #:
12122227
Filing Dt:
05/16/2008
Publication #:
US20080217691
Pub Dt:
09/11/2008
Title:
HIGHER PERFORMANCE CMOS ON (110) WAFERS
17
Patent #:
7966597
Issue Dt:
06/21/2011
Application #:
12122259
Filing Dt:
05/16/2008
Publication #:
US20080301618
Pub Dt:
12/04/2008
Title:
METHOD AND SYSTEM FOR ROUTING OF INTEGRATED CIRCUIT DESIGN
18
Patent #:
7870525
Issue Dt:
01/11/2011
Application #:
12122451
Filing Dt:
05/16/2008
Publication #:
US20080216036
Pub Dt:
09/04/2008
Title:
SLACK SENSITIVITY TO PARAMETER VARIATION BASED TIMING ANALYSIS
19
Patent #:
7842580
Issue Dt:
11/30/2010
Application #:
12122754
Filing Dt:
05/19/2008
Publication #:
US20090283854
Pub Dt:
11/19/2009
Title:
DESIGN STRUCTURE AND METHOD FOR BURIED INDUCTORS FOR ULTRA-HIGH RESISTIVITY WAFERS FOR SOI/RF SIGE APPLICATIONS
20
Patent #:
8001501
Issue Dt:
08/16/2011
Application #:
12122785
Filing Dt:
05/19/2008
Publication #:
US20090288046
Pub Dt:
11/19/2009
Title:
METHOD FOR CIRCUIT DESIGN
21
Patent #:
8039929
Issue Dt:
10/18/2011
Application #:
12122788
Filing Dt:
05/19/2008
Publication #:
US20080217692
Pub Dt:
09/11/2008
Title:
ASYMMETRICALLY STRESSED CMOS FINFET
22
Patent #:
9046788
Issue Dt:
06/02/2015
Application #:
12122929
Filing Dt:
05/19/2008
Publication #:
US20090284722
Pub Dt:
11/19/2009
Title:
METHOD FOR MONITORING FOCUS ON AN INTEGRATED WAFER
23
Patent #:
7652279
Issue Dt:
01/26/2010
Application #:
12122969
Filing Dt:
05/19/2008
Publication #:
US20080210925
Pub Dt:
09/04/2008
Title:
THREE-TERMINAL CASCADE SWITCH FOR CONTROLLING STATIC POWER CONSUMPTION IN INTEGRATED CIRCUITS
24
Patent #:
7951424
Issue Dt:
05/31/2011
Application #:
12122981
Filing Dt:
05/19/2008
Publication #:
US20090117277
Pub Dt:
05/07/2009
Title:
SELECTIVE PLACEMENT OF CARBON NANOTUBES ON OXIDE SURFACES
25
Patent #:
7923838
Issue Dt:
04/12/2011
Application #:
12122984
Filing Dt:
05/19/2008
Publication #:
US20080211100
Pub Dt:
09/04/2008
Title:
METHOD AND STRUCTURE FOR REDUCING CONTACT RESISTANCE BETWEEN SILICIDE CONTACT AND OVERLYING METALLIZATION
26
Patent #:
7486107
Issue Dt:
02/03/2009
Application #:
12123487
Filing Dt:
05/20/2008
Title:
METHOD FOR EXTENDING LIFETIME RELIABILITY OF DIGITAL LOGIC DEVICES THROUGH REVERSAL OF AGING MECHANISMS
27
Patent #:
7897451
Issue Dt:
03/01/2011
Application #:
12123524
Filing Dt:
05/20/2008
Publication #:
US20090142900
Pub Dt:
06/04/2009
Title:
METHOD FOR CREATING TENSILE STRAIN BY SELECTIVELY APPLYING STRESS MEMORIZATION TECHNIQUES TO NMOS TRANSISTORS
28
Patent #:
8228112
Issue Dt:
07/24/2012
Application #:
12123735
Filing Dt:
05/20/2008
Publication #:
US20090102542
Pub Dt:
04/23/2009
Title:
SWITCH WITH REDUCED INSERTION LOSS
29
Patent #:
8130887
Issue Dt:
03/06/2012
Application #:
12124106
Filing Dt:
05/20/2008
Publication #:
US20080285695
Pub Dt:
11/20/2008
Title:
METHOD AND ARRANGEMENTS FOR LINK POWER REDUCTION
30
Patent #:
8225255
Issue Dt:
07/17/2012
Application #:
12124472
Filing Dt:
05/21/2008
Publication #:
US20090290401
Pub Dt:
11/26/2009
Title:
PLACEMENT AND OPTIMIZATION OF PROCESS DUMMY CELLS
31
Patent #:
8108822
Issue Dt:
01/31/2012
Application #:
12124551
Filing Dt:
05/21/2008
Publication #:
US20090070718
Pub Dt:
03/12/2009
Title:
METHODOLOGY FOR PLACEMENT BASED ON CIRCUIT FUNCTION AND LATCHUP SENSITIVITY
32
Patent #:
7927968
Issue Dt:
04/19/2011
Application #:
12125106
Filing Dt:
05/22/2008
Publication #:
US20080220587
Pub Dt:
09/11/2008
Title:
DUAL STRESS STI
33
Patent #:
8017499
Issue Dt:
09/13/2011
Application #:
12125175
Filing Dt:
05/22/2008
Publication #:
US20080220588
Pub Dt:
09/11/2008
Title:
STRAINED SI MOSFET ON TENSILE-STRAINED SIGE-ON-INSULATOR (SGOI)
34
Patent #:
7904872
Issue Dt:
03/08/2011
Application #:
12125255
Filing Dt:
05/22/2008
Publication #:
US20090292828
Pub Dt:
11/26/2009
Title:
SYSTEM-ON-CHIP (SOC), DESIGN STRUCTURE AND METHOD
35
Patent #:
7904873
Issue Dt:
03/08/2011
Application #:
12125269
Filing Dt:
05/22/2008
Publication #:
US20090291533
Pub Dt:
11/26/2009
Title:
SYSTEM-ON-CHIP (SOC), DESIGN STRUCTURE AND METHOD
36
Patent #:
8003453
Issue Dt:
08/23/2011
Application #:
12125501
Filing Dt:
05/22/2008
Publication #:
US20080227259
Pub Dt:
09/18/2008
Title:
SELF-ALIGNED PROCESS FOR NANOTUBE/NANOWIRE FETS
37
Patent #:
7750418
Issue Dt:
07/06/2010
Application #:
12125508
Filing Dt:
05/22/2008
Publication #:
US20080217747
Pub Dt:
09/11/2008
Title:
INTRODUCTION OF METAL IMPURITY TO CHANGE WORKFUNCTION OF CONDUCTIVE ELECTRODES
38
Patent #:
7826251
Issue Dt:
11/02/2010
Application #:
12125637
Filing Dt:
05/22/2008
Publication #:
US20090290439
Pub Dt:
11/26/2009
Title:
HIGH PERFORMANCE METAL GATE POLYGATE 8 TRANSISTOR SRAM CELL WITH REDUCED VARIABILITY
39
Patent #:
7595554
Issue Dt:
09/29/2009
Application #:
12125971
Filing Dt:
05/23/2008
Publication #:
US20080217731
Pub Dt:
09/11/2008
Title:
AN INTERCONNECT STRUCTURE WITH DIELECTRIC AIR GAPS
40
Patent #:
7932514
Issue Dt:
04/26/2011
Application #:
12126015
Filing Dt:
05/23/2008
Publication #:
US20090289638
Pub Dt:
11/26/2009
Title:
MICROWAVE READOUT FOR FLUX-BIASED QUBITS
41
Patent #:
7919225
Issue Dt:
04/05/2011
Application #:
12126287
Filing Dt:
05/23/2008
Publication #:
US20090291389
Pub Dt:
11/26/2009
Title:
PHOTOPATTERNABLE DIELECTRIC MATERIALS FOR BEOL APPLICATIONS AND METHODS FOR USE
42
Patent #:
8108609
Issue Dt:
01/31/2012
Application #:
12126499
Filing Dt:
05/23/2008
Publication #:
US20090144492
Pub Dt:
06/04/2009
Title:
STRUCTURE FOR IMPLEMENTING DYNAMIC REFRESH PROTOCOLS FOR DRAM BASED CACHE
43
Patent #:
NONE
Issue Dt:
Application #:
12126546
Filing Dt:
05/23/2008
Publication #:
US20080289605
Pub Dt:
11/27/2008
Title:
ACTUATOR CONTROL APPARATUS
44
Patent #:
8054736
Issue Dt:
11/08/2011
Application #:
12126967
Filing Dt:
05/26/2008
Publication #:
US20080225677
Pub Dt:
09/18/2008
Title:
STORAGE DEVICE HAVING FLEXIBLE ARCHITECTURE AND FREE SCALABILITY
45
Patent #:
7781273
Issue Dt:
08/24/2010
Application #:
12127033
Filing Dt:
05/27/2008
Publication #:
US20080224258
Pub Dt:
09/18/2008
Title:
SEMICONDUCTOR STRUCTUE WITH MULTIPLE FINS HAVING DIFFERENT CHANNEL REGION HEIGHTS AND METHOD OF FORMING THE SEMICONDUCTOR STRUCTURE
46
Patent #:
7911025
Issue Dt:
03/22/2011
Application #:
12127080
Filing Dt:
05/27/2008
Publication #:
US20080224261
Pub Dt:
09/18/2008
Title:
FUSE/ANTI-FUSE STRUCTURE AND METHODS OF MAKING AND PROGRAMMING SAME
47
Patent #:
8010927
Issue Dt:
08/30/2011
Application #:
12127245
Filing Dt:
05/27/2008
Publication #:
US20090089719
Pub Dt:
04/02/2009
Title:
STRUCTURE FOR A STACKED POWER CLAMP HAVING A BIGFET GATE PULL-UP CIRCUIT
48
Patent #:
7900179
Issue Dt:
03/01/2011
Application #:
12127392
Filing Dt:
05/27/2008
Publication #:
US20090300565
Pub Dt:
12/03/2009
Title:
METHOD FOR PRIORITIZING NODES FOR REROUTING AND DEVICE THEREFOR
49
Patent #:
7832095
Issue Dt:
11/16/2010
Application #:
12127432
Filing Dt:
05/27/2008
Publication #:
US20090049688
Pub Dt:
02/26/2009
Title:
METHOD OF FORMING A LAND GRID ARRAY (LGA) INTERPOSER ARRANGEMENT UTILIZING METAL-ON-ELASTOMER HEMI-TORUS AND OTHER MULTIPLE POINTS OF CONTACT GEOMETRIES
50
Patent #:
8385207
Issue Dt:
02/26/2013
Application #:
12127631
Filing Dt:
05/27/2008
Publication #:
US20090296577
Pub Dt:
12/03/2009
Title:
METHOD AND APPARATUS FOR END-TO-END NETWORK CONGESTION MANAGEMENT
51
Patent #:
8010934
Issue Dt:
08/30/2011
Application #:
12127900
Filing Dt:
05/28/2008
Publication #:
US20080301596
Pub Dt:
12/04/2008
Title:
METHOD AND SYSTEM FOR TESTING BIT FAILURES IN ARRAY ELEMENTS OF AN ELECTRONIC CIRCUIT
52
Patent #:
8048330
Issue Dt:
11/01/2011
Application #:
12127921
Filing Dt:
05/28/2008
Publication #:
US20090170319
Pub Dt:
07/02/2009
Title:
METHOD OF FORMING AN INTERLAYER DIELECTRIC MATERIAL HAVING DIFFERENT REMOVAL RATES DURING CMP
53
Patent #:
8138546
Issue Dt:
03/20/2012
Application #:
12127946
Filing Dt:
05/28/2008
Publication #:
US20080224172
Pub Dt:
09/18/2008
Title:
ELECTROSTATIC DISCHARGE PROTECTION DEVICE AND METHOD OF FABRICATING SAME
54
Patent #:
8244391
Issue Dt:
08/14/2012
Application #:
12127972
Filing Dt:
05/28/2008
Publication #:
US20090299510
Pub Dt:
12/03/2009
Title:
METHOD FOR MINIMIZING PRODUCTIVITY LOSS WHILE USING A MANUFACTURING SCHEDULER
55
Patent #:
7968459
Issue Dt:
06/28/2011
Application #:
12128040
Filing Dt:
05/28/2008
Publication #:
US20080258220
Pub Dt:
10/23/2008
Title:
ION IMPLANTATION COMBINED WITH IN SITU OR EX SITU HEAT TREATMENT FOR IMPROVED FIELD EFFECT TRANSISTORS
56
Patent #:
7915884
Issue Dt:
03/29/2011
Application #:
12128058
Filing Dt:
05/28/2008
Publication #:
US20090024346
Pub Dt:
01/22/2009
Title:
IMPORTATION OF VIRTUAL SIGNALS INTO ELECTRONIC TEST EQUIPMENT TO FACILITATE TESTING OF AN ELECTRONIC COMPONENT
57
Patent #:
7838913
Issue Dt:
11/23/2010
Application #:
12128134
Filing Dt:
05/28/2008
Publication #:
US20090294800
Pub Dt:
12/03/2009
Title:
HYBRID FET INCORPORATING A FINFET AND A PLANAR FET
58
Patent #:
9287186
Issue Dt:
03/15/2016
Application #:
12128260
Filing Dt:
05/28/2008
Publication #:
US20080224135
Pub Dt:
09/18/2008
Title:
METHOD AND STRUCTURE FOR DETERMINING THERMAL CYCLE RELIABILITY
59
Patent #:
7620510
Issue Dt:
11/17/2009
Application #:
12128526
Filing Dt:
05/28/2008
Publication #:
US20080225615
Pub Dt:
09/18/2008
Title:
PULSED RING OSCILLATOR CIRCUIT FOR STORAGE CELL READ TIMING EVALUATION
60
Patent #:
7877222
Issue Dt:
01/25/2011
Application #:
12128654
Filing Dt:
05/29/2008
Publication #:
US20090021314
Pub Dt:
01/22/2009
Title:
STRUCTURE FOR A PHASE LOCKED LOOP WITH ADJUSTABLE VOLTAGE BASED ON TEMPERATURE
61
Patent #:
7958469
Issue Dt:
06/07/2011
Application #:
12128678
Filing Dt:
05/29/2008
Publication #:
US20090007047
Pub Dt:
01/01/2009
Title:
DESIGN STRUCTURE FOR A PHASE LOCKED LOOP WITH STABILIZED DYNAMIC RESPONSE
62
Patent #:
7913199
Issue Dt:
03/22/2011
Application #:
12128754
Filing Dt:
05/29/2008
Publication #:
US20080229270
Pub Dt:
09/18/2008
Title:
DESIGN STRUCTURE FOR A DUTY CYCLE CORRECTION CIRCUIT
63
Patent #:
7883941
Issue Dt:
02/08/2011
Application #:
12128908
Filing Dt:
05/29/2008
Publication #:
US20090298238
Pub Dt:
12/03/2009
Title:
METHODS FOR FABRICATING MEMORY CELLS AND MEMORY DEVICES INCORPORATING THE SAME
64
Patent #:
8056039
Issue Dt:
11/08/2011
Application #:
12128973
Filing Dt:
05/29/2008
Publication #:
US20090294973
Pub Dt:
12/03/2009
Title:
INTERCONNECT STRUCTURE FOR INTEGRATED CIRCUITS HAVING IMPROVED ELECTROMIGRATION CHARACTERISTICS
65
Patent #:
7768006
Issue Dt:
08/03/2010
Application #:
12129033
Filing Dt:
05/29/2008
Publication #:
US20090294873
Pub Dt:
12/03/2009
Title:
FIELD EFFECT STRUCTURE AND METHOD INCLUDING SPACER SHAPED METAL GATE WITH ASYMMETRIC SOURCE AND DRAIN REGIONS
66
Patent #:
7883916
Issue Dt:
02/08/2011
Application #:
12129714
Filing Dt:
05/30/2008
Publication #:
US20090294812
Pub Dt:
12/03/2009
Title:
OPTICAL SENSOR INCLUDING STACKED PHOTOSENSITIVE DIODES
67
Patent #:
7893468
Issue Dt:
02/22/2011
Application #:
12129716
Filing Dt:
05/30/2008
Publication #:
US20090294813
Pub Dt:
12/03/2009
Title:
OPTICAL SENSOR INCLUDING STACKED PHOTODIODES
68
Patent #:
8321762
Issue Dt:
11/27/2012
Application #:
12129778
Filing Dt:
05/30/2008
Publication #:
US20080244353
Pub Dt:
10/02/2008
Title:
METHOD FOR CREATING AN ERROR CORRECTION CODING SCHEME
69
Patent #:
8037085
Issue Dt:
10/11/2011
Application #:
12129976
Filing Dt:
05/30/2008
Publication #:
US20080228694
Pub Dt:
09/18/2008
Title:
PREDICATE SELECTION IN BIT-LEVEL COMPOSITIONAL TRANSFORMATIONS
70
Patent #:
8037215
Issue Dt:
10/11/2011
Application #:
12130167
Filing Dt:
05/30/2008
Publication #:
US20090144738
Pub Dt:
06/04/2009
Title:
PERFORMANCE EVALUATION OF ALGORITHMIC TASKS AND DYNAMIC PARAMETERIZATION ON MULTI-CORE PROCESSING SYSTEMS
71
Patent #:
8185779
Issue Dt:
05/22/2012
Application #:
12130216
Filing Dt:
05/30/2008
Publication #:
US20080228687
Pub Dt:
09/18/2008
Title:
CONTROLLING COMPUTER STORAGE SYSTEMS
72
Patent #:
7738284
Issue Dt:
06/15/2010
Application #:
12130408
Filing Dt:
05/30/2008
Publication #:
US20080225574
Pub Dt:
09/18/2008
Title:
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Title:
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Title:
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Title:
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Title:
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Assignor
1
GLOBALFOUNDRIES INC.
Exec Dt:
11/27/2018
Assignee
1
WILMINGTON TRUST, NATIONAL ASSOCIATION
1100 NORTH MARKET STREET
WILMINGTON, DELAWARE 19801
Correspondence name and address
CT CORPORATION
4400 EASTON COMMONS WAY
SUITE 125
COLUMBUS, OH 43219

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