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Patent #:
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Issue Dt:
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09/20/2011
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Application #:
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12134113
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Filing Dt:
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06/05/2008
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Publication #:
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Pub Dt:
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12/31/2009
| | | | |
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Title:
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SYSTEM, METHOD, AND SERVICE FOR TRACING TRAITORS FROM CONTENT PROTECTION CIRCUMVENTION DEVICES
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Patent #:
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Issue Dt:
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03/09/2010
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Application #:
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12134347
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Filing Dt:
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06/06/2008
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Publication #:
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Pub Dt:
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10/30/2008
| | | | |
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Title:
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PROGRAMMABLE HEAVY-ION SENSING DEVICE FOR ACCELERATED DRAM SOFT ERROR DETECTION
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Patent #:
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Issue Dt:
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06/01/2010
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Application #:
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12134748
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Filing Dt:
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06/06/2008
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Publication #:
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Pub Dt:
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12/10/2009
| | | | |
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Title:
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OPERATING CHARACTERISTIC MEASUREMENT DEVICE AND METHODS THEREOF
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Patent #:
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Issue Dt:
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05/24/2011
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Application #:
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12134883
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Filing Dt:
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06/06/2008
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Publication #:
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Pub Dt:
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12/25/2008
| | | | |
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Title:
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INTEGRATED CIRCUIT CHIP MODULE WITH MICROCHANNEL COOLING DEVICE HAVING SPECIFIC FLUID CHANNEL ARRANGEMENT
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Patent #:
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Issue Dt:
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12/28/2010
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Application #:
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12135229
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Filing Dt:
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06/09/2008
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Publication #:
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Pub Dt:
|
12/10/2009
| | | | |
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Title:
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APPARATUS AND METHOD FOR LOW POWER SENSING IN A MULTI-PORT SRAM USING PRE-DISCHARGED BIT LINES
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Patent #:
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Issue Dt:
|
02/08/2011
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Application #:
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12135231
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Filing Dt:
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06/09/2008
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Publication #:
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Pub Dt:
|
09/25/2008
| | | | |
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Title:
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METHOD OF GENERATING A FUNCTIONAL DESIGN STRUCTURE
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Patent #:
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Issue Dt:
|
06/14/2011
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Application #:
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12135232
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Filing Dt:
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06/09/2008
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Publication #:
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Pub Dt:
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09/25/2008
| | | | |
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Title:
|
DESIGN STRUCTURE FOR COMPENSATING FOR VARIANCES OF A BURIED RESISTOR IN AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
|
11/09/2010
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Application #:
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12135237
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Filing Dt:
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06/09/2008
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Publication #:
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Pub Dt:
|
12/10/2009
| | | | |
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Title:
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APPARATUS AND METHOD FOR LOW POWER, SINGLE-ENDED SENSING IN A MULTI-PORT SRAM USING PRE-DISCHARGED BIT LINES
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Patent #:
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Issue Dt:
|
01/24/2012
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Application #:
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12135242
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Filing Dt:
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06/09/2008
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Publication #:
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Pub Dt:
|
12/10/2009
| | | | |
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Title:
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PROGRAMMABLE ELECTRICAL FUSE
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Patent #:
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Issue Dt:
|
02/15/2011
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Application #:
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12135245
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Filing Dt:
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06/09/2008
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Publication #:
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Pub Dt:
|
10/02/2008
| | | | |
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Title:
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SELECTIVE DEPOSITION OF GERMANIUM SPACERS ON NITRIDE
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Patent #:
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Issue Dt:
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10/26/2010
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Application #:
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12135249
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Filing Dt:
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06/09/2008
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Publication #:
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Pub Dt:
|
12/10/2009
| | | | |
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Title:
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INTEGRATED CIRCUIT CONTAINING MULTI-STATE RESTORE CIRCUITRY FOR RESTORING STATE TO A POWER-MANAGED FUNCTIONAL BLOCK
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Patent #:
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Issue Dt:
|
08/07/2012
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Application #:
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12135250
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Filing Dt:
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06/09/2008
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Publication #:
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Pub Dt:
|
12/10/2009
| | | | |
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Title:
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METHOD OF DESIGNING MULTI-STATE RESTORE CIRCUITRY FOR RESTORING STATE TO A POWER-MANAGED FUNCTIONAL BLOCK
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Patent #:
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Issue Dt:
|
06/07/2011
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Application #:
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12135315
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Filing Dt:
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06/09/2008
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Publication #:
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Pub Dt:
|
12/10/2009
| | | | |
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Title:
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GLASS MOLD POLISHING METHOD AND STRUCTURE
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Patent #:
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Issue Dt:
|
07/27/2010
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Application #:
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12135478
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Filing Dt:
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06/09/2008
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Publication #:
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Pub Dt:
|
06/04/2009
| | | | |
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Title:
|
STRESSED INTERLAYER DIELECTRIC WITH REDUCED PROBABILITY FOR VOID GENERATION IN A SEMICONDUCTOR DEVICE BY USING AN INTERMEDIATE ETCH CONTROL LAYER OF INCREASED THICKNESS
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Patent #:
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Issue Dt:
|
04/27/2010
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Application #:
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12135498
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Filing Dt:
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06/09/2008
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Publication #:
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Pub Dt:
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11/06/2008
| | | | |
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Title:
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SYSTEMS AND METHODS FOR STORAGE AREA NETWORK DESIGN
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Patent #:
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Issue Dt:
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06/14/2011
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Application #:
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12135522
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Filing Dt:
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06/09/2008
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Publication #:
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Pub Dt:
|
12/10/2009
| | | | |
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Title:
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MULTIDIMENSIONAL PROCESS WINDOW OPTIMIZATION IN SEMICONDUCTOR MANUFACTURING
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Patent #:
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Issue Dt:
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09/14/2010
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Application #:
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12136158
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Filing Dt:
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06/10/2008
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Publication #:
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Pub Dt:
|
10/09/2008
| | | | |
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Title:
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METHOD OF MAKING INTEGRATED CIRCUIT (IC) INCLUDING AT LEAST ONE STORAGE CELL
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Patent #:
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Issue Dt:
|
01/26/2010
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Application #:
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12136163
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Filing Dt:
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06/10/2008
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Publication #:
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Pub Dt:
|
09/25/2008
| | | | |
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Title:
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POSITIVE PHOTORESIST COMPOSITION WITH A POLYMER INCLUDING A FLUOROSULFONAMIDE GROUP AND PROCESS FOR ITS USE
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Patent #:
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Issue Dt:
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02/14/2012
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Application #:
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12136187
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Filing Dt:
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06/10/2008
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Publication #:
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Pub Dt:
|
12/10/2009
| | | | |
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Title:
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METHOD AND APPARATUS FOR EFFICIENT GATHERING OF INFORMATION IN A MULTICORE SYSTEM
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Patent #:
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Issue Dt:
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09/06/2011
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Application #:
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12136246
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Filing Dt:
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06/10/2008
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Publication #:
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Pub Dt:
|
12/10/2009
| | | | |
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Title:
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STRUCTURE AND METHOD TO FORM DUAL SILICIDE E-FUSE
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Patent #:
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Issue Dt:
|
11/01/2011
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Application #:
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12136359
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Filing Dt:
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06/10/2008
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Publication #:
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Pub Dt:
|
10/02/2008
| | | | |
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Title:
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SYSTEM AND METHOD FOR BALANCING DELAY OF SIGNAL COMMUNICATION PATHS THROUGH WELL VOLTAGE ADJUSTMENT
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Patent #:
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Issue Dt:
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02/15/2011
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Application #:
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12136458
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Filing Dt:
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06/10/2008
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Publication #:
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Pub Dt:
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12/10/2009
| | | | |
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Title:
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PROCESSOR TEST SYSTEM UTILIZING FUNCTIONAL REDUNDANCY
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Patent #:
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Issue Dt:
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07/31/2012
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Application #:
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12136478
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Filing Dt:
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06/10/2008
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Publication #:
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Pub Dt:
|
10/02/2008
| | | | |
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Title:
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FAULT TOLERANT MUTUAL EXCLUSION LOCKS FOR SHARED MEMORY SYSTEMS
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Patent #:
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Issue Dt:
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02/07/2012
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Application #:
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12137628
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Filing Dt:
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06/12/2008
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Publication #:
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Pub Dt:
|
10/09/2008
| | | | |
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Title:
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METHOD AND SYSTEM PRODUCT FOR IMPLEMENTING UNCERTAINTY IN INTEGRATED CIRCUIT DESIGNS WITH PROGRAMMABLE LOGIC
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Patent #:
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Issue Dt:
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09/09/2014
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Application #:
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12137640
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Filing Dt:
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06/12/2008
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Publication #:
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Pub Dt:
|
12/17/2009
| | | | |
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Title:
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STRUCTURE AND METHOD TO FORM E-FUSE WITH ENHANCED CURRENT CROWDING
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Patent #:
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Issue Dt:
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01/04/2011
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Application #:
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12137743
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Filing Dt:
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06/12/2008
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Publication #:
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Pub Dt:
|
12/17/2009
| | | | |
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Title:
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CHEMICAL TRIM OF PHOTORESIST LINES BY MEANS OF A TUNED OVERCOAT MATERIAL
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Patent #:
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Issue Dt:
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05/10/2011
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Application #:
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12137953
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Filing Dt:
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06/12/2008
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Publication #:
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Pub Dt:
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10/09/2008
| | | | |
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Title:
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APPARATUS OF CAPACITY LEARNING FOR COMPUTER SYSTEMS AND APPLICATIONS
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Patent #:
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Issue Dt:
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04/05/2011
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Application #:
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12138099
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Filing Dt:
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06/12/2008
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Publication #:
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Pub Dt:
|
10/02/2008
| | | | |
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Title:
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WRITE FILTER CACHE METHOD AND APPARATUS FOR PROTECTING THE MICROPROCESSOR CORE FROM SOFT ERRORS
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Patent #:
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Issue Dt:
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10/19/2010
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Application #:
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12138482
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Filing Dt:
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06/13/2008
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Publication #:
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Pub Dt:
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10/09/2008
| | | | |
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Title:
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SOLDER CONNECTOR STRUCTURE AND METHOD
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Patent #:
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Issue Dt:
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09/20/2011
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Application #:
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12138532
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Filing Dt:
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06/13/2008
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Publication #:
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Pub Dt:
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12/17/2009
| | | | |
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Title:
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DETECTING X STATE TRANSITIONS AND STORING COMPRESSED DEBUG INFORMATION
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Patent #:
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Issue Dt:
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02/15/2011
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Application #:
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12138536
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Filing Dt:
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06/13/2008
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Publication #:
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Pub Dt:
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10/09/2008
| | | | |
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Title:
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TRENCH CAPACITORS AND MEMORY CELLS USING TRENCH CAPACITORS
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Patent #:
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Issue Dt:
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09/06/2011
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Application #:
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12138871
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Filing Dt:
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06/13/2008
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Publication #:
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Pub Dt:
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10/30/2008
| | | | |
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Title:
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STATIC TIMING SLACKS ANALYSIS AND MODIFICATION
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Patent #:
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Issue Dt:
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10/19/2010
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Application #:
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12139080
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Filing Dt:
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06/13/2008
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Publication #:
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Pub Dt:
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10/09/2008
| | | | |
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Title:
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DEFECT REDUCTION BY OXIDATION OF SILICON
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Patent #:
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Issue Dt:
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04/17/2012
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Application #:
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12139476
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Filing Dt:
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06/15/2008
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Publication #:
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Pub Dt:
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12/17/2009
| | | | |
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Title:
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HIGHLY SPECIALIZED SCENARIOS IN RANDOM TEST GENERATION
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Patent #:
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Issue Dt:
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06/28/2011
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Application #:
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12139483
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Filing Dt:
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06/15/2008
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Publication #:
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Pub Dt:
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07/16/2009
| | | | |
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Title:
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METHOD, SYSTEM, AND PROGRAM PRODUCT FOR AUTOMATED VERIFICATION OF GATING LOGIC USING FORMAL VERIFICATION
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Patent #:
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Issue Dt:
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04/12/2011
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Application #:
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12139524
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Filing Dt:
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06/16/2008
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Publication #:
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Pub Dt:
|
12/17/2009
| | | | |
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Title:
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PIXEL SENSOR CELL, METHODS AND DESIGN STRUCTURE INCLUDING OPTICALLY TRANSPARENT GATE
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Patent #:
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Issue Dt:
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09/11/2012
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Application #:
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12139574
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Filing Dt:
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06/16/2008
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Publication #:
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Pub Dt:
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12/17/2009
| | | | |
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Title:
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ELECTRIC VEHICLE CHARGING TRANSACTION INTERFACE FOR MANAGING ELECTRIC VEHICLE CHARGING TRANSACTIONS
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Patent #:
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Issue Dt:
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01/15/2013
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Application #:
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12139704
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Filing Dt:
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06/16/2008
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Publication #:
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Pub Dt:
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12/17/2009
| | | | |
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Title:
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INTERCONNECT STRUCTURE FOR ELECTROMIGRATION ENHANCEMENT
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Patent #:
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Issue Dt:
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06/04/2013
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Application #:
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12139716
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Filing Dt:
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06/16/2008
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Publication #:
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Pub Dt:
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10/02/2008
| | | | |
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Title:
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MULTI-LEVEL INTERCONNECTIONS FOR AN INTEGRATED CIRCUIT CHIP
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Patent #:
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Issue Dt:
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04/17/2012
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Application #:
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12139722
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Filing Dt:
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06/16/2008
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Publication #:
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Pub Dt:
|
12/17/2009
| | | | |
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Title:
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MULTI-EXPOSURE LITHOGRAPHY EMPLOYING DIFFERENTIALLY SENSITIVE PHOTORESIST LAYERS
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Patent #:
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Issue Dt:
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03/06/2012
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Application #:
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12139803
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Filing Dt:
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06/16/2008
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Publication #:
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Pub Dt:
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10/16/2008
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Title:
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REDUCING EFFECTIVE DIELECTRIC CONSTANT IN SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
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06/14/2011
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Application #:
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12139928
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Filing Dt:
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06/16/2008
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Publication #:
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Pub Dt:
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12/17/2009
| | | | |
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Title:
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SELF-LEARNING OF THE OPTIMAL POWER OR PERFORMANCE OPERATING POINT OF A COMPUTER CHIP BASED ON INSTANTANEOUS FEEDBACK OF PRESENT OPERATING ENVIRONMENT
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Patent #:
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Issue Dt:
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05/25/2010
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Application #:
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12140535
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Filing Dt:
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06/17/2008
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Publication #:
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Pub Dt:
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11/27/2008
| | | | |
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Title:
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PHASE LOCKED LOOP APPARATUS WITH ADJUSTABLE PHASE SHIFT
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Patent #:
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Issue Dt:
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03/01/2011
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Application #:
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12140561
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Filing Dt:
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06/17/2008
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Publication #:
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Pub Dt:
|
10/09/2008
| | | | |
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Title:
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METHODS AND APPARATUS FOR READ/WRITE CONTROL AND BIT SELECTION WITH FALSE READ SUPPRESSION IN AN SRAM
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Patent #:
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Issue Dt:
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04/27/2010
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Application #:
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12140600
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Filing Dt:
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06/17/2008
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Publication #:
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Pub Dt:
|
01/01/2009
| | | | |
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Title:
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METHOD OF CREATING DEFECT FREE HIGH GE CONTENT (> 25%) SIGE-ON-INSULATOR (SGOI) SUBSTRATES USING WAFER BONDING TECHNIQUES
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Patent #:
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Issue Dt:
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11/03/2009
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Application #:
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12140714
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Filing Dt:
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06/17/2008
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Publication #:
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Pub Dt:
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10/16/2008
| | | | |
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Title:
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METHOD FOR DEFEATING REVERSE ENGINEERING OF INTEGRATED CIRCUITS BY OPTICAL MEANS
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Patent #:
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Issue Dt:
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09/01/2009
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Application #:
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12141121
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Filing Dt:
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06/18/2008
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Publication #:
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Pub Dt:
|
11/20/2008
| | | | |
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Title:
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SERVO SYSTEM FOR A TWO-DIMENSIONAL MICRO-ELECTROMECHANICAL SYSTEM (MEMS)-BASED SCANNER AND METHOD THEREFOR
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Patent #:
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Issue Dt:
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02/22/2011
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Application #:
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12141276
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Filing Dt:
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06/18/2008
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Publication #:
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Pub Dt:
|
12/24/2009
| | | | |
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Title:
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METHOD AND STRUCTURE FOR SOI BODY CONTACT FET WITH REDUCED PARASITIC CAPACITANCE
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Patent #:
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Issue Dt:
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03/06/2012
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Application #:
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12141311
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Filing Dt:
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06/18/2008
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Publication #:
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Pub Dt:
|
12/24/2009
| | | | |
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Title:
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WORK FUNCTION ENGINEERING FOR EDRAM MOSFETS
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Patent #:
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Issue Dt:
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01/31/2012
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Application #:
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12141453
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Filing Dt:
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06/18/2008
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Publication #:
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Pub Dt:
|
12/24/2009
| | | | |
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Title:
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USER SELECTED GRID FOR LOGICALLY REPRESENTING AN ELECTRONIC CIRCUIT
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Patent #:
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Issue Dt:
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02/07/2012
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Application #:
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12141960
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Filing Dt:
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06/19/2008
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Publication #:
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Pub Dt:
|
10/16/2008
| | | | |
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Title:
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APPARATUS FOR PROVIDING ERROR CORRECTION CAPABILITY TO LONGITUDINAL POSITION DATA
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Patent #:
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Issue Dt:
|
05/22/2012
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Application #:
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12141962
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Filing Dt:
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06/19/2008
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Publication #:
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Pub Dt:
|
10/16/2008
| | | | |
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Title:
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APPARATUS FOR PROVIDING ERROR CORRECTION CAPABILITY TO LONGITUDINAL POSITION DATA
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Patent #:
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Issue Dt:
|
12/07/2010
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Application #:
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12142123
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Filing Dt:
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06/19/2008
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|
Publication #:
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Pub Dt:
|
10/09/2008
| | | | |
|
Title:
|
DIGITAL PHASE AND FREQUENCY DETECTOR
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|
Patent #:
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|
Issue Dt:
|
11/19/2013
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Application #:
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12142239
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Filing Dt:
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06/19/2008
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Publication #:
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Pub Dt:
|
12/24/2009
| | | | |
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Title:
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INTEGRATED CIRCUIT INCLUDING VERTICAL DIODE
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|
Patent #:
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|
Issue Dt:
|
10/27/2009
|
Application #:
|
12142248
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Filing Dt:
|
06/19/2008
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Title:
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PLUG FOR HYDROSTATIC TESTING OF FLEXIBLE POLYMERIC PIPE OR TUBING
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Patent #:
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Issue Dt:
|
02/09/2010
|
Application #:
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12142849
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Filing Dt:
|
06/20/2008
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|
Publication #:
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Pub Dt:
|
10/16/2008
| | | | |
|
Title:
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SECTIONAL FIELD EFFECT DEVICES AND METHOD OF FABRICATION
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Patent #:
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Issue Dt:
|
12/14/2010
|
Application #:
|
12142870
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Filing Dt:
|
06/20/2008
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|
Publication #:
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Pub Dt:
|
12/24/2009
| | | | |
|
Title:
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METHOD OF FORMING A METAL SILICIDE LAYER, DEVICES INCORPORATING METAL SILICIDE LAYERS AND DESIGN STRUCTURES FOR THE DEVICES
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Patent #:
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Issue Dt:
|
03/20/2012
|
Application #:
|
12142997
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Filing Dt:
|
06/20/2008
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Publication #:
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Pub Dt:
|
03/19/2009
| | | | |
|
Title:
|
PLANAR ARRAY CONTACT MEMORY CARDS
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Patent #:
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|
Issue Dt:
|
12/07/2010
|
Application #:
|
12143213
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Filing Dt:
|
06/20/2008
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|
Publication #:
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Pub Dt:
|
11/20/2008
| | | | |
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Title:
|
METHODS FOR FABRICATING A SEMICONDUCTOR STRUCTURE USING A MANDREL AND SEMICONDUCTOR STRUCTURES FORMED THEREBY
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Patent #:
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Issue Dt:
|
10/26/2010
|
Application #:
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12143917
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Filing Dt:
|
06/23/2008
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Publication #:
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Pub Dt:
|
10/16/2008
| | | | |
|
Title:
|
STRUCTURE TO IMPROVE ADHESION BETWEEN TOP CVD LOW-K DIELECTRIC AND DIELECTRIC CAPPING LAYER
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Patent #:
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Issue Dt:
|
05/31/2011
|
Application #:
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12143918
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Filing Dt:
|
06/23/2008
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Publication #:
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Pub Dt:
|
10/16/2008
| | | | |
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Title:
|
MULTILAYERED CAP BARRIER IN MICROELECTRONIC INTERCONNECT STRUCTURES
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Patent #:
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Issue Dt:
|
11/02/2010
|
Application #:
|
12143940
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Filing Dt:
|
06/23/2008
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|
Publication #:
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Pub Dt:
|
10/30/2008
| | | | |
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Title:
|
PISTON RESET APPARATUS FOR A MULTICHIP MODULE AND METHOD FOR RESETTING PISTONS IN THE SAME
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Patent #:
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|
Issue Dt:
|
03/29/2011
|
Application #:
|
12144071
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Filing Dt:
|
06/23/2008
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Publication #:
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Pub Dt:
|
12/24/2009
| | | | |
|
Title:
|
METHOD FOR FORMING AN ON-CHIP HIGH FREQUENCY ELECTRO-STATIC DISCHARGE DEVICE
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Patent #:
|
|
Issue Dt:
|
10/02/2012
|
Application #:
|
12144095
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Filing Dt:
|
06/23/2008
|
|
Publication #:
|
|
Pub Dt:
|
12/24/2009
| | | | |
|
Title:
|
DESIGN STRUCTURE FOR AN ON-CHIP HIGH FREQUENCY ELECTRO-STATIC DISCHARGE DEVICE
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|
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Patent #:
|
|
Issue Dt:
|
03/09/2010
|
Application #:
|
12144139
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Filing Dt:
|
06/23/2008
|
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Publication #:
|
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Pub Dt:
|
10/23/2008
| | | | |
|
Title:
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METHOD OF FORMING A DUAL GATED FINFET GAIN CELL
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Patent #:
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Issue Dt:
|
04/17/2012
|
Application #:
|
12144229
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Filing Dt:
|
06/23/2008
|
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Publication #:
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|
Pub Dt:
|
11/20/2008
| | | | |
|
Title:
|
ADOPTING FEATURE OF BURIED ELECTRICALLY CONDUCTIVE LAYER IN DIELECTRICS FOR ELECTRICAL ANTI-FUSE APPLICATION
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Patent #:
|
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Issue Dt:
|
11/23/2010
|
Application #:
|
12144272
|
Filing Dt:
|
06/23/2008
|
|
Publication #:
|
|
Pub Dt:
|
10/23/2008
| | | | |
|
Title:
|
SUBSTRATE SOLUTION FOR BACK GATE CONTROLLED SRAM WITH COEXISTING LOGIC DEVICES
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Patent #:
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Issue Dt:
|
02/01/2011
|
Application #:
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12144281
|
Filing Dt:
|
06/23/2008
|
|
Publication #:
|
|
Pub Dt:
|
08/06/2009
| | | | |
|
Title:
|
BODY CONTROLLED DOUBLE CHANNEL TRANSISTOR AND CIRCUITS COMPRISING THE SAME
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Patent #:
|
|
Issue Dt:
|
03/20/2012
|
Application #:
|
12144682
|
Filing Dt:
|
06/24/2008
|
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Publication #:
|
|
Pub Dt:
|
12/24/2009
| | | | |
|
Title:
|
DESIGN STRUCTURE, STRUCTURE AND METHOD FOR PROVIDING AN ON-CHIP VARIABLE DELAY TRANSMISSION LINE WITH FIXED CHARACTERISTIC IMPEDANCE
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|
|
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Patent #:
|
|
Issue Dt:
|
06/05/2012
|
Application #:
|
12144684
|
Filing Dt:
|
06/24/2008
|
|
Publication #:
|
|
Pub Dt:
|
12/24/2009
| | | | |
|
Title:
|
DESIGN STRUCTURE, STRUCTURE AND METHOD FOR PROVIDING AN ON-CHIP VARIABLE DELAY TRANSMISSION LINE WITH FIXED CHARACTERISTIC IMPEDANCE
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|
|
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Patent #:
|
|
Issue Dt:
|
08/07/2012
|
Application #:
|
12144686
|
Filing Dt:
|
06/24/2008
|
|
Publication #:
|
|
Pub Dt:
|
12/24/2009
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR A ROBUST EMBEDDED INTERFACE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/03/2011
|
Application #:
|
12144703
|
Filing Dt:
|
06/24/2008
|
|
Publication #:
|
|
Pub Dt:
|
12/24/2009
| | | | |
|
Title:
|
DESIGN STRUCTURE AND APPARATUS FOR A ROBUST EMBEDDED INTERFACE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/06/2010
|
Application #:
|
12144998
|
Filing Dt:
|
06/24/2008
|
|
Publication #:
|
|
Pub Dt:
|
10/23/2008
| | | | |
|
Title:
|
VERTICAL BIPOLAR TRANSISTOR WITH A MAJORITY CARRIER ACCUMULATION LAYER AS A SUBCOLLECTOR FOR SOI BICMOS WITH REDUCED BURIED OXIDE THICKNESS FOR LOW-SUBSTRATE BIAS OPERATION
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/16/2010
|
Application #:
|
12145024
|
Filing Dt:
|
06/24/2008
|
|
Publication #:
|
|
Pub Dt:
|
10/23/2008
| | | | |
|
Title:
|
STRUCTURE AND METHOD OF FABRICATING A HYBRID SUBSTRATE FOR HIGH-PERFORMANCE HYBRID-ORIENTATION SILICON-ON-INSULATOR CMOS DEVICES
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|
|
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Patent #:
|
|
Issue Dt:
|
07/06/2010
|
Application #:
|
12145163
|
Filing Dt:
|
06/24/2008
|
|
Publication #:
|
|
Pub Dt:
|
12/24/2009
| | | | |
|
Title:
|
SILICIDE INTERCONNECT STRUCTURE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/08/2011
|
Application #:
|
12145502
|
Filing Dt:
|
06/25/2008
|
|
Publication #:
|
|
Pub Dt:
|
10/23/2008
| | | | |
|
Title:
|
BALANCING POWER PLANE PIN CURRENTS AND IMPROVING STRENGTH IN A PRINTED WIRING BOARD USING COLLINEAR SLOTS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/19/2011
|
Application #:
|
12146128
|
Filing Dt:
|
06/25/2008
|
|
Publication #:
|
|
Pub Dt:
|
10/16/2008
| | | | |
|
Title:
|
WRITE OPERATIONS FOR PHASE-CHANGE-MATERIAL MEMORY
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/01/2010
|
Application #:
|
12146554
|
Filing Dt:
|
06/26/2008
|
|
Publication #:
|
|
Pub Dt:
|
11/06/2008
| | | | |
|
Title:
|
APPARATUS FOR IMPROVED SRAM DEVICE PERFORMANCE THROUGH DOUBLE GATE TOPOLOGY
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|
|
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Patent #:
|
|
Issue Dt:
|
05/01/2012
|
Application #:
|
12146555
|
Filing Dt:
|
06/26/2008
|
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
|
Title:
|
BEOL WIRING STRUCTURES THAT INCLUDE AN ON-CHIP INDUCTOR AND AN ON-CHIP CAPACITOR, AND DESIGN STRUCTURES FOR A RADIOFREQUENCY INTEGRATED CIRCUIT
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|
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Patent #:
|
|
Issue Dt:
|
02/15/2011
|
Application #:
|
12146560
|
Filing Dt:
|
06/26/2008
|
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
|
Title:
|
BAND GAP MODULATED OPTICAL SENSOR
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/30/2011
|
Application #:
|
12146575
|
Filing Dt:
|
06/26/2008
|
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
|
Title:
|
BAND GAP MODULATED OPTICAL SENSOR
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|
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|
Patent #:
|
|
Issue Dt:
|
01/06/2009
|
Application #:
|
12146601
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Filing Dt:
|
06/26/2008
|
|
Title:
|
CIRCULAR GRATING RESONATOR WITH INTEGRATED ELECTRO-OPTICAL MODULATION
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|
Patent #:
|
|
Issue Dt:
|
11/08/2011
|
Application #:
|
12146728
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Filing Dt:
|
06/26/2008
|
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
|
Title:
|
STRUCTURES, FABRICATION METHODS, DESIGN STRUCTURES FOR STRAINED FIN FIELD EFFECT TRANSISTORS (FINFETS)
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/03/2012
|
Application #:
|
12146757
|
Filing Dt:
|
06/26/2008
|
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
|
Title:
|
PLASTIC LAND GRID ARRAY (PLGA) MODULE AND PRINTED WIRING BOARD (PWB) WITH ENHANCED CONTACT METALLURGY CONSTRUCTION
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|
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|
Patent #:
|
|
Issue Dt:
|
03/08/2011
|
Application #:
|
12146798
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Filing Dt:
|
06/26/2008
|
|
Publication #:
|
|
Pub Dt:
|
10/23/2008
| | | | |
|
Title:
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SOLDER INTERCONNECTION ARRAY WITH OPTIMAL MECHANICAL INTEGRITY
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|
Patent #:
|
|
Issue Dt:
|
11/06/2012
|
Application #:
|
12146852
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Filing Dt:
|
06/26/2008
|
|
Publication #:
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|
Pub Dt:
|
12/31/2009
| | | | |
|
Title:
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TECHNIQUES FOR THERMAL MODELING OF DATA CENTERS TO IMPROVE ENERGY EFFICIENCY
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Patent #:
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|
Issue Dt:
|
07/03/2012
|
Application #:
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12147670
|
Filing Dt:
|
06/27/2008
|
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
|
Title:
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CIRCUIT STRUCTURE AND METHOD FOR DIGITAL INTEGRATED CIRCUIT PERFORMANCE SCREENING
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|
Patent #:
|
|
Issue Dt:
|
11/09/2010
|
Application #:
|
12147685
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Filing Dt:
|
06/27/2008
|
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
|
Title:
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SMI MEMORY READ DATA CAPTURE MARGIN CHARACTERIZATION CIRCUITS AND METHODS
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Patent #:
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|
Issue Dt:
|
08/30/2011
|
Application #:
|
12154003
|
Filing Dt:
|
05/19/2008
|
|
Publication #:
|
|
Pub Dt:
|
09/18/2008
| | | | |
|
Title:
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IMMERSION OPTICAL LITHOGRAPHY SYSTEM HAVING PROTECTIVE OPTICAL COATING
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|
Patent #:
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|
Issue Dt:
|
03/27/2012
|
Application #:
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12154796
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Filing Dt:
|
05/27/2008
|
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Publication #:
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|
Pub Dt:
|
12/03/2009
| | | | |
|
Title:
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DESIGN STRUCTURE FOR OUT OF BAND SIGNALING ENHANCEMENT FOR HIGH SPEED SERIAL DRIVER
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Patent #:
|
|
Issue Dt:
|
06/21/2011
|
Application #:
|
12163172
|
Filing Dt:
|
06/27/2008
|
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
|
Title:
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STRUCTURE TO FACILITATE PLATING INTO HIGH ASPECT RATIO VIAS
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|
Patent #:
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|
Issue Dt:
|
10/16/2012
|
Application #:
|
12163318
|
Filing Dt:
|
06/27/2008
|
|
Publication #:
|
|
Pub Dt:
|
07/30/2009
| | | | |
|
Title:
|
CHARGE-BASED CIRCUIT ANALYSIS
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|
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|
Patent #:
|
|
Issue Dt:
|
03/13/2012
|
Application #:
|
12164152
|
Filing Dt:
|
06/30/2008
|
|
Publication #:
|
|
Pub Dt:
|
10/30/2008
| | | | |
|
Title:
|
QUAD FLAT NO-LEAD CHIP CARRIER WITH STANDOFF
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|
Patent #:
|
|
Issue Dt:
|
03/29/2011
|
Application #:
|
12164447
|
Filing Dt:
|
06/30/2008
|
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
|
Title:
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PRODUCTION OF INTEGRATED CIRCUIT CHIP PACKAGES PROHIBITING FORMATION OF MICRO SOLDER BALLS
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|
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|
Patent #:
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|
Issue Dt:
|
02/15/2011
|
Application #:
|
12164478
|
Filing Dt:
|
06/30/2008
|
|
Publication #:
|
|
Pub Dt:
|
12/04/2008
| | | | |
|
Title:
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HIGH PERFORMANCE CHIP CARRIER SUBSTRATE
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|
Patent #:
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|
Issue Dt:
|
01/25/2011
|
Application #:
|
12164576
|
Filing Dt:
|
06/30/2008
|
|
Publication #:
|
|
Pub Dt:
|
01/15/2009
| | | | |
|
Title:
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METHOD OF OBTAINING ENHANCED LOCALIZED THERMAL INTERFACE REGIONS BY PARTICLE STACKING
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Patent #:
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|
Issue Dt:
|
06/15/2010
|
Application #:
|
12164580
|
Filing Dt:
|
06/30/2008
|
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
|
Title:
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CMOS COMPATIBLE INTEGRATED DIELECTRIC OPTICAL WAVEGUIDE COUPLER AND FABRICATION
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Patent #:
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|
Issue Dt:
|
05/24/2011
|
Application #:
|
12164599
|
Filing Dt:
|
06/30/2008
|
|
Publication #:
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|
Pub Dt:
|
10/30/2008
| | | | |
|
Title:
|
NONLITHOGRAPHIC METHOD TO PRODUCE SELF-ALIGNED MASK, ARTICLES PRODUCED BY SAME AND COMPOSITIONS FOR SAME
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|
|
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|
Patent #:
|
|
Issue Dt:
|
07/23/2013
|
Application #:
|
12164647
|
Filing Dt:
|
06/30/2008
|
|
Publication #:
|
|
Pub Dt:
|
10/30/2008
| | | | |
|
Title:
|
SELECTIVELY COATED SELF-ALIGNED MASK
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|
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|
Patent #:
|
|
Issue Dt:
|
12/14/2010
|
Application #:
|
12164690
|
Filing Dt:
|
06/30/2008
|
|
Publication #:
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|
Pub Dt:
|
02/05/2009
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR FABRICATING A CARBON NANOTUBE TRANSISTOR
|
|
