skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:049490/0001   Pages: 892
Recorded: 11/29/2018
Conveyance: SECURITY AGREEMENT
Total properties: 13706
Page 56 of 138
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138
1
Patent #:
7949981
Issue Dt:
05/24/2011
Application #:
12183313
Filing Dt:
07/31/2008
Publication #:
US20100031221
Pub Dt:
02/04/2010
Title:
VIA DENSITY CHANGE TO IMPROVE WAFER SURFACE PLANARITY
2
Patent #:
8519402
Issue Dt:
08/27/2013
Application #:
12183462
Filing Dt:
07/31/2008
Publication #:
US20100025761
Pub Dt:
02/04/2010
Title:
DESIGN STRUCTURE, STRUCTURE AND METHOD OF LATCH-UP IMMUNITY FOR HIGH AND LOW VOLTAGE INTEGRATED CIRCUITS
3
Patent #:
7739427
Issue Dt:
06/15/2010
Application #:
12183533
Filing Dt:
07/31/2008
Publication #:
US20080301336
Pub Dt:
12/04/2008
Title:
DYNAMIC MEMORY ALLOCATION BETWEEN INBOUND AND OUTBOUND BUFFERS IN A PROTOCOL HANDLER
4
Patent #:
7962874
Issue Dt:
06/14/2011
Application #:
12183549
Filing Dt:
07/31/2008
Publication #:
US20080313590
Pub Dt:
12/18/2008
Title:
METHOD AND SYSTEM FOR EVALUATING TIMING IN AN INTEGRATED CIRCUIT
5
Patent #:
7962879
Issue Dt:
06/14/2011
Application #:
12183578
Filing Dt:
07/31/2008
Publication #:
US20080313577
Pub Dt:
12/18/2008
Title:
VLSI ARTWORK LEGALIZATION FOR HIERARCHICAL DESIGNS WITH MULTIPLE GRID CONSTRAINTS
6
Patent #:
8028265
Issue Dt:
09/27/2011
Application #:
12183898
Filing Dt:
07/31/2008
Publication #:
US20100031215
Pub Dt:
02/04/2010
Title:
SYSTEM AND METHOD FOR IMPROVED PLACEMENT IN CUSTOM VLSI CIRCUIT DESIGN WITH SCHEMATIC-DRIVEN PLACEMENT
7
Patent #:
8028266
Issue Dt:
09/27/2011
Application #:
12183958
Filing Dt:
07/31/2008
Publication #:
US20100031218
Pub Dt:
02/04/2010
Title:
SYSTEM AND METHOD FOR AUTOMATED PLACEMENT IN CUSTOM VLSI CIRCUIT DESIGN WITH SCHEMATIC-DRIVEN PLACEMENT
8
Patent #:
7936208
Issue Dt:
05/03/2011
Application #:
12184148
Filing Dt:
07/31/2008
Publication #:
US20100026376
Pub Dt:
02/04/2010
Title:
BIAS CIRCUIT FOR A MOS DEVICE
9
Patent #:
7711987
Issue Dt:
05/04/2010
Application #:
12184421
Filing Dt:
08/01/2008
Publication #:
US20080294946
Pub Dt:
11/27/2008
Title:
SYSTEM AND METHOD FOR PROBLEM DETERMINATION USING DEPENDENCY GRAPHS AND RUN-TIME BEHAVIOR MODELS
10
Patent #:
7679535
Issue Dt:
03/16/2010
Application #:
12185095
Filing Dt:
08/03/2008
Publication #:
US20090027242
Pub Dt:
01/29/2009
Title:
HIGH-RATE RLL ENCODING
11
Patent #:
7596734
Issue Dt:
09/29/2009
Application #:
12185172
Filing Dt:
08/04/2008
Publication #:
US20080313514
Pub Dt:
12/18/2008
Title:
ON-CHIP AC SELF-TEST CONTROLLER
12
Patent #:
8039314
Issue Dt:
10/18/2011
Application #:
12185259
Filing Dt:
08/04/2008
Publication #:
US20100025825
Pub Dt:
02/04/2010
Title:
METAL ADHESION BY INDUCED SURFACE ROUGHNESS
13
Patent #:
8169077
Issue Dt:
05/01/2012
Application #:
12185759
Filing Dt:
08/04/2008
Publication #:
US20080290518
Pub Dt:
11/27/2008
Title:
DIELECTRIC INTERCONNECT STRUCTURES AND METHODS FOR FORMING THE SAME
14
Patent #:
8299622
Issue Dt:
10/30/2012
Application #:
12186061
Filing Dt:
08/05/2008
Publication #:
US20100032846
Pub Dt:
02/11/2010
Title:
IC HAVING VIABAR INTERCONNECTION AND RELATED METHOD
15
Patent #:
8139489
Issue Dt:
03/20/2012
Application #:
12186588
Filing Dt:
08/06/2008
Publication #:
US20100034103
Pub Dt:
02/11/2010
Title:
ROBUST JITTER-FREE REMOTE CLOCK OFFSET MEASURING METHOD
16
Patent #:
8969914
Issue Dt:
03/03/2015
Application #:
12186630
Filing Dt:
08/06/2008
Publication #:
US20090197377
Pub Dt:
08/06/2009
Title:
ESD POWER CLAMP WITH STABLE POWER START UP FUNCTION
17
Patent #:
7863734
Issue Dt:
01/04/2011
Application #:
12186655
Filing Dt:
08/06/2008
Publication #:
US20090065925
Pub Dt:
03/12/2009
Title:
DUAL-SIDED CHIP ATTACHED MODULES
18
Patent #:
7935609
Issue Dt:
05/03/2011
Application #:
12186750
Filing Dt:
08/06/2008
Publication #:
US20100035393
Pub Dt:
02/11/2010
Title:
METHOD FOR FABRICATING SEMICONDUCTOR DEVICE HAVING RADIATION HARDENED INSULATORS
19
Patent #:
7943482
Issue Dt:
05/17/2011
Application #:
12186762
Filing Dt:
08/06/2008
Publication #:
US20100032795
Pub Dt:
02/11/2010
Title:
METHOD FOR SEMICONDUCTOR DEVICE HAVING RADIATION HARDENED INSULATORS AND DESIGN STRUCTURE THEREOF
20
Patent #:
7863526
Issue Dt:
01/04/2011
Application #:
12186767
Filing Dt:
08/06/2008
Publication #:
US20080308923
Pub Dt:
12/18/2008
Title:
HIGH PERFORMANCE CHIP CARRIER SUBSTRATE
21
Patent #:
8656146
Issue Dt:
02/18/2014
Application #:
12186821
Filing Dt:
08/06/2008
Publication #:
US20090222653
Pub Dt:
09/03/2009
Title:
COMPUTER SYSTEM COMPRISING A SECURE BOOT MECHANISM
22
Patent #:
7825479
Issue Dt:
11/02/2010
Application #:
12187003
Filing Dt:
08/06/2008
Publication #:
US20100032732
Pub Dt:
02/11/2010
Title:
ELECTRICAL ANTIFUSE HAVING A MULTI-THICKNESS DIELECTRIC LAYER
23
Patent #:
8055486
Issue Dt:
11/08/2011
Application #:
12187164
Filing Dt:
08/06/2008
Publication #:
US20080294414
Pub Dt:
11/27/2008
Title:
POWER DELIVERY ANALYSIS AND DESIGN
24
Patent #:
7927963
Issue Dt:
04/19/2011
Application #:
12187415
Filing Dt:
08/07/2008
Publication #:
US20100035403
Pub Dt:
02/11/2010
Title:
INTEGRATED CIRCUIT STRUCTURE, DESIGN STRUCTURE, AND METHOD HAVING IMPROVED ISOLATION AND HARMONICS
25
Patent #:
7804151
Issue Dt:
09/28/2010
Application #:
12187419
Filing Dt:
08/07/2008
Publication #:
US20100032796
Pub Dt:
02/11/2010
Title:
INTEGRATED CIRCUIT STRUCTURE, DESIGN STRUCTURE, AND METHOD HAVING IMPROVED ISOLATION AND HARMONICS
26
Patent #:
7943404
Issue Dt:
05/17/2011
Application #:
12187436
Filing Dt:
08/07/2008
Publication #:
US20100035370
Pub Dt:
02/11/2010
Title:
INTEGRATED MILLIMETER WAVE ANTENNA AND TRANSCEIVER ON A SUBSTRATE
27
Patent #:
8232920
Issue Dt:
07/31/2012
Application #:
12187442
Filing Dt:
08/07/2008
Publication #:
US20100033395
Pub Dt:
02/11/2010
Title:
INTEGRATED MILLIMETER WAVE ANTENNA AND TRANSCEIVER ON A SUBSTRATE
28
Patent #:
8205138
Issue Dt:
06/19/2012
Application #:
12187511
Filing Dt:
08/07/2008
Publication #:
US20100037122
Pub Dt:
02/11/2010
Title:
MEMORY CONTROLLER FOR REDUCING TIME TO INITIALIZE MAIN MEMORY
29
Patent #:
7849516
Issue Dt:
12/07/2010
Application #:
12187759
Filing Dt:
08/07/2008
Publication #:
US20090003189
Pub Dt:
01/01/2009
Title:
PROBE FOR SCANNING OVER A SUBSTRATE AND A DATA STORAGE DEVICE
30
Patent #:
8153514
Issue Dt:
04/10/2012
Application #:
12187767
Filing Dt:
08/07/2008
Publication #:
US20080293259
Pub Dt:
11/27/2008
Title:
METHOD OF FORMING METAL/HIGH-K GATE STACKS WITH HIGH MOBILITY
31
Patent #:
7678696
Issue Dt:
03/16/2010
Application #:
12188230
Filing Dt:
08/08/2008
Publication #:
US20100035430
Pub Dt:
02/11/2010
Title:
METHOD OF MAKING THROUGH WAFER VIAS
32
Patent #:
7968975
Issue Dt:
06/28/2011
Application #:
12188234
Filing Dt:
08/08/2008
Publication #:
US20100032809
Pub Dt:
02/11/2010
Title:
METAL WIRING STRUCTURE FOR INTEGRATION WITH THROUGH SUBSTRATE VIAS
33
Patent #:
8212357
Issue Dt:
07/03/2012
Application #:
12188235
Filing Dt:
08/08/2008
Publication #:
US20100032835
Pub Dt:
02/11/2010
Title:
COMBINATION VIA AND PAD STRUCTURE FOR IMPROVED SOLDER BUMP ELECTROMIGRATION CHARACTERISTICS
34
Patent #:
8138563
Issue Dt:
03/20/2012
Application #:
12188243
Filing Dt:
08/08/2008
Publication #:
US20100032814
Pub Dt:
02/11/2010
Title:
CIRCUIT STRUCTURES AND METHODS WITH BEOL LAYERS CONFIGURED TO BLOCK ELECTROMAGNETIC EDGE INTERFERENCE
35
Patent #:
7811876
Issue Dt:
10/12/2010
Application #:
12188324
Filing Dt:
08/08/2008
Publication #:
US20090221115
Pub Dt:
09/03/2009
Title:
REDUCTION OF MEMORY INSTABILITY BY LOCAL ADAPTATION OF RE-CRYSTALLIZATION CONDITIONS IN A CACHE AREA OF A SEMICONDUCTOR DEVICE
36
Patent #:
8012814
Issue Dt:
09/06/2011
Application #:
12188366
Filing Dt:
08/08/2008
Publication #:
US20100035390
Pub Dt:
02/11/2010
Title:
METHOD OF FORMING A HIGH PERFORMANCE FET AND A HIGH VOLTAGE FET ON A SOI SUBSTRATE
37
Patent #:
8120110
Issue Dt:
02/21/2012
Application #:
12188381
Filing Dt:
08/08/2008
Publication #:
US20100032761
Pub Dt:
02/11/2010
Title:
SEMICONDUCTOR STRUCTURE INCLUDING A HIGH PERFORMANCE FET AND A HIGH VOLTAGE FET ON A SOI SUBSTRATE
38
Patent #:
7996801
Issue Dt:
08/09/2011
Application #:
12188749
Filing Dt:
08/08/2008
Publication #:
US20100037190
Pub Dt:
02/11/2010
Title:
METHODS AND SYSTEMS FOR ON-THE-FLY CHIP VERIFICATION
39
Patent #:
8054669
Issue Dt:
11/08/2011
Application #:
12189983
Filing Dt:
08/12/2008
Publication #:
US20100039848
Pub Dt:
02/18/2010
Title:
NON-VOLATILE PROGRAMMABLE OPTICAL ELEMENT EMPLOYING F-CENTERS
40
Patent #:
7838353
Issue Dt:
11/23/2010
Application #:
12190028
Filing Dt:
08/12/2008
Publication #:
US20100041199
Pub Dt:
02/18/2010
Title:
FIELD EFFECT TRANSISTOR WITH SUPPRESSED CORNER LEAKAGE THROUGH CHANNEL MATERIAL BAND-EDGE MODULATION, DESIGN STRUCTURE AND METHOD
41
Patent #:
8125037
Issue Dt:
02/28/2012
Application #:
12190041
Filing Dt:
08/12/2008
Publication #:
US20100038728
Pub Dt:
02/18/2010
Title:
FIELD EFFECT TRANSISTOR WITH CHANNEL REGION EDGE AND CENTER PORTIONS HAVING DIFFERENT BAND STRUCTURES FOR SUPPRESSED CORNER LEAKAGE
42
Patent #:
8036022
Issue Dt:
10/11/2011
Application #:
12190067
Filing Dt:
08/12/2008
Publication #:
US20100039854
Pub Dt:
02/18/2010
Title:
STRUCTURE AND METHOD OF USING ASYMMETRIC JUNCTION ENGINEERED SRAM PASS GATES, AND DESIGN STRUCTURE
43
Patent #:
7951678
Issue Dt:
05/31/2011
Application #:
12190123
Filing Dt:
08/12/2008
Publication #:
US20100038724
Pub Dt:
02/18/2010
Title:
METAL-GATE HIGH-K REFERENCE STRUCTURE
44
Patent #:
7855137
Issue Dt:
12/21/2010
Application #:
12190173
Filing Dt:
08/12/2008
Publication #:
US20100038777
Pub Dt:
02/18/2010
Title:
METHOD OF MAKING A SIDEWALL-PROTECTED METALLIC PILLAR ON A SEMICONDUCTOR SUBSTRATE
45
Patent #:
8753936
Issue Dt:
06/17/2014
Application #:
12190220
Filing Dt:
08/12/2008
Publication #:
US20100038725
Pub Dt:
02/18/2010
Title:
CHANGING EFFECTIVE WORK FUNCTION USING ION IMPLANTATION DURING DUAL WORK FUNCTION METAL GATE INTEGRATION
46
Patent #:
8101494
Issue Dt:
01/24/2012
Application #:
12191379
Filing Dt:
08/14/2008
Publication #:
US20100041203
Pub Dt:
02/18/2010
Title:
STRUCTURE, DESIGN STRUCTURE AND METHOD OF MANUFACTURING A STRUCTURE HAVING VIAS AND HIGH DENSITY CAPACITORS
47
Patent #:
8125013
Issue Dt:
02/28/2012
Application #:
12191385
Filing Dt:
08/14/2008
Publication #:
US20100038750
Pub Dt:
02/18/2010
Title:
STRUCTURE, DESIGN STRUCTURE AND METHOD OF MANUFACTURING A STRUCTURE HAVING VIAS AND HIGH DENSITY CAPACITORS
48
Patent #:
7872303
Issue Dt:
01/18/2011
Application #:
12191425
Filing Dt:
08/14/2008
Publication #:
US20100038679
Pub Dt:
02/18/2010
Title:
FINFET WITH LONGITUDINAL STRESS IN A CHANNEL
49
Patent #:
8352231
Issue Dt:
01/08/2013
Application #:
12191441
Filing Dt:
08/14/2008
Publication #:
US20090063120
Pub Dt:
03/05/2009
Title:
SYSTEM FOR PERFORMING A CO-SIMULATION AND/OR EMULATION OF HARDWARE AND SOFTWARE
50
Patent #:
8115575
Issue Dt:
02/14/2012
Application #:
12191519
Filing Dt:
08/14/2008
Publication #:
US20100039191
Pub Dt:
02/18/2010
Title:
ACTIVE INDUCTOR FOR ASIC APPLICATION
51
Patent #:
8232645
Issue Dt:
07/31/2012
Application #:
12191522
Filing Dt:
08/14/2008
Publication #:
US20100038783
Pub Dt:
02/18/2010
Title:
INTERCONNECT STRUCTURES, DESIGN STRUCTURE AND METHOD OF MANUFACTURE
52
Patent #:
8135571
Issue Dt:
03/13/2012
Application #:
12191538
Filing Dt:
08/14/2008
Publication #:
US20100042396
Pub Dt:
02/18/2010
Title:
VALIDATING MANUFACTURING TEST RULES PERTAINING TO AN ELECTRONIC COMPONENT
53
Patent #:
7928569
Issue Dt:
04/19/2011
Application #:
12191543
Filing Dt:
08/14/2008
Publication #:
US20100038784
Pub Dt:
02/18/2010
Title:
REDUNDANT BARRIER STRUCTURE FOR INTERCONNECT AND WIRING APPLICATIONS, DESIGN STRUCTURE AND METHOD OF MANUFACTURE
54
Patent #:
7977201
Issue Dt:
07/12/2011
Application #:
12191633
Filing Dt:
08/14/2008
Publication #:
US20100041202
Pub Dt:
02/18/2010
Title:
METHODS FOR FORMING BACK-END-OF-LINE RESISTIVE SEMICONDUCTOR STRUCTURES
55
Patent #:
8201115
Issue Dt:
06/12/2012
Application #:
12191635
Filing Dt:
08/14/2008
Publication #:
US20100042965
Pub Dt:
02/18/2010
Title:
SCALABLE REDUCTION IN REGISTERS WITH SAT-BASED RESUBSTITIUTION
56
Patent #:
7629852
Issue Dt:
12/08/2009
Application #:
12191666
Filing Dt:
08/14/2008
Publication #:
US20080297261
Pub Dt:
12/04/2008
Title:
CIRCUITS AND METHODS FOR IMPLEMENTING TRANSFORMER-COUPLED AMPLIFIERS AT MILLIMETER WAVE FREQUENCIES
57
Patent #:
7939911
Issue Dt:
05/10/2011
Application #:
12191683
Filing Dt:
08/14/2008
Publication #:
US20100038754
Pub Dt:
02/18/2010
Title:
BACK-END-OF-LINE RESISTIVE SEMICONDUCTOR STRUCTURES
58
Patent #:
7902620
Issue Dt:
03/08/2011
Application #:
12191687
Filing Dt:
08/14/2008
Publication #:
US20100038736
Pub Dt:
02/18/2010
Title:
SUSPENDED GERMANIUM PHOTODETECTOR FOR SILICON WAVEGUIDE
59
Patent #:
8086977
Issue Dt:
12/27/2011
Application #:
12192272
Filing Dt:
08/15/2008
Publication #:
US20080301606
Pub Dt:
12/04/2008
Title:
DESIGN STRUCTURE FOR SWITCHING DIGITAL CIRCUIT CLOCK NET DRIVER WITHOUT LOSING CLOCK PULSES
60
Patent #:
8150672
Issue Dt:
04/03/2012
Application #:
12192309
Filing Dt:
08/15/2008
Publication #:
US20080300849
Pub Dt:
12/04/2008
Title:
DESIGN STRUCTURE FOR IMPROVED LOGIC SIMULATION USING A NEGATIVE UNKNOWN BOOLEAN STATE
61
Patent #:
8003474
Issue Dt:
08/23/2011
Application #:
12192387
Filing Dt:
08/15/2008
Publication #:
US20100038747
Pub Dt:
02/18/2010
Title:
ELECTRICALLY PROGRAMMABLE FUSE AND FABRICATION METHOD
62
Patent #:
8003463
Issue Dt:
08/23/2011
Application #:
12192491
Filing Dt:
08/15/2008
Publication #:
US20100041225
Pub Dt:
02/18/2010
Title:
STRUCTURE, DESIGN STRUCTURE AND METHOD OF MANUFACTURING DUAL METAL GATE VT ROLL-UP STRUCTURE
63
Patent #:
7964922
Issue Dt:
06/21/2011
Application #:
12192517
Filing Dt:
08/15/2008
Publication #:
US20100038720
Pub Dt:
02/18/2010
Title:
STRUCTURE, DESIGN STRUCTURE AND METHOD OF MANUFACTURING DUAL METAL GATE VT ROLL-UP STRUCTURE
64
Patent #:
7979836
Issue Dt:
07/12/2011
Application #:
12192554
Filing Dt:
08/15/2008
Publication #:
US20100038694
Pub Dt:
02/18/2010
Title:
SPLIT-GATE DRAM WITH MUGFET, DESIGN STRUCTURE, AND METHOD OF MANUFACTURE
65
Patent #:
8189723
Issue Dt:
05/29/2012
Application #:
12192571
Filing Dt:
08/15/2008
Publication #:
US20100039150
Pub Dt:
02/18/2010
Title:
METHOD, CIRCUIT, AND DESIGN STRUCTURE FOR CAPTURING DATA ACROSS A PSEUDO-SYNCHRONOUS INTERFACE
66
Patent #:
8300752
Issue Dt:
10/30/2012
Application #:
12192586
Filing Dt:
08/15/2008
Publication #:
US20100040183
Pub Dt:
02/18/2010
Title:
METHOD, CIRCUIT, AND DESIGN STRUCTURE FOR CAPTURING DATA ACROSS A PSEUDO-SYNCHRONOUS INTERFACE
67
Patent #:
8095902
Issue Dt:
01/10/2012
Application #:
12193058
Filing Dt:
08/18/2008
Publication #:
US20100042960
Pub Dt:
02/18/2010
Title:
DESIGN STRUCTURE FOR COUPLE NOISE CHARACTERIZATION USING A SINGLE OSCILLATOR
68
Patent #:
7958471
Issue Dt:
06/07/2011
Application #:
12193059
Filing Dt:
08/18/2008
Publication #:
US20100042962
Pub Dt:
02/18/2010
Title:
STRUCTURE FOR COUPLE NOISE CHARACTERIZATION USING A SINGLE OSCILLATOR
69
Patent #:
7979823
Issue Dt:
07/12/2011
Application #:
12193119
Filing Dt:
08/18/2008
Publication #:
US20100042961
Pub Dt:
02/18/2010
Title:
IDENTIFICATION OF VOLTAGE REFERENCE ERRORS IN PCB DESIGNS
70
Patent #:
8754530
Issue Dt:
06/17/2014
Application #:
12193339
Filing Dt:
08/18/2008
Publication #:
US20100038723
Pub Dt:
02/18/2010
Title:
SELF-ALIGNED BORDERLESS CONTACTS FOR HIGH DENSITY ELECTRONIC AND MEMORY DEVICE INTEGRATION
71
Patent #:
8087823
Issue Dt:
01/03/2012
Application #:
12193497
Filing Dt:
08/18/2008
Publication #:
US20100042355
Pub Dt:
02/18/2010
Title:
METHOD FOR MONITORING THERMAL CONTROL
72
Patent #:
8187897
Issue Dt:
05/29/2012
Application #:
12193825
Filing Dt:
08/19/2008
Publication #:
US20100044858
Pub Dt:
02/25/2010
Title:
FABRICATING PRODUCT CHIPS AND DIE WITH A FEATURE PATTERN THAT CONTAINS INFORMATION RELATING TO THE PRODUCT CHIP
73
Patent #:
7883607
Issue Dt:
02/08/2011
Application #:
12193834
Filing Dt:
08/19/2008
Publication #:
US20100047628
Pub Dt:
02/25/2010
Title:
METHODS OF ION MILLING FOR MAGNETIC HEADS AND SYSTEMS FORMED THEREBY
74
Patent #:
8230592
Issue Dt:
07/31/2012
Application #:
12193837
Filing Dt:
08/19/2008
Publication #:
US20100044095
Pub Dt:
02/25/2010
Title:
A METHOD FOR VIA STUB ELIMINATION
75
Patent #:
8136240
Issue Dt:
03/20/2012
Application #:
12193842
Filing Dt:
08/19/2008
Publication #:
US20100044096
Pub Dt:
02/25/2010
Title:
METHOD OF FORMING A SUBSTRATE HAVING A PLURALITY OF INSULATOR LAYERS
76
Patent #:
8237233
Issue Dt:
08/07/2012
Application #:
12194039
Filing Dt:
08/19/2008
Publication #:
US20100044801
Pub Dt:
02/25/2010
Title:
A FIELD EFFECT TRANSISTOR HAVING A GATE STRUCTURE WITH A FIRST SECTION ABOVE A CENTER PORTION OF THE CHANNEL REGION AND HAVING A FIRST EFFECTIVE WORK FUNCTION AND SECOND SECTIONS ABOVE EDGES OF THE CHANNEL REGION AND HAVING A SECOND EFFECTIVE WORK FUNCTION
77
Patent #:
8129256
Issue Dt:
03/06/2012
Application #:
12194065
Filing Dt:
08/19/2008
Publication #:
US20100044826
Pub Dt:
02/25/2010
Title:
3D INTEGRATED CIRCUIT DEVICE FABRICATION WITH PRECISELY CONTROLLABLE SUBSTRATE REMOVAL
78
Patent #:
8298914
Issue Dt:
10/30/2012
Application #:
12194198
Filing Dt:
08/19/2008
Publication #:
US20100047964
Pub Dt:
02/25/2010
Title:
3D INTEGRATED CIRCUIT DEVICE FABRICATION USING INTERFACE WAFER AS PERMANENT CARRIER
79
Patent #:
8399336
Issue Dt:
03/19/2013
Application #:
12194211
Filing Dt:
08/19/2008
Publication #:
US20100314711
Pub Dt:
12/16/2010
Title:
METHOD FOR FABRICATING A 3D INTEGRATED CIRCUIT DEVICE HAVING LOWER-COST ACTIVE CIRCUITRY LAYERS STACKED BEFORE HIGHER-COST ACTIVE CIRCUITRY LAYER
80
Patent #:
7781883
Issue Dt:
08/24/2010
Application #:
12194448
Filing Dt:
08/19/2008
Publication #:
US20100044856
Pub Dt:
02/25/2010
Title:
ELECTRONIC PACKAGE WITH A THERMAL INTERPOSER AND METHOD OF MANUFACTURING THE SAME
81
Patent #:
8119528
Issue Dt:
02/21/2012
Application #:
12194526
Filing Dt:
08/19/2008
Publication #:
US20100048020
Pub Dt:
02/25/2010
Title:
NANOSCALE ELECTRODES FOR PHASE CHANGE MEMORY DEVICES
82
Patent #:
7884396
Issue Dt:
02/08/2011
Application #:
12194563
Filing Dt:
08/20/2008
Publication #:
US20080308936
Pub Dt:
12/18/2008
Title:
METHOD AND STURCTURE FOR SELF-ALIGNED DEVICE CONTACTS
83
Patent #:
7866015
Issue Dt:
01/11/2011
Application #:
12194564
Filing Dt:
08/20/2008
Publication #:
US20080305606
Pub Dt:
12/11/2008
Title:
HIGH CAPACITANCE DENSITY VERTICAL NATURAL CAPACITORS
84
Patent #:
8122395
Issue Dt:
02/21/2012
Application #:
12194570
Filing Dt:
08/20/2008
Publication #:
US20080303564
Pub Dt:
12/11/2008
Title:
ON CHIP TIMING ADJUSTMENT IN MULTI-CHANNEL FAST DATA TRANSFER
85
Patent #:
8135100
Issue Dt:
03/13/2012
Application #:
12194571
Filing Dt:
08/20/2008
Publication #:
US20100046683
Pub Dt:
02/25/2010
Title:
ADAPTIVE CLOCK AND EQUALIZATION CONTROL SYSTEMS AND METHODS FOR DATA RECEIVERS IN COMMUNICATIONS SYSTEMS
86
Patent #:
7898003
Issue Dt:
03/01/2011
Application #:
12195456
Filing Dt:
08/21/2008
Publication #:
US20090001429
Pub Dt:
01/01/2009
Title:
HYBRID STRAINED ORIENTATED SUBSTRATES AND DEVICES
87
Patent #:
8138102
Issue Dt:
03/20/2012
Application #:
12195524
Filing Dt:
08/21/2008
Publication #:
US20100044678
Pub Dt:
02/25/2010
Title:
METHOD OF PLACING A SEMICONDUCTING NANOSTRUCTURE AND SEMICONDUCTOR DEVICE INCLUDING THE SEMICONDUCTING NANOSTRUCTURE
88
Patent #:
8682128
Issue Dt:
03/25/2014
Application #:
12195565
Filing Dt:
08/21/2008
Publication #:
US20100046901
Pub Dt:
02/25/2010
Title:
OPTICAL WAVEGUIDE WITH PERIODIC SUB-WAVELENGTH SIZED REGIONS
89
Patent #:
8268729
Issue Dt:
09/18/2012
Application #:
12195691
Filing Dt:
08/21/2008
Publication #:
US20100048027
Pub Dt:
02/25/2010
Title:
SMOOTH AND VERTICAL SEMICONDUCTOR FIN STRUCTURE
90
Patent #:
8024699
Issue Dt:
09/20/2011
Application #:
12195716
Filing Dt:
08/21/2008
Publication #:
US20080313583
Pub Dt:
12/18/2008
Title:
TESTING SUB-SYSTEMS OF A SYSTEM-ON-A-CHIP USING A CONFIGURABLE EXTERNAL SYSTEM-ON-A-CHIP
91
Patent #:
8132133
Issue Dt:
03/06/2012
Application #:
12196840
Filing Dt:
08/22/2008
Publication #:
US20100050137
Pub Dt:
02/25/2010
Title:
AUTOMATED ISOLATION OF LOGIC AND MACRO BLOCKS IN CHIP DESIGN TESTING
92
Patent #:
7648864
Issue Dt:
01/19/2010
Application #:
12197079
Filing Dt:
08/22/2008
Publication #:
US20080308831
Pub Dt:
12/18/2008
Title:
SEMICONDUCTOR STRUCTURE INCLUDING MIXED RARE EARTH OXIDE FORMED ON SILICON
93
Patent #:
8337646
Issue Dt:
12/25/2012
Application #:
12197366
Filing Dt:
08/25/2008
Publication #:
US20090008020
Pub Dt:
01/08/2009
Title:
GREENSHEET VIA REPAIR/FILL TOOL
94
Patent #:
8241970
Issue Dt:
08/14/2012
Application #:
12197459
Filing Dt:
08/25/2008
Publication #:
US20100044758
Pub Dt:
02/25/2010
Title:
CMOS WITH CHANNEL P-FINFET AND CHANNEL N-FINFET HAVING DIFFERENT CRYSTALLINE ORIENTATIONS AND PARALLEL FINS
95
Patent #:
7968270
Issue Dt:
06/28/2011
Application #:
12197571
Filing Dt:
08/25/2008
Publication #:
US20080311508
Pub Dt:
12/18/2008
Title:
PROCESS OF MAKING A SEMICONDUCTOR DEVICE USING MULTIPLE ANTIREFLECTIVE MATERIALS
96
Patent #:
7682591
Issue Dt:
03/23/2010
Application #:
12197688
Filing Dt:
08/25/2008
Publication #:
US20090053129
Pub Dt:
02/26/2009
Title:
EMBEDDED NANOPARTICLE FILMS AND METHOD FOR THEIR FORMATION IN SELECTIVE AREAS ON A SURFACE
97
Patent #:
7863083
Issue Dt:
01/04/2011
Application #:
12197845
Filing Dt:
08/25/2008
Publication #:
US20080311745
Pub Dt:
12/18/2008
Title:
HIGH TEMPERATURE PROCESSING COMPATIBLE METAL GATE ELECTRODE FOR PFETS AND METHODS FOR FABRICATION
98
Patent #:
8799837
Issue Dt:
08/05/2014
Application #:
12197980
Filing Dt:
08/25/2008
Publication #:
US20100050145
Pub Dt:
02/25/2010
Title:
OPTIMIZING A NETLIST CIRCUIT REPRESENTATION BY LEVERAGING BINARY DECISION DIAGRAMS TO PERFORM REWRITING
99
Patent #:
8311222
Issue Dt:
11/13/2012
Application #:
12198239
Filing Dt:
08/26/2008
Publication #:
US20100054471
Pub Dt:
03/04/2010
Title:
HARDWARE BASED MULTI-DIMENSIONAL ENCRYPTION
100
Patent #:
8303791
Issue Dt:
11/06/2012
Application #:
12198274
Filing Dt:
08/26/2008
Publication #:
US20090057154
Pub Dt:
03/05/2009
Title:
APPARATUS AND METHOD FOR ELECTROCHEMICAL PROCESSING OF THIN FILMS ON RESISTIVE SUBSTRATES
Assignor
1
GLOBALFOUNDRIES INC.
Exec Dt:
11/27/2018
Assignee
1
WILMINGTON TRUST, NATIONAL ASSOCIATION
1100 NORTH MARKET STREET
WILMINGTON, DELAWARE 19801
Correspondence name and address
CT CORPORATION
4400 EASTON COMMONS WAY
SUITE 125
COLUMBUS, OH 43219

Search Results as of: 05/08/2024 02:41 AM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT