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Reel/Frame:049490/0001   Pages: 892
Recorded: 11/29/2018
Conveyance: SECURITY AGREEMENT
Total properties: 13706
Page 57 of 138
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138
1
Patent #:
7811926
Issue Dt:
10/12/2010
Application #:
12198602
Filing Dt:
08/26/2008
Publication #:
US20080311744
Pub Dt:
12/18/2008
Title:
MULTILAYER HARDMASK SCHEME FOR DAMAGE-FREE DUAL DAMASCENE PROCESSING OF SICOH DIELECTRICS
2
Patent #:
8156362
Issue Dt:
04/10/2012
Application #:
12198974
Filing Dt:
08/27/2008
Publication #:
US20090235105
Pub Dt:
09/17/2009
Title:
HARDWARE MONITORING AND DECISION MAKING FOR TRANSITIONING IN AND OUT OF LOW-POWER STATE
3
Patent #:
7736949
Issue Dt:
06/15/2010
Application #:
12199063
Filing Dt:
08/27/2008
Publication #:
US20080318360
Pub Dt:
12/25/2008
Title:
DEVICE AND METHOD FOR FABRICATING DOUBLE-SIDED SOI WAFER SCALE PACKAGE WITH OPTICAL THROUGH VIA CONNECTIONS
4
Patent #:
8001493
Issue Dt:
08/16/2011
Application #:
12199161
Filing Dt:
08/27/2008
Publication #:
US20080319717
Pub Dt:
12/25/2008
Title:
EFFICIENT METHOD AND COMPUTER PROGRAM FOR MODELING AND IMPROVING STATIC MEMORY PERFORMANCE ACROSS PROCESS VARIATIONS AND ENVIRONMENTAL CONDITIONS
5
Patent #:
8293454
Issue Dt:
10/23/2012
Application #:
12199253
Filing Dt:
11/18/2008
Publication #:
US20090061355
Pub Dt:
03/05/2009
Title:
PROCESS OF MAKING A LITHOGRAPHIC STRUCTURE USING ANTIREFLECTIVE MATERIALS
6
Patent #:
7902061
Issue Dt:
03/08/2011
Application #:
12199407
Filing Dt:
08/27/2008
Publication #:
US20080318415
Pub Dt:
12/25/2008
Title:
INTERCONNECT STRUCTURES WITH ENCASING CAP AND METHODS OF MAKING THEREOF
7
Patent #:
7920434
Issue Dt:
04/05/2011
Application #:
12199438
Filing Dt:
08/27/2008
Publication #:
US20100054057
Pub Dt:
03/04/2010
Title:
MEMORY SENSING METHOD AND APPARATUS
8
Patent #:
7855133
Issue Dt:
12/21/2010
Application #:
12199516
Filing Dt:
08/27/2008
Publication #:
US20090087972
Pub Dt:
04/02/2009
Title:
FORMATION OF CARBON AND SEMICONDUCTOR NANOMATERIALS USING MOLECULAR ASSEMBLIES
9
Patent #:
8273886
Issue Dt:
09/25/2012
Application #:
12199607
Filing Dt:
08/27/2008
Publication #:
US20080318157
Pub Dt:
12/25/2008
Title:
RADIATION SENSITIVE SELF-ASSEMBLED MONOLAYERS AND USES THEREOF
10
Patent #:
8108193
Issue Dt:
01/31/2012
Application #:
12199920
Filing Dt:
08/28/2008
Publication #:
US20100057415
Pub Dt:
03/04/2010
Title:
COLLABORATION FRAMEWORK FOR MODELING
11
Patent #:
8247271
Issue Dt:
08/21/2012
Application #:
12200352
Filing Dt:
08/28/2008
Publication #:
US20080318365
Pub Dt:
12/25/2008
Title:
FORMATION OF ALPHA PARTICLE SHIELDS IN CHIP PACKAGING
12
Patent #:
7989893
Issue Dt:
08/02/2011
Application #:
12200482
Filing Dt:
08/28/2008
Publication #:
US20100052053
Pub Dt:
03/04/2010
Title:
SOI BODY CONTACT USING E-DRAM TECHNOLOGY
13
Patent #:
7989865
Issue Dt:
08/02/2011
Application #:
12200538
Filing Dt:
08/28/2008
Publication #:
US20100052026
Pub Dt:
03/04/2010
Title:
DEEP TRENCH CAPACITOR FOR SOI CMOS DEVICES FOR SOFT ERROR IMMUNITY
14
Patent #:
7674705
Issue Dt:
03/09/2010
Application #:
12201266
Filing Dt:
08/29/2008
Publication #:
US20090008788
Pub Dt:
01/08/2009
Title:
METHOD OF FORMING A SEMICONDUCTOR DEVICE
15
Patent #:
8126045
Issue Dt:
02/28/2012
Application #:
12201487
Filing Dt:
08/29/2008
Publication #:
US20100054324
Pub Dt:
03/04/2010
Title:
SYSTEM AND METHOD FOR LATENCY REDUCTION IN SPECULATIVE DECISION FEEDBACK EQUALIZERS
16
Patent #:
8156458
Issue Dt:
04/10/2012
Application #:
12201685
Filing Dt:
08/29/2008
Publication #:
US20100058269
Pub Dt:
03/04/2010
Title:
UNIQUIFICATION AND PARENT-CHILD CONSTRUCTS FOR 1XN VLSI DESIGN
17
Patent #:
7858989
Issue Dt:
12/28/2010
Application #:
12201801
Filing Dt:
08/29/2008
Publication #:
US20100051897
Pub Dt:
03/04/2010
Title:
DEVICE AND PROCESS OF FORMING DEVICE WITH DEVICE STRUCTURE FORMED IN TRENCH AND GRAPHENE LAYER FORMED THEREOVER
18
Patent #:
8001405
Issue Dt:
08/16/2011
Application #:
12201821
Filing Dt:
08/29/2008
Publication #:
US20100058084
Pub Dt:
03/04/2010
Title:
SELF-TUNING POWER MANAGEMENT TECHNIQUES
19
Patent #:
7939247
Issue Dt:
05/10/2011
Application #:
12201993
Filing Dt:
08/29/2008
Publication #:
US20100055577
Pub Dt:
03/04/2010
Title:
PROCESS OF PATTERNING SMALL SCALE DEVICES
20
Patent #:
8234604
Issue Dt:
07/31/2012
Application #:
12202500
Filing Dt:
09/02/2008
Publication #:
US20100058256
Pub Dt:
03/04/2010
Title:
CO-OPTIMIZATION OF EMBEDDED SYSTEMS UTILIZING SYMBOLIC EXECUTION
21
Patent #:
9059658
Issue Dt:
06/16/2015
Application #:
12202854
Filing Dt:
09/02/2008
Publication #:
US20100052584
Pub Dt:
03/04/2010
Title:
INCREASING TAPE VELOCITY BY DYNAMIC SWITCHING
22
Patent #:
8176303
Issue Dt:
05/08/2012
Application #:
12203456
Filing Dt:
09/03/2008
Publication #:
US20100058044
Pub Dt:
03/04/2010
Title:
MULTIPROCESSOR COMMUNICATION DEVICE AND METHODS THEREOF
23
Patent #:
8108811
Issue Dt:
01/31/2012
Application #:
12203955
Filing Dt:
09/04/2008
Publication #:
US20080320424
Pub Dt:
12/25/2008
Title:
VALIDATION OF ELECTRICAL PERFORMANCE OF AN ELECTRONIC PACKAGE PRIOR TO FABRICATION
24
Patent #:
8293610
Issue Dt:
10/23/2012
Application #:
12204395
Filing Dt:
09/04/2008
Publication #:
US20090218639
Pub Dt:
09/03/2009
Title:
SEMICONDUCTOR DEVICE COMPRISING A METAL GATE STACK OF REDUCED HEIGHT AND METHOD OF FORMING THE SAME
25
Patent #:
8426316
Issue Dt:
04/23/2013
Application #:
12204412
Filing Dt:
09/04/2008
Publication #:
US20090001587
Pub Dt:
01/01/2009
Title:
Ta-TaN SELECTIVE REMOVAL PROCESS FOR INTEGRATED DEVICE FABRICATION
26
Patent #:
7713834
Issue Dt:
05/11/2010
Application #:
12205361
Filing Dt:
09/05/2008
Publication #:
US20090047770
Pub Dt:
02/19/2009
Title:
METHOD OF FORMING ISOLATION REGIONS FOR INTEGRATED CIRCUITS
27
Patent #:
9405870
Issue Dt:
08/02/2016
Application #:
12205476
Filing Dt:
09/05/2008
Publication #:
US20090070717
Pub Dt:
03/12/2009
Title:
GENERATING COVERAGE DATA FOR A SWITCH FREQUENCY OF HDL OR VHDL SIGNALS
28
Patent #:
7951525
Issue Dt:
05/31/2011
Application #:
12206065
Filing Dt:
09/08/2008
Publication #:
US20100062368
Pub Dt:
03/11/2010
Title:
LOW OUTGASSING PHOTORESIST COMPOSITIONS
29
Patent #:
8479388
Issue Dt:
07/09/2013
Application #:
12207713
Filing Dt:
09/10/2008
Publication #:
US20090007427
Pub Dt:
01/08/2009
Title:
METHOD OF PRODUCING A LAND GRID ARRAY INTERPOSER
30
Patent #:
8250354
Issue Dt:
08/21/2012
Application #:
12208071
Filing Dt:
09/10/2008
Publication #:
US20090144472
Pub Dt:
06/04/2009
Title:
METHOD AND APPARATUS FOR MAKING A PROCESSOR SIDEBAND INTERFACE ADHERE TO SECURE MODE RESTRICTIONS
31
Patent #:
7943999
Issue Dt:
05/17/2011
Application #:
12208196
Filing Dt:
09/10/2008
Publication #:
US20090001476
Pub Dt:
01/01/2009
Title:
STRESS ENHANCED MOS CIRCUITS
32
Patent #:
8125618
Issue Dt:
02/28/2012
Application #:
12208358
Filing Dt:
09/11/2008
Publication #:
US20090040486
Pub Dt:
02/12/2009
Title:
REFLECTIVE FILM INTERFACE TO RESTORE TRANSVERSE MAGNETIC WAVE CONTRAST IN LITHOGRAPHIC PROCESSING
33
Patent #:
7979824
Issue Dt:
07/12/2011
Application #:
12208469
Filing Dt:
09/11/2008
Publication #:
US20100064270
Pub Dt:
03/11/2010
Title:
COST-BENEFIT OPTIMIZATION FOR AN AIRGAPPED INTEGRATED CIRCUIT
34
Patent #:
8176446
Issue Dt:
05/08/2012
Application #:
12208521
Filing Dt:
09/11/2008
Publication #:
US20100064273
Pub Dt:
03/11/2010
Title:
METHOD FOR COMPENSATING FOR VARIATIONS IN STRUCTURES OF AN INTEGRATED CIRCUIT
35
Patent #:
8108820
Issue Dt:
01/31/2012
Application #:
12208548
Filing Dt:
09/11/2008
Publication #:
US20100063781
Pub Dt:
03/11/2010
Title:
ENHANCED CONDUCTIVITY IN AN AIRGAPPED INTEGRATED CIRCUIT
36
Patent #:
8505200
Issue Dt:
08/13/2013
Application #:
12208581
Filing Dt:
09/11/2008
Publication #:
US20090119916
Pub Dt:
05/14/2009
Title:
LAND GRID ARRAY INTERPOSER PRODUCING METHOD
37
Patent #:
7912798
Issue Dt:
03/22/2011
Application #:
12209071
Filing Dt:
09/11/2008
Publication #:
US20090006049
Pub Dt:
01/01/2009
Title:
SYSTEM FOR ESTIMATING STORAGE REQUIREMENTS FOR A MULTI-DIMENSIONAL CLUSTERING DATA CONFIGURATION
38
Patent #:
8010921
Issue Dt:
08/30/2011
Application #:
12209461
Filing Dt:
09/12/2008
Publication #:
US20090013294
Pub Dt:
01/08/2009
Title:
SYSTEM AND METHOD FOR STATISTICAL TIMING ANALYSIS OF DIGITAL CIRCUITS
39
Patent #:
7666732
Issue Dt:
02/23/2010
Application #:
12210703
Filing Dt:
09/15/2008
Publication #:
US20090011552
Pub Dt:
01/08/2009
Title:
METHOD OF FABRICATING A METAL GATE CMOS WITH AT LEAST A SINGLE GATE METAL AND DUAL GATE DIELECTRICS
40
Patent #:
8315409
Issue Dt:
11/20/2012
Application #:
12211435
Filing Dt:
09/16/2008
Publication #:
US20100067718
Pub Dt:
03/18/2010
Title:
MODIFICATIONS OF AUDIO COMMUNICATIONS IN AN ONLINE ENVIRONMENT
41
Patent #:
7709902
Issue Dt:
05/04/2010
Application #:
12211647
Filing Dt:
09/16/2008
Publication #:
US20090008719
Pub Dt:
01/08/2009
Title:
METAL GATE CMOS WITH AT LEAST A SINGLE GATE METAL AND DUAL GATE DIELECTRICS
42
Patent #:
8569844
Issue Dt:
10/29/2013
Application #:
12211649
Filing Dt:
09/16/2008
Publication #:
US20090008720
Pub Dt:
01/08/2009
Title:
METAL GATE CMOS WITH AT LEAST A SINGLE GATE METAL AND DUAL GATE DIELECTRICS
43
Patent #:
7688058
Issue Dt:
03/30/2010
Application #:
12212247
Filing Dt:
09/17/2008
Publication #:
US20090015238
Pub Dt:
01/15/2009
Title:
INTEGRATED SPECTRUM ANALYZER CIRCUITS AND METHODS FOR PROVIDING ON-CHIP DIAGNOSTICS
44
Patent #:
7673173
Issue Dt:
03/02/2010
Application #:
12212577
Filing Dt:
09/17/2008
Publication #:
US20090013099
Pub Dt:
01/08/2009
Title:
SYSTEM AND PROGRAM FOR TRANSMITTING INPUT/OUTPUT REQUESTS FROM A FIRST CONTROLLER TO A SECOND CONTROLLER
45
Patent #:
7888603
Issue Dt:
02/15/2011
Application #:
12212925
Filing Dt:
09/18/2008
Publication #:
US20090008129
Pub Dt:
01/08/2009
Title:
COOLING OF SUBSTRATE USING INTERPOSER CHANNELS
46
Patent #:
8316540
Issue Dt:
11/27/2012
Application #:
12212927
Filing Dt:
09/18/2008
Publication #:
US20090013528
Pub Dt:
01/15/2009
Title:
METHOD OF PRODUCING A LAND GRID ARRAY (LGA) INTERPOSER STRUCTURE
47
Patent #:
7856711
Issue Dt:
12/28/2010
Application #:
12212998
Filing Dt:
09/18/2008
Publication #:
US20090011546
Pub Dt:
01/08/2009
Title:
METHOD OF FORMING A SUBSTRATE WITH INTERPOSER CHANNELS FOR COOLING THE SUBSTRATE
48
Patent #:
7615457
Issue Dt:
11/10/2009
Application #:
12220521
Filing Dt:
07/25/2008
Publication #:
US20080318373
Pub Dt:
12/25/2008
Title:
METHOD OF FABRICATING SELF-ALIGNED BIPOLAR TRANSISTOR HAVING TAPERED COLLECTOR
49
Patent #:
7837459
Issue Dt:
11/23/2010
Application #:
12221966
Filing Dt:
08/07/2008
Publication #:
US20080305197
Pub Dt:
12/11/2008
Title:
METHOD FOR FABRICATING DUAL DAMASCENE STRUCTURES USING PHOTO-IMPRINT LITHOGRAPHY, METHODS FOR FABRICATING IMPRINT LITHOGRAPHY MOLDS FOR DUAL DAMASCENE STRUCTURES, MATERIALS FOR IMPRINTABLE DIELECTRICS AND EQUIPMENT FOR PHOTO-IMPRINT LITHOGRAPHY USED IN DUAL DAMASCE
50
Patent #:
7982312
Issue Dt:
07/19/2011
Application #:
12222000
Filing Dt:
08/07/2008
Publication #:
US20080303160
Pub Dt:
12/11/2008
Title:
METHOD FOR FABRICATING DUAL DAMASCENE STRUCTURES USING PHOTO-IMPRINT LITHOGRAPHY, METHODS FOR FABRICATING IMPRINT LITHOGRAPHY MOLDS FOR DUAL DAMASCENE STRUCTURES, MATERIALS FOR IMPRINTABLE DIELECTRICS AND EQUIPMENT FOR PHOTO-IMPRINT LITHOGRAPHY USED IN DUAL DAMASCE
51
Patent #:
7862989
Issue Dt:
01/04/2011
Application #:
12228010
Filing Dt:
08/07/2008
Publication #:
US20090023083
Pub Dt:
01/22/2009
Title:
METHOD FOR FABRICATING DUAL DAMASCENE STRUCTURES USING PHOTO-IMPRINT LITHOGRAPHY, METHODS FOR FABRICATING IMPRINT LITHOGRAPHY MOLDS FOR DUAL DAMASCENE STRUCTURES, MATERIALS FOR IMPRINTABLE DIELECTRICS AND EQUIPMENT FOR PHOTO-IMPRINT LITHOGRAPHY USED IN DUAL DAMASCE
52
Patent #:
8140314
Issue Dt:
03/20/2012
Application #:
12228587
Filing Dt:
08/14/2008
Publication #:
US20080312896
Pub Dt:
12/18/2008
Title:
OPTIMAL BUS OPERATION PERFORMANCE IN A LOGIC SIMULATION ENVIRONMENT
53
Patent #:
8110746
Issue Dt:
02/07/2012
Application #:
12233061
Filing Dt:
09/18/2008
Publication #:
US20090008130
Pub Dt:
01/08/2009
Title:
COOLING OF SUBSTRATE USING INTERPOSER CHANNELS
54
Patent #:
8059400
Issue Dt:
11/15/2011
Application #:
12233104
Filing Dt:
09/18/2008
Publication #:
US20090011547
Pub Dt:
01/08/2009
Title:
COOLING OF SUBSTRATE USING INTERPOSER CHANNELS
55
Patent #:
8056037
Issue Dt:
11/08/2011
Application #:
12233169
Filing Dt:
09/18/2008
Publication #:
US20090083684
Pub Dt:
03/26/2009
Title:
METHOD FOR VIOLATING THE LOGICAL FUNCTION AND TIMING BEHAVIOR OF A DIGITAL CIRCUIT DECISION
56
Patent #:
7736841
Issue Dt:
06/15/2010
Application #:
12233245
Filing Dt:
09/18/2008
Publication #:
US20090011371
Pub Dt:
01/08/2009
Title:
REFLECTIVE FILM INTERFACE TO RESTORE TRANSVERSE MAGNETIC WAVE CONTRAST IN LITHOGRAPHIC PROCESSING
57
Patent #:
7848135
Issue Dt:
12/07/2010
Application #:
12234100
Filing Dt:
09/19/2008
Publication #:
US20100073997
Pub Dt:
03/25/2010
Title:
PIEZO-DRIVEN NON-VOLATILE MEMORY CELL WITH HYSTERETIC RESISTANCE
58
Patent #:
7949983
Issue Dt:
05/24/2011
Application #:
12234473
Filing Dt:
09/19/2008
Publication #:
US20090019414
Pub Dt:
01/15/2009
Title:
HIGH TOLERANCE TCR BALANCED HIGH CURRENT RESISTOR FOR RF CMOS AND RF SIGE BICMOS APPLICATIONS AND CADENCED BASED HIERARCHICAL PARAMETERIZED CELL DESIGN KIT WITH TUNABLE TCR AND ESD RESISTOR BALLASTING FEATURE
59
Patent #:
8193799
Issue Dt:
06/05/2012
Application #:
12236003
Filing Dt:
09/23/2008
Publication #:
US20100072961
Pub Dt:
03/25/2010
Title:
INTERPOSER INCLUDING VOLTAGE REGULATOR AND METHOD THEREFOR
60
Patent #:
8090929
Issue Dt:
01/03/2012
Application #:
12236551
Filing Dt:
09/24/2008
Publication #:
US20090217000
Pub Dt:
08/27/2009
Title:
GENERATING CLOCK SIGNALS FOR COUPLED ASIC CHIPS IN PROCESSOR INTERFACE WITH X AND Y LOGIC OPERABLE IN FUNCTIONAL AND SCANNING MODES
61
Patent #:
7755161
Issue Dt:
07/13/2010
Application #:
12237148
Filing Dt:
09/24/2008
Publication #:
US20090039385
Pub Dt:
02/12/2009
Title:
SEMICONDUCTOR DEVICES
62
Patent #:
7930669
Issue Dt:
04/19/2011
Application #:
12237246
Filing Dt:
09/24/2008
Publication #:
US20090019415
Pub Dt:
01/15/2009
Title:
DESIGN STAGE MITIGATION OF INTERCONNECT VARIABILITY
63
Patent #:
8117568
Issue Dt:
02/14/2012
Application #:
12237727
Filing Dt:
09/25/2008
Publication #:
US20100077372
Pub Dt:
03/25/2010
Title:
APPARATUS, METHOD AND COMPUTER PROGRAM PRODUCT FOR FAST SIMULATION OF MANUFACTURING EFFECTS DURING INTEGRATED CIRCUIT DESIGN
64
Patent #:
8111903
Issue Dt:
02/07/2012
Application #:
12238602
Filing Dt:
09/26/2008
Publication #:
US20100080446
Pub Dt:
04/01/2010
Title:
INLINE LOW-DAMAGE AUTOMATED FAILURE ANALYSIS
65
Patent #:
7855455
Issue Dt:
12/21/2010
Application #:
12239688
Filing Dt:
09/26/2008
Publication #:
US20100078770
Pub Dt:
04/01/2010
Title:
LOCK AND KEY THROUGH-VIA METHOD FOR WAFER LEVEL 3 D INTEGRATION AND STRUCTURES PRODUCED
66
Patent #:
7979248
Issue Dt:
07/12/2011
Application #:
12240534
Filing Dt:
09/29/2008
Publication #:
US20090076781
Pub Dt:
03/19/2009
Title:
MODEL INDEPENDENT SIMULATION
67
Patent #:
9102008
Issue Dt:
08/11/2015
Application #:
12241274
Filing Dt:
09/30/2008
Publication #:
US20090107964
Pub Dt:
04/30/2009
Title:
DEBRIS MINIMIZATION AND IMPROVED SPATIAL RESOLUTION IN PULSED LASER ABLATION OF MATERIALS
68
Patent #:
7847605
Issue Dt:
12/07/2010
Application #:
12242114
Filing Dt:
09/30/2008
Publication #:
US20090021289
Pub Dt:
01/22/2009
Title:
VOLTAGE DETECTION CIRCUIT IN AN INTEGRATED CIRCUIT AND METHOD OF GENERATING A TRIGGER FLAG SIGNAL
69
Patent #:
8138066
Issue Dt:
03/20/2012
Application #:
12242990
Filing Dt:
10/01/2008
Publication #:
US20100081259
Pub Dt:
04/01/2010
Title:
DISLOCATION ENGINEERING USING A SCANNED LASER
70
Patent #:
8091050
Issue Dt:
01/03/2012
Application #:
12243427
Filing Dt:
10/01/2008
Publication #:
US20100083203
Pub Dt:
04/01/2010
Title:
MODELING SYSTEM-LEVEL EFFECTS OF SOFT ERRORS
71
Patent #:
8101456
Issue Dt:
01/24/2012
Application #:
12243759
Filing Dt:
10/01/2008
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Assignor
1
GLOBALFOUNDRIES INC.
Exec Dt:
11/27/2018
Assignee
1
WILMINGTON TRUST, NATIONAL ASSOCIATION
1100 NORTH MARKET STREET
WILMINGTON, DELAWARE 19801
Correspondence name and address
CT CORPORATION
4400 EASTON COMMONS WAY
SUITE 125
COLUMBUS, OH 43219

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