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12/10/2009
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02/03/2011
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11/26/2009
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02/03/2011
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11/19/2009
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02/03/2011
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02/03/2011
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02/03/2011
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12/10/2009
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03/26/2013
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02/03/2011
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03/20/2012
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11/26/2009
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06/24/2010
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12/13/2011
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12/17/2009
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11/26/2009
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08/04/2009
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11/19/2009
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02/25/2014
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12/10/2009
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02/15/2011
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02/11/2010
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12/28/2010
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08/04/2009
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11/26/2009
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05/29/2012
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11/26/2009
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06/05/2012
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02/10/2011
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02/10/2011
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08/14/2012
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02/10/2011
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11/13/2012
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12/17/2009
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02/10/2011
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02/10/2011
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05/10/2011
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12/03/2009
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07/10/2012
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02/10/2011
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NANOMESH SRAM CELL
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05/12/2015
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02/10/2011
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10/04/2011
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08/06/2009
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11/26/2009
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03/08/2011
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08/07/2009
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12/03/2009
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07/12/2011
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08/07/2009
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09/16/2010
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03/06/2012
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08/07/2009
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02/10/2011
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02/15/2011
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08/07/2009
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12/03/2009
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03/26/2013
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08/07/2009
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02/10/2011
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11/16/2010
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08/07/2009
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12/10/2009
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12/28/2010
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08/08/2009
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12/03/2009
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11/08/2011
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08/08/2009
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12/03/2009
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09/18/2012
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08/08/2009
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12/03/2009
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02/15/2011
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08/08/2009
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01/07/2010
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02/15/2011
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12538120
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08/08/2009
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12/17/2009
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02/19/2013
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08/09/2009
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12/03/2009
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02/22/2011
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12538193
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08/10/2009
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12/03/2009
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DEEP TRENCH IN A SEMICONDUCTOR STRUCTURE
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01/10/2017
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12538194
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08/10/2009
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09/16/2010
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PIXEL SENSOR CELL INCLUDING LIGHT SHIELD
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05/22/2012
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08/10/2009
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09/16/2010
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SPLIT-GATE DRAM WITH LATERAL CONTROL-GATE MUGFET
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08/30/2011
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08/10/2009
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09/16/2010
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SELF-ALIGNED SCHOTTKY DIODE
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07/12/2011
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08/10/2009
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02/10/2011
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SEMICONDUCTOR DEVICES HAVING STRESS RELIEF LAYERS AND METHODS FOR FABRICATING THE SAME
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03/06/2012
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08/10/2009
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12/03/2009
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10/04/2011
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08/10/2009
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02/10/2011
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03/29/2011
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12538515
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08/10/2009
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12/03/2009
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08/09/2011
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12538759
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08/10/2009
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12/03/2009
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Title:
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STRUCTURES HAVING LATTICE-MISMATCHED SINGLE-CRYSTALLINE SEMICONDUCTOR LAYERS ON THE SAME LITHOGRAPHIC LEVEL AND METHODS OF MANUFACTURING THE SAME
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Patent #:
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Issue Dt:
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08/21/2012
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Application #:
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12538782
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Filing Dt:
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08/10/2009
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Publication #:
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Pub Dt:
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12/03/2009
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Title:
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FORMATION OF VERTICAL DEVICES BY ELECTROPLATING
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Patent #:
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Issue Dt:
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12/11/2012
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Application #:
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12538797
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Filing Dt:
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08/10/2009
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Publication #:
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Pub Dt:
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02/18/2010
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Title:
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PATTERNED STRUCTURE FOR A THERMAL INTERFACE
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Patent #:
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Issue Dt:
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11/08/2011
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Application #:
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12539248
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Filing Dt:
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08/11/2009
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Publication #:
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Pub Dt:
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02/11/2010
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Title:
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ION IMPLANTATION FOR SUPPRESSION OF DEFECTS IN ANNEALED SIGE LAYERS
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Patent #:
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Issue Dt:
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08/07/2012
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Application #:
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12539284
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Filing Dt:
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08/11/2009
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Publication #:
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Pub Dt:
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02/17/2011
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Title:
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HETEROJUNCTION BIPOLAR TRANSISTORS AND METHODS OF MANUFACTURE
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Patent #:
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Issue Dt:
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06/14/2011
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Application #:
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12539635
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Filing Dt:
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08/12/2009
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Publication #:
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Pub Dt:
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12/03/2009
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Title:
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DUTY CYCLE MEASUREMENT CIRCUIT FOR MEASURING AND MAINTAINING BALANCED CLOCK DUTY CYCLE
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Patent #:
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Issue Dt:
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10/18/2011
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Application #:
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12539660
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Filing Dt:
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08/12/2009
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Publication #:
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Pub Dt:
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12/17/2009
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Title:
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METHOD FOR FORMING SELF-ALIGNED METAL SILICIDE CONTACTS
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Patent #:
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Issue Dt:
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07/31/2012
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Application #:
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12539821
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Filing Dt:
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08/12/2009
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Publication #:
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Pub Dt:
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02/17/2011
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Title:
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SILICON PHOTON DETECTOR
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Patent #:
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Issue Dt:
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11/30/2010
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Application #:
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12539842
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Filing Dt:
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08/12/2009
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Publication #:
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Pub Dt:
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01/14/2010
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Title:
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METAL HIGH-K TRANSISTOR HAVING SILICON SIDEWALL FOR REDUCED PARASITIC CAPACITANCE
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Patent #:
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Issue Dt:
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12/21/2010
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Application #:
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12539860
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Filing Dt:
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08/12/2009
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Publication #:
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Pub Dt:
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12/03/2009
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Title:
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A METHOD TO REDUCE PARASTIC CAPACITANCE IN A METAL HIGH DIELECTRIC CONSTANT (MHK) TRANSISTOR
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Patent #:
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Issue Dt:
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11/02/2010
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Application #:
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12539942
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Filing Dt:
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08/12/2009
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Publication #:
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Pub Dt:
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12/10/2009
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Title:
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METHOD FOR FORMING SLOT VIA BITLINE FOR MRAM DEVICES
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Patent #:
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Issue Dt:
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07/24/2012
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Application #:
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12540034
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Filing Dt:
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08/12/2009
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Publication #:
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Pub Dt:
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02/17/2011
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Title:
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METHODS AND TECHNIQUES FOR CREATING AND VISUALIZING THERMAL ZONES
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Patent #:
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Issue Dt:
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08/14/2012
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Application #:
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12540213
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Filing Dt:
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08/12/2009
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Publication #:
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Pub Dt:
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02/17/2011
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Title:
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KNOWLEDGE-BASED MODELS FOR DATA CENTERS
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Patent #:
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Issue Dt:
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10/26/2010
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Application #:
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12540440
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Filing Dt:
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08/13/2009
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Publication #:
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Pub Dt:
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12/03/2009
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Title:
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METHODS FOR FORMING IMPROVED SELF-ASSEMBLED PATTERNS OF BLOCK COPOLYMERS
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Patent #:
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Issue Dt:
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11/08/2011
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Application #:
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12540481
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Filing Dt:
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08/13/2009
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Publication #:
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Pub Dt:
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02/17/2011
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Title:
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METHOD AND PACKAGE FOR CIRCUIT CHIP PACKAGING
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Patent #:
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Issue Dt:
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08/02/2011
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Application #:
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12540487
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Filing Dt:
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08/13/2009
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Publication #:
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Pub Dt:
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02/17/2011
| | | | |
Title:
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METHOF OF FORMING SILICON CHICKLET PEDESTAL
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Patent #:
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Issue Dt:
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08/14/2012
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Application #:
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12540510
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Filing Dt:
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08/13/2009
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Publication #:
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Pub Dt:
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02/17/2011
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Title:
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ELECTROSTATIC CHUCKING OF AN INSULATOR HANDLE SUBSTRATE
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Patent #:
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Issue Dt:
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08/09/2011
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Application #:
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12540613
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Filing Dt:
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08/13/2009
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Publication #:
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Pub Dt:
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02/17/2011
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Title:
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VERTICAL SPACER FORMING AND RELATED TRANSISTOR
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Patent #:
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Issue Dt:
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08/21/2012
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Application #:
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12540759
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Filing Dt:
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08/13/2009
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Publication #:
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Pub Dt:
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02/17/2011
| | | | |
Title:
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INTERCONNECTION BETWEEN SUBLITHOGRAPHIC-PITCHED STRUCTURES AND LITHOGRAPHIC-PITCHED STRUCTURES
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Patent #:
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Issue Dt:
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04/12/2011
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Application #:
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12540949
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Filing Dt:
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08/13/2009
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Publication #:
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Pub Dt:
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12/17/2009
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Title:
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NON-VOLATILE RESISTANCE SWITCHING MEMORY
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Patent #:
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Issue Dt:
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11/15/2011
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Application #:
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12541231
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Filing Dt:
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08/14/2009
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Publication #:
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Pub Dt:
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06/10/2010
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Title:
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PHOTOSENSITIVE SELF-ASSEMBLED MONOLAYER FOR SELECTIVE PLACEMENT OF HYDROPHILIC STRUCTURES
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Patent #:
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Issue Dt:
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04/10/2012
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Application #:
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12541371
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Filing Dt:
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08/14/2009
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Publication #:
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Pub Dt:
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12/17/2009
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Title:
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NANOWIRE MOSFET WITH DOPED EPITAXIAL CONTACTS FOR SOURCE AND DRAIN
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Patent #:
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Issue Dt:
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03/01/2011
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Application #:
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12541411
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Filing Dt:
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08/14/2009
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Publication #:
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Pub Dt:
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12/10/2009
| | | | |
Title:
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NON-VOLATILE RESISTANCE SWITCHING MEMORY
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Patent #:
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Issue Dt:
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11/27/2012
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Application #:
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12541435
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Filing Dt:
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08/14/2009
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Publication #:
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Pub Dt:
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02/17/2011
| | | | |
Title:
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PROCESSING OF STREAMING DATA WITH A KEYED DELAY
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Patent #:
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Issue Dt:
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07/19/2011
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Application #:
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12541495
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Filing Dt:
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08/14/2009
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Publication #:
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Pub Dt:
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12/10/2009
| | | | |
Title:
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METHOD FOR FABRICATING A VERTICAL FIELD EFFECT TRANSISTOR ARRAY COMPRISING A PLURALITY OF SEMICONDUCTOR PILLARS
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Patent #:
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Issue Dt:
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04/19/2011
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Application #:
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12541502
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Filing Dt:
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08/14/2009
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Publication #:
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Pub Dt:
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12/10/2009
| | | | |
Title:
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ADOPTING FEATURE OF BURIED ELECTRICALLY CONDUCTIVE LAYER IN DIELECTRICS FOR ELECTRICAL ANTI-FUSE APPLICATION
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Patent #:
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Issue Dt:
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02/14/2012
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Application #:
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12541559
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Filing Dt:
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08/14/2009
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Publication #:
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Pub Dt:
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12/10/2009
| | | | |
Title:
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SELF-CONSTRAINED ANISOTROPIC GERMANIUM NANOSTRUCTURE FROM ELECTROPLATING
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Patent #:
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Issue Dt:
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02/26/2013
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Application #:
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12541562
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Filing Dt:
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08/14/2009
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Publication #:
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Pub Dt:
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02/18/2010
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Title:
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HIGH PERFORMANCE CMOS CIRCUITS, AND METHODS FOR FABRICATING SAME
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Patent #:
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Issue Dt:
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10/16/2012
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Application #:
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12541575
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Filing Dt:
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08/14/2009
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Publication #:
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Pub Dt:
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01/21/2010
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Title:
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TIC AS A THERMALLY STABLE P-METAL CARBIDE ON HIGH K SIO2 GATE STACKS
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Patent #:
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Issue Dt:
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10/04/2011
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Application #:
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12541595
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Filing Dt:
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08/14/2009
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Publication #:
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Pub Dt:
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02/17/2011
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Title:
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PHASE CHANGE MEMORY DEVICE WITH PLATED PHASE CHANGE MATERIAL
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Patent #:
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Issue Dt:
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06/28/2011
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Application #:
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12541641
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Filing Dt:
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08/14/2009
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Publication #:
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Pub Dt:
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12/10/2009
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Title:
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INTEGRATED CIRCUIT CHIP WITH FETS HAVING MIXED BODY THICKNESSES AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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12/27/2011
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Application #:
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12541748
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Filing Dt:
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08/14/2009
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Publication #:
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Pub Dt:
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12/10/2009
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Title:
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SELECTIVE PLACEMENT OF CARBON NANOTUBES THROUGH FUNCTIONALIZATION
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Patent #:
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Issue Dt:
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10/09/2012
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Application #:
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12541758
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Filing Dt:
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08/14/2009
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Publication #:
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Pub Dt:
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06/10/2010
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Title:
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SELECTIVE PLACEMENT OF CARBON NANOTUBES THROUGH FUNCTIONALIZATION
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Patent #:
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Issue Dt:
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01/22/2013
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Application #:
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12542042
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Filing Dt:
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08/17/2009
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Publication #:
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Pub Dt:
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02/17/2011
| | | | |
Title:
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MOMENT-BASED CHARACTERIZATION WAVEFORM FOR STATIC TIMING ANALYSIS
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Patent #:
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Issue Dt:
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12/27/2011
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Application #:
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12542179
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Filing Dt:
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08/17/2009
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Publication #:
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Pub Dt:
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02/17/2011
| | | | |
Title:
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EXTREMELY THIN SILICON ON INSULATOR (ETSOI) COMPLEMENTARY METAL OXIDE SEMICONDUCTOR (CMOS) WITH IN-SITU DOPED SOURCE AND DRAIN REGIONS FORMED BY A SINGLE MASK
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Patent #:
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Issue Dt:
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08/23/2011
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Application #:
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12542184
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Filing Dt:
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08/17/2009
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Publication #:
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Pub Dt:
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12/17/2009
| | | | |
Title:
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ELECTRONIC CIRCUIT FOR MEASUREMENT OF TRANSISTOR VARIABILITY AND THE LIKE
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|
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Patent #:
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Issue Dt:
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12/27/2011
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Application #:
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12542187
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Filing Dt:
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08/17/2009
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Publication #:
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Pub Dt:
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12/17/2009
| | | | |
Title:
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METHODS FOR CHARACTERIZING DEVICE VARIATION IN ELECTRONIC MEMORY CIRCUITS
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Patent #:
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Issue Dt:
|
01/01/2013
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Application #:
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12542235
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Filing Dt:
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08/17/2009
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Publication #:
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Pub Dt:
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12/10/2009
| | | | |
Title:
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COMPACT MULTI-PORT CAM CELL IMPLEMENTED IN 3D VERTICAL INTEGRATION
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Patent #:
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Issue Dt:
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05/08/2012
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Application #:
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12542269
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Filing Dt:
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08/17/2009
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Publication #:
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Pub Dt:
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12/10/2009
| | | | |
Title:
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CHIP CARRIER SUBSTRATE INCLUDING CAPACITOR AND METHOD FOR FABRICATION THEREOF
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Patent #:
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Issue Dt:
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04/24/2012
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Application #:
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12542368
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Filing Dt:
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08/17/2009
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Publication #:
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Pub Dt:
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02/17/2011
| | | | |
Title:
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METHOD, STRUCTURE, AND DESIGN STRUCTURE FOR AN IMPEDANCE-OPTIMIZED MICROSTRIP TRANSMISSION LINE FOR MULTI-BAND AND ULTRA-WIDE BAND APPLICATIONS
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Patent #:
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Issue Dt:
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05/29/2012
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Application #:
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12542747
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Filing Dt:
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08/18/2009
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Publication #:
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Pub Dt:
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02/24/2011
| | | | |
Title:
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MULTI-GATE NON-PLANAR FIELD EFFECT TRANSISTOR STRUCTURE AND METHOD OF FORMING THE STRUCTURE USING A DOPANT IMPLANT PROCESS TO TUNE DEVICE DRIVE CURRENT
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Patent #:
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Issue Dt:
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01/31/2012
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Application #:
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12542768
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Filing Dt:
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08/18/2009
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Publication #:
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Pub Dt:
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02/24/2011
| | | | |
Title:
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THERMAL DUAL GATE OXIDE DEVICE INTEGRATION
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|
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Patent #:
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Issue Dt:
|
05/01/2012
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Application #:
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12542771
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Filing Dt:
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08/18/2009
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Publication #:
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Pub Dt:
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02/24/2011
| | | | |
Title:
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METHOD OF FORMING EXTREMELY THIN SEMICONDUCTOR ON INSULATOR (ETSOI) DEVICE WITHOUT ION IMPLANTATION
|
|