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04/01/2010
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01/21/2010
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03/10/2011
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12/31/2009
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12/31/2009
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03/10/2011
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12/31/2009
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03/20/2012
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04/01/2010
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03/10/2011
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01/31/2012
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03/10/2011
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12/07/2010
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12/31/2009
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09/02/2010
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03/01/2011
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03/10/2011
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10/16/2012
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03/10/2011
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02/22/2011
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03/10/2011
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08/23/2011
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09/11/2009
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01/07/2010
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07/31/2012
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09/14/2009
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03/17/2011
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11/23/2010
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09/14/2009
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07/26/2011
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09/14/2009
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03/17/2011
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10/04/2011
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09/15/2009
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03/17/2011
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07/09/2013
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03/17/2011
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04/05/2011
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09/16/2009
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03/17/2011
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06/07/2011
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03/17/2011
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LARGE GRAIN SIZE CONDUCTIVE STRUCTURE FOR NARROW INTERCONNECT OPENINGS
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12/27/2011
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03/17/2011
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03/20/2012
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09/17/2009
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03/17/2011
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02/21/2012
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03/17/2011
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03/17/2011
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03/17/2011
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11/08/2011
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09/17/2009
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05/06/2010
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03/17/2011
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03/17/2011
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01/14/2010
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05/24/2011
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03/17/2011
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01/14/2010
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03/24/2011
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12/11/2012
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03/24/2011
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10/22/2013
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09/18/2009
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05/06/2010
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03/24/2011
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02/09/2016
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09/18/2009
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03/24/2011
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07/26/2011
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03/24/2011
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09/25/2012
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03/24/2011
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10/30/2012
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09/18/2009
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03/24/2011
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02/15/2011
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09/21/2009
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03/24/2011
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03/24/2011
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03/24/2011
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09/18/2012
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03/24/2011
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08/07/2012
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09/22/2009
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01/14/2010
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02/15/2011
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03/24/2011
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06/12/2012
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09/23/2009
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05/06/2010
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05/29/2012
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09/24/2009
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03/24/2011
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09/20/2011
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09/24/2009
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03/24/2011
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06/23/2015
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09/24/2009
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03/24/2011
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02/28/2012
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09/24/2009
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03/24/2011
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09/25/2009
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03/31/2011
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ASYMMETRIC SILICON-ON-INSULATOR SRAM CELL
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12/25/2012
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09/25/2009
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03/31/2011
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DUAL BETA RATIO SRAM
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08/14/2012
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09/25/2009
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Publication #:
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Pub Dt:
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03/31/2011
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Title:
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ACTIVATION OF GRAPHENE BUFFER LAYERS ON SILICON CARBIDE BY ULTRA LOW TEMPERATURE OXIDATION
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Patent #:
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Issue Dt:
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05/24/2011
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Application #:
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12567279
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Filing Dt:
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09/25/2009
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Publication #:
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Pub Dt:
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02/04/2010
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Title:
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APPARATUS AND METHOD FOR REMOVING BUBBLES FROM A PROCESS LIQUID
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Patent #:
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Issue Dt:
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09/13/2011
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Application #:
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12567490
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Filing Dt:
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09/25/2009
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Publication #:
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Pub Dt:
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01/21/2010
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Title:
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INTEGRATED CIRCUIT HARD MASK PROCESSING SYSTEM
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Patent #:
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05/15/2012
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12567963
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Filing Dt:
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09/28/2009
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Publication #:
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Pub Dt:
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03/31/2011
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Title:
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REPLACEMENT SPACER FOR TUNNEL FETS
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Patent #:
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Issue Dt:
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07/24/2012
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Application #:
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12568035
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Filing Dt:
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09/28/2009
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Publication #:
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Pub Dt:
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03/31/2011
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Title:
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WRITING TO MEMORY USING ADAPTIVE WRITE TECHNIQUES
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Patent #:
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Issue Dt:
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07/31/2012
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12568083
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Filing Dt:
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09/28/2009
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Publication #:
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Pub Dt:
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03/31/2011
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Title:
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TOOL COMMONALITY AND STRATIFICATION ANALYSIS TO ENHANCE A PRODUCTION PROCESS
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Patent #:
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Issue Dt:
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08/07/2012
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Application #:
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12568287
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Filing Dt:
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09/28/2009
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Publication #:
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Pub Dt:
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03/31/2011
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Title:
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SELF-ALIGNED WELL IMPLANT FOR IMPROVING SHORT CHANNEL EFFECTS CONTROL, PARASITIC CAPACITANCE, AND JUNCTION LEAKAGE
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Patent #:
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Issue Dt:
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08/07/2012
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Application #:
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12568985
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Filing Dt:
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09/29/2009
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Publication #:
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Pub Dt:
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03/31/2011
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Title:
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SYSTEM AND METHOD FOR ESTIMATING LEAKAGE CURRENT OF AN ELECTRONIC CIRCUIT
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Patent #:
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Issue Dt:
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06/19/2012
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Application #:
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12569200
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Filing Dt:
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09/29/2009
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Publication #:
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Pub Dt:
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03/31/2011
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Title:
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PATTERNABLE LOW-K DIELECTRIC INTERCONNECT STRUCTURE WITH A GRADED CAP LAYER AND METHOD OF FABRICATION
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Patent #:
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Issue Dt:
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12/18/2012
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Application #:
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12569421
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Filing Dt:
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09/29/2009
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Publication #:
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Pub Dt:
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03/31/2011
| | | | |
Title:
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CHARACTERIZATION OF LONG RANGE VARIABILITY
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Patent #:
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Issue Dt:
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03/27/2012
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Application #:
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12570333
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Filing Dt:
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09/30/2009
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Publication #:
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Pub Dt:
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03/31/2011
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Title:
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BUSINESS PROCESS ERROR HANDLING THROUGH PROCESS INSTANCE BACKUP AND RECOVERY
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Patent #:
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12/27/2011
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12570384
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09/30/2009
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Publication #:
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Pub Dt:
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03/31/2011
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Title:
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ENHANCED STRESS-RETENTION FIN-FET DEVICES AND METHODS OF FABRICATING ENHANCED STRESS RETENTION FIN-FET DEVICES
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Patent #:
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08/07/2012
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12570418
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Filing Dt:
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09/30/2009
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Publication #:
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Pub Dt:
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03/31/2011
| | | | |
Title:
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METHOD FOR CALCULATING CAPACITANCE GRADIENTS IN VLSI LAYOUTS USING A SHAPE PROCESSING ENGINE
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Patent #:
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Issue Dt:
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12/25/2012
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Application #:
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12571477
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10/01/2009
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Publication #:
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Pub Dt:
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04/07/2011
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Title:
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CLEANING EXHAUST SCREENS IN A MANUFACTURING PROCESS
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Patent #:
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Issue Dt:
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07/24/2012
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12572297
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10/02/2009
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Pub Dt:
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01/28/2010
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Title:
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METHOD FOR IC WIRING YIELD OPTIMIZATION, INCLUDING WIRE WIDENING DURING AND AFTER ROUTING
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Patent #:
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Issue Dt:
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03/31/2015
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12573188
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Filing Dt:
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10/05/2009
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Pub Dt:
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04/07/2011
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Title:
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STRUCTURE AND METHOD TO CREATE A DAMASCENE LOCAL INTERCONNECT DURING METAL GATE DEPOSITION
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Issue Dt:
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01/11/2011
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12573407
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Filing Dt:
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10/05/2009
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Pub Dt:
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01/28/2010
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Title:
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LOW LEAKAGE METAL-CONTAINING CAP PROCESS USING OXIDATION
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Patent #:
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Issue Dt:
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10/01/2013
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12573440
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Filing Dt:
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10/05/2009
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Publication #:
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Pub Dt:
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04/07/2011
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Title:
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METAL GATE FET HAVING REDUCED THRESHOLD VOLTAGE ROLL-OFF
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Patent #:
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Issue Dt:
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04/19/2011
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Application #:
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12574118
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Filing Dt:
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10/06/2009
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Publication #:
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Pub Dt:
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04/07/2011
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Title:
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VARYING CAPACITANCE VOLTAGE CONTRAST STRUCTURES TO DETERMINE DEFECT RESISTANCE
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Patent #:
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Issue Dt:
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03/25/2014
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Application #:
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12574126
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Filing Dt:
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10/06/2009
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Publication #:
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Pub Dt:
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04/07/2011
| | | | |
Title:
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SPLIT LEVEL SHALLOW TRENCH ISOLATION FOR AREA EFFICIENT BODY CONTACTS IN SOI MOSFETS
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Patent #:
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Issue Dt:
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02/03/2015
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12574296
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Filing Dt:
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10/06/2009
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Publication #:
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Pub Dt:
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04/07/2011
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Title:
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MERGED FINFETS AND METHOD OF MANUFACTURING THE SAME
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Patent #:
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Issue Dt:
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05/17/2011
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12574318
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Filing Dt:
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10/06/2009
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Publication #:
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Pub Dt:
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04/07/2011
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Title:
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METHODS FOR OBTAINING GATE STACKS WITH TUNABLE THRESHOLD VOLTAGE AND SCALING
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Issue Dt:
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02/28/2012
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12574926
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10/07/2009
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Pub Dt:
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04/07/2011
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Title:
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ANTIFUSE STRUCTURE FOR IN LINE CIRCUIT MODIFICATION
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Issue Dt:
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02/05/2013
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12575068
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Filing Dt:
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10/07/2009
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Pub Dt:
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04/07/2011
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Title:
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SHAPE CHARACTERIZATION WITH ELLIPTIC FOURIER DESCRIPTOR FOR CONTACT OR ANY CLOSED STRUCTURES ON THE CHIP
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Issue Dt:
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01/24/2012
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12575344
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10/07/2009
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Pub Dt:
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04/07/2011
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Title:
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METHODS FOR FORMING ISOLATED FIN STRUCTURES ON BULK SEMICONDUCTOR MATERIAL
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Patent #:
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Issue Dt:
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03/05/2013
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12575515
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10/08/2009
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Pub Dt:
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04/14/2011
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Title:
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PHOTO-PATTERNABLE DIELECTRIC MATERIALS CURABLE TO POROUS DIELECTRIC MATERIALS, FORMULATIONS, PRECURSORS AND METHODS OF USE THEREOF
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Issue Dt:
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03/20/2012
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12575962
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10/08/2009
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Publication #:
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Pub Dt:
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04/14/2011
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Title:
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SEMICONDUCTOR DEVICE HAVING SILICON ON STRESSED LINER (SOL)
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07/09/2013
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12575980
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10/08/2009
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Pub Dt:
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04/14/2011
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Title:
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PAD BONDING EMPLOYING A SELF-ALIGNED PLATED LINER FOR ADHESION ENHANCEMENT
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03/27/2012
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12575989
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10/08/2009
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Pub Dt:
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04/14/2011
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Title:
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EMBEDDED SERIES DEEP TRENCH CAPACITORS AND METHODS OF MANUFACTURE
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03/06/2012
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12576275
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10/09/2009
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Pub Dt:
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04/14/2011
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Title:
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METHOD AND APPARATUS FOR CONFIGURING A CONTENT-ADDRESSABLE MEMORY (CAM) DESIGN AS BINARY CAM OR TERNARY CAM
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09/17/2013
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12576597
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10/09/2009
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Pub Dt:
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04/14/2011
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Title:
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MASK PROGRAM DEFECT TEST
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10/04/2011
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12576987
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10/09/2009
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Pub Dt:
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04/14/2011
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Title:
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SEMICONDUCTOR DEVICE WITH STRESSED FIN SECTIONS, AND RELATED FABRICATION METHODS
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10/16/2012
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12577259
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10/12/2009
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Pub Dt:
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04/14/2011
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Title:
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NOISE COUPLING REDUCTION AND IMPEDANCE DISCONTINUITY CONTROL IN HIGH-SPEED CERAMIC MODULES
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12/20/2011
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12578372
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10/13/2009
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Pub Dt:
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04/14/2011
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Title:
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MANAGING AVAILABILITY OF A COMPONENT HAVING A CLOSED ADDRESS SPACE
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07/10/2012
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12579089
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10/14/2009
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Pub Dt:
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04/14/2011
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Title:
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WORD-LINE LEVEL SHIFT CIRCUIT
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Issue Dt:
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09/17/2013
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12579124
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10/14/2009
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Pub Dt:
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04/14/2011
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Title:
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REAL-TIME PERFORMANCE MODELING OF SOFTWARE SYSTEMS WITH MULTI-CLASS WORKLOAD
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08/14/2012
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12579216
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10/14/2009
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Pub Dt:
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04/14/2011
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Title:
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METHODS RELATING TO CAPACITIVE MONITORING OF LAYER CHARACTERISTICS DURING BACK END-OF-THE-LINE PROCESSING
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Issue Dt:
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10/23/2012
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12579442
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10/15/2009
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Pub Dt:
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04/21/2011
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Title:
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SAT-BASED SYNTHESIS OF A CLOCK GATING FUNCTION
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Issue Dt:
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09/18/2012
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12579654
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Filing Dt:
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10/15/2009
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Pub Dt:
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05/06/2010
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Title:
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SEMICONDUCTOR DEVICE COMPRISING EFUSES OF ENHANCED PROGRAMMING EFFICIENCY
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12/04/2012
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12580330
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10/16/2009
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Pub Dt:
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04/21/2011
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Title:
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TECHNIQUES FOR ANALYSIS OF LOGIC DESIGNS WITH TRANSIENT LOGIC
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Issue Dt:
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07/31/2012
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12581440
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10/19/2009
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Pub Dt:
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04/21/2011
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Title:
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SRAM DELAY CIRCUIT THAT TRACKS BITCELL CHARACTERISTICS
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Issue Dt:
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10/11/2011
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Application #:
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12581924
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Filing Dt:
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10/20/2009
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Pub Dt:
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04/21/2011
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Title:
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STRUCTURE AND METHOD FOR MANUFACTURING ASYMMETRIC DEVICES
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Issue Dt:
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10/16/2012
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12582139
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10/20/2009
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Pub Dt:
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04/21/2011
| | | | |
Title:
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APPLICATION OF CLUSTER BEAM IMPLANTATION FOR FABRICATING THRESHOLD VOLTAGE ADJUSTED FETS
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