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04/15/2003
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09504907
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02/16/2000
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Title:
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METHOD AND APPARATUS FOR EXERCISING EXTERNAL MEMORY WITH A MEMORY BUILT-IN TEST
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02/20/2007
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09505062
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02/16/2000
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METHOD AND APPARATUS FOR AUTOPOLLING PHYSICAL LAYER DEVICES IN A NETWORK
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03/19/2002
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09506037
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02/17/2000
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Title:
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Digital logic correction circuit for a pipeline analog to digital (A/D) converter
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09/25/2001
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09506208
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02/17/2000
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Title:
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Pipeline analog to digital (a/d) converter with relaxed accuracy requirement for sample and hold stage
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01/08/2002
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09506284
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02/17/2000
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Title:
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Pipeline analog to digital (A/D) converter with relaxed accuracy requirement for sample and hold stage
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11/27/2001
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09506316
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02/17/2000
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Title:
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Pipeline analog to digital (a/d) converter with lengthened hold operation of a first stage
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11/19/2002
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09507522
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02/18/2000
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Title:
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Hydroxycarborane photoresists and process for using same in bilayer thin film imaging lithography
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07/22/2003
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09510813
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02/23/2000
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T-SHAPED GATE DEVICE AND METHOD FOR MAKING
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12/04/2001
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09511165
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02/24/2000
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Simultaneous multiple silicon on insulator (SOI) wafer production
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01/15/2002
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09511418
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02/22/2000
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Fully depleted silicon on insulator semiconductor device and manufacturing method therefor
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12/04/2001
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09511465
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02/23/2000
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Title:
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Insulating and capping structure with preservation of the low dielectric constant of the insulating layer
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10/02/2001
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09511796
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02/23/2000
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Temperature ramp for vertical diffusion furnace
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09/11/2001
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09512202
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02/24/2000
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Title:
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Formation of highly conductive junction by rapid thermal anneal and laser thermal process
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12/23/2008
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09512400
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02/24/2000
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ELECTRICALLY CONDUCTING ADHESIVES FOR VIA FILL APPLICATIONS
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12/04/2001
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09513293
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02/25/2000
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Substantially planar semiconductor topography using dielectrics and chemical mechanical polish
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09/11/2001
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09514106
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02/28/2000
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Thermal conductivity enhanced semiconductor structures and fabrication processes
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09/03/2002
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09514212
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02/28/2000
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HIGH SILICON CONTENT MONOMERS AND POLYMERS SUITABLE FOR 193 NM BILAYER RESISTS
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03/04/2003
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09514368
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02/28/2000
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METHOD AND APPARATUS FOR LOOPING BACK A CURRENT STATE TO RESUME A MEMORY BUILT-IN SELF-TEST
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11/27/2001
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09515033
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03/06/2000
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Method for self-aligned formation of silicide contacts using metal silicon alloys for limited silicon consumption and for reduction of bridging
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03/19/2002
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09515321
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02/29/2000
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Methods and arrangements for determining an endpoint for an in-situ local interconnect etching process
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10/10/2006
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09515348
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02/29/2000
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METHOD FOR EVALUATION OF RETICLE IMAGE USING AERIAL IMAGE SIMULATOR
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07/09/2002
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09516343
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03/01/2000
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A SINGLE GRAIN COPPER INTERCONNECT HAVING BAMBOO STRUCTURE IN A TRENCH
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10/05/2004
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09516615
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03/01/2000
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METHOD OF FABRICATING A POLYSILICON CAPACITOR UTILIZING FET AND BIPOLAR BASE POLYSILICON LAYERS
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10/16/2001
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09516904
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03/01/2000
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Connecting devices and method for interconnceting circuit components
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09/16/2003
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09521046
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03/08/2000
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WAFER ROTATION IN SEMICONDUCTOR PROCESSING
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11/18/2003
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09521248
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03/08/2000
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EXCEPTION HANDLING WITH REDUCED OVERHEAD IN A MULTITHREADED MULTIPROCESSING SYSTEM
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02/25/2003
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09521351
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03/09/2000
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POLYCYCLIC POLYMERS CONTAINING PENDANT CYCLIC ANTHYDRIDE GROUPS
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10/31/2000
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09521481
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03/09/2000
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Vibrational methods of deaggregation of electrically conductive polymers and precursors thereof
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06/25/2002
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09521591
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03/09/2000
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METHOD AND APPARATUS FOR FORMATION OF IN-SITU DOPED AMORPHOUS SEMICONDUCTOR FILM
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08/28/2001
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09522148
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03/09/2000
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Multilayered coaxial interconnect structure
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09/28/2004
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09522226
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03/09/2000
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APPARATUS FOR THE APPLICATION OF DEVELOPING SOLUTION TO A SEMICONDUCTOR WAFER
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08/28/2001
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09523107
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03/14/2000
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Efficiency of a multiphase switching power supply during low power mode
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06/18/2002
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09523439
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03/10/2000
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METHOD OF DEFINING SMALL OPENINGS IN DIELECTRIC LAYERS
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08/28/2001
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09524661
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03/13/2000
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Multi-ported memory with asynchronous and synchronous protocol
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01/20/2004
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09525088
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03/14/2000
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Pub Dt:
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08/22/2002
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METHOD AND STRUCTURE OF A PRECISION MIM FUSIBLE CIRCUIT ELEMENTS USING FUSES AND ANTIFUSES
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11/05/2002
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09525103
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03/14/2000
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METHODS FOR FORMING DECOUPLING CAPACITORS
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04/01/2003
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09526198
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03/15/2000
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MACRO DESIGN TECHNIQUES TO ACCOMMODATE CHIP LEVEL WIRING AND CIRCUIT PLACEMENT ACROSS THE MACRO
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07/30/2002
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09526354
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03/16/2000
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BURIED METAL DUAL DAMASCENE PLATE CAPACITOR
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02/24/2004
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09527227
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03/16/2000
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DUAL-GATE MOSFET WITH CHANNEL POTENTIAL ENGINEERING
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12/19/2000
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09527622
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03/17/2000
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Clocking to support interface of memory controller to external sram
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07/22/2003
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09527871
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03/17/2000
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USE OF ORGANIC SPIN ON MATERIALS AS A STOP-LAYER FOR LOCAL INTERCONNECT, CONTACT AND VIA LAYERS
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12/04/2001
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09528326
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03/20/2000
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DEVICE FOR PATTERNING A SUBSTRATE WITH PATTERNING CAVITIES
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04/23/2002
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09531426
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03/20/2000
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ACOUSTIC MICROSCOPY DIE CRACK INSPECTION FOR PLASTIC ENCAPSULATED INTEGRATED CIRCUITS
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09/30/2003
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09531519
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03/21/2000
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METHOD AND APPARATUS FOR AUTOMATIC TRANSMIT VERIFICATION
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04/09/2002
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09531715
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03/21/2000
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Intentional asymmetry imposed during fabrication and/or accessof magnetic tunnel junction devices
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06/17/2003
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09531895
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03/21/2000
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METHOD AND APPARATUS FOR AUTOMATIC RECEIVE VERIFICATION
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06/18/2002
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09533375
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03/22/2000
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METHOD FOR FASTER VERIFICATION OF A DESIGN FOR AN INTEGRATED CIRCUIT
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07/30/2002
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09533402
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03/22/2000
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ELECTRONIC PACKAGE AND METHOD OF MAKING SAME
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01/23/2001
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09534423
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03/23/2000
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Memory and system configuration for programming a redundancy address in an electric system
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09/23/2003
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09537206
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03/29/2000
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WAFER EDGE CLEANING UTILIZING POLISH PAD MATERIAL
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11/11/2003
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09537498
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03/29/2000
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WORD LINE DRIVER FOR DYNAMIC RANDOM ACCESS MEMORIES
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05/07/2002
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09539099
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03/30/2000
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METHODOLOGY FOR TESTING AND QUALIFYING AN INTEGRATED CIRCUIT BY MEASURING AN OPERATING FREQUENCY AS A FUNCTION OF ADJUSTED TIMING EDGES
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01/15/2002
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09539897
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03/31/2000
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System and method for the distribution of automotive services
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07/30/2002
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09540412
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03/31/2000
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METHOD OF MAKING A PRINTED CIRCUIT BOARD
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04/16/2002
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09541124
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03/31/2000
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Semiconductor-on-insulator body-source contact using additional drain-side spacer,and method
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08/27/2002
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09541126
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03/31/2000
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Title:
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SEMICONDUCTOR-ON-INSULATOR BODY-SOURCE CONTACT AND METHOD
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02/25/2003
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09541127
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03/31/2000
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SEMICONDUCTOR-ON-INSULATOR BODY-SOURCE CONTACT USING SHALLOW-DOPED SOURCE, AND METHOD
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11/05/2002
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09542025
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04/03/2000
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METHODS AND ARRANGEMENTS FOR AUTOMATIC SYNTHESIS OF SYSTEMS-ON-CHIP
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04/23/2002
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09543347
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04/05/2000
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Non-contact automatic height sensing using air pressure for die bonding
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01/07/2003
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09544749
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04/07/2000
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REMOVABLE HEAT TRANSFER APPARATUS FOR A PIN GRID ARRAY (PGA) DEVICE, AND ASSOCIATED INSTALLATION AND REMOVAL METHODS
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05/27/2003
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09546979
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04/11/2000
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METHOD AND APPARATUS FOR COMBINED TRANSACTION REORDERING AND BUFFER MANAGEMENT
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09/23/2003
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09547893
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04/12/2000
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SILICON ON INSULATOR FIELD EFFECT TRANSISTOR HAVING SHARED BODY CONTACT
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04/09/2002
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09548142
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04/13/2000
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Die-Based In-Fab process monitoring and analysis system for semiconductor processing
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09/16/2003
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09548779
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04/13/2000
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AUTOMATED PROCESS MONITORING AND ANALYSIS SYSTEM FOR SEMICONDUCTOR PROCESSING
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01/14/2003
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09551168
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04/17/2000
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07/11/2002
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A POLY-POLY/MOS CAPACITOR HAVING A GATE ENCAPSULATING FIRST ELECTRODE LAYER
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05/07/2002
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09551625
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04/17/2000
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USING REMOVABLE SPACERS TO ENSURE ADEQUATE BONDLINE THICKNESS
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04/16/2002
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09552050
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04/19/2000
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METHOD OF FORMING ULTRA-SHALLOW SOURCE/DRAIN EXTENSION BY IMPURITY DIFFUSION FROM DOPED DIELECTRIC SPACER
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06/11/2002
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09552164
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04/18/2000
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METHOD FOR CONTROLLING OPTICAL PROPERTIES OF ANTIREFLECTIVE COATINGS
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11/04/2003
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09552410
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04/19/2000
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STABILITY TEST FOR SILICON ON INSULATOR SRAM MEMORY CELLS UTILIZING BITLINE PRECHARGE STRESS OPERATIONS TO STRESS MEMORY CELLS UNDER TEST
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05/25/2004
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09553715
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04/20/2000
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PRINTED CIRCUIT BOARD WITH EMBEDDED DECOUPLING CAPACITANCE AND METHOD FOR PRODUCING SAME
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01/10/2006
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09553997
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04/20/2000
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PRECURSOR SOURCE MIXTURES
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Patent #:
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Issue Dt:
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04/30/2002
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Application #:
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09556211
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Filing Dt:
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04/21/2000
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Title:
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GATE OVERVOLTAGE CONTROL NETWORKS
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Patent #:
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Issue Dt:
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11/20/2001
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Application #:
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09556304
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Filing Dt:
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04/24/2000
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Title:
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Single-layer autorouter
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Patent #:
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Issue Dt:
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09/18/2001
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Application #:
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09557679
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Filing Dt:
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04/25/2000
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Title:
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RESONANT TUNNELING DIODE LATCH
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Patent #:
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Issue Dt:
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11/12/2002
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Application #:
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09557720
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Filing Dt:
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04/25/2000
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Title:
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ELECTROSTATIC CHARGE REDUCTION OF PHOTORESIST PATTERN ON DEVELOPMENT TRACK
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Patent #:
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Issue Dt:
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06/18/2002
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Application #:
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09557802
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Filing Dt:
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04/25/2000
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Title:
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CONDUCTIVE SUBSTRUCTURES OF A MULTILAYERED LAMINATE
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Patent #:
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Issue Dt:
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09/24/2002
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Application #:
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09558198
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Filing Dt:
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04/26/2000
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Title:
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CARBON NANOTUBE PROBES IN ATOMIC FORCE MICROSCOPE TO DETECT PARTIALLY OPEN/CLOSED CONTACTS
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Patent #:
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Issue Dt:
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04/29/2003
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Application #:
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09558831
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Filing Dt:
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04/26/2000
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Title:
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CU/SN/PD ACTIVATION OF A BARRIER LAYER FOR ELECTROLESS CU DEPOSITION
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Patent #:
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Issue Dt:
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10/23/2001
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Application #:
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09558963
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Filing Dt:
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04/25/2000
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Title:
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Method of making semiconductor device having metal silicide regions of differing thicknesses above the gate electrode and the source/drain regions
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Patent #:
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Issue Dt:
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12/04/2001
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Application #:
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09559363
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Filing Dt:
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04/24/2000
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Title:
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Dram cell with vertical cmos transistor
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Patent #:
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Issue Dt:
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04/16/2002
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Application #:
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09560253
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Filing Dt:
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04/26/2000
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Title:
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METHOD FOR REDUCING IC PACKAGE DELAMINATION BY USE OF INTERNAL BAFFLES
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Patent #:
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Issue Dt:
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06/01/2004
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Application #:
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09561227
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Filing Dt:
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04/28/2000
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Title:
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INTERNET BASED METHOD FOR FACILITATING NETWORKING AMONG PERSONS WITH SIMILAR INTERESTS AND FOR FACILITATING COLLABORATIVE SEARCHING FOR INFORMATION
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Patent #:
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Issue Dt:
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07/23/2002
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Application #:
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09562109
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Filing Dt:
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05/01/2000
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Title:
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PRINTED WIRING BOARD WITH IMPROVED PLATED THROUGH HOLE FATIGUE LIFE
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Patent #:
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Issue Dt:
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03/11/2003
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Application #:
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09563497
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Filing Dt:
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05/03/2000
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Title:
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CHIP SCALE ELECTRICAL TEST FIXTURE WITH ISOLATION PLATE HAVING A RECESS
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Patent #:
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Issue Dt:
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10/16/2001
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Application #:
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09564211
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Filing Dt:
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05/04/2000
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Title:
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Method and system of managing wafers in a semiconductor device production facility
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Patent #:
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Issue Dt:
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01/01/2002
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Application #:
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09564408
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Filing Dt:
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05/01/2000
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Title:
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Use of RTA furnace for photoresist baking
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Patent #:
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Issue Dt:
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04/09/2002
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Application #:
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09564610
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Filing Dt:
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05/04/2000
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Title:
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Method to control mechanical stress of copper interconnect line using post-plating copper anneal
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Patent #:
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Issue Dt:
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03/26/2002
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Application #:
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09564626
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Filing Dt:
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05/04/2000
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Title:
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Recessed bond pad
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Patent #:
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Issue Dt:
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02/12/2002
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Application #:
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09565858
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Filing Dt:
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05/05/2000
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Title:
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Method for forming a semiconductor device with a tailored well profile
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Patent #:
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Issue Dt:
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06/04/2002
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Application #:
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09566205
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Filing Dt:
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05/05/2000
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Title:
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FLEXIBLE ARCHITECTURE FOR AN EMBEDDED INTERRUPT CONTROLLER
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Patent #:
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Issue Dt:
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06/26/2001
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Application #:
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09566395
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Filing Dt:
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05/05/2000
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Title:
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Photoresist compositions with cyclic olefin polymers having lactone moiety
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Patent #:
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Issue Dt:
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10/19/2004
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Application #:
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09566732
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Filing Dt:
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05/09/2000
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Title:
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ARRANGEMENT FOR READING A PRESCRIBED LOCATION OF A FIFO BUFFER IN A NETWORK SWITCH PORT
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Patent #:
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Issue Dt:
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09/14/2004
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Application #:
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09567445
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Filing Dt:
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05/08/2000
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Title:
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SYSTEMS AND METHODS FOR AUTHORING AND EXECUTING OPERATIONAL POLICIES THAT USE EVENT RATES
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Patent #:
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Issue Dt:
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04/23/2002
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Application #:
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09568181
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Filing Dt:
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05/09/2000
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Title:
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APPARATUS AND METHOD OF IMPLEMENTING A UNIVERSAL HOME NETWORK ON A CUSTOMER PREMISES UPN TELEPHONE LINES
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Patent #:
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Issue Dt:
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05/21/2002
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Application #:
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09568182
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Filing Dt:
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05/09/2000
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Title:
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APPARATUS AND METHOD OF COUPLING HOME NETWORK SIGNALS BETWEEN AN ANALOG PHONE LINE AND A DIGITAL UPN LINE
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Patent #:
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Issue Dt:
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07/30/2002
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Application #:
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09569753
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Filing Dt:
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05/12/2000
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Title:
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UNIVERSAL MULTI-TOOL ADAPTER FOR RECONFIGURING A WAFER PROCESSING LINE
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Patent #:
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Issue Dt:
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12/07/2004
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Application #:
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09574186
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Filing Dt:
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05/18/2000
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Title:
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METHOD AND APPARATUS FOR PRESERVING THE CONTENTS OF SYNCHRONOUS DRAM THROUGH SYSTEM RESET
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Patent #:
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Issue Dt:
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07/22/2003
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Application #:
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09574810
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Filing Dt:
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05/19/2000
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Title:
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METHOD OF CONTACTING A SILICIDE-BASED SCHOTTKY DIODE AND DIODE SO FORMED
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Patent #:
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Issue Dt:
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03/12/2002
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Application #:
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09575463
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Filing Dt:
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05/22/2000
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Title:
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Semiconductor device and method of manufacturing without damaging HSQ layer and metal pattern
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Patent #:
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Issue Dt:
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04/19/2005
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Application #:
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09575740
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Filing Dt:
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05/22/2000
|
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Title:
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COINCIDENCE-FREE MEDIA KEY BLOCK FOR CONTENT PROTECTION FOR RECORDABLE MEDIA
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