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11/28/2017
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05/29/2012
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12/05/2013
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05/06/2014
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05/29/2012
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12/05/2013
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05/05/2015
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13483200
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05/30/2012
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12/05/2013
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12/29/2015
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05/30/2012
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12/06/2012
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03/18/2014
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05/30/2012
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12/06/2012
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TRANSISTORS WITH EMBEDDED STRAIN-INDUCING MATERIAL FORMED IN CAVITIES PROVIDED BY AN OXIDIZING ETCH PROCESS
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03/04/2014
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05/30/2012
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12/05/2013
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06/16/2015
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05/30/2012
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12/05/2013
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07/05/2016
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05/31/2012
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12/05/2013
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WRAP-AROUND FIN FOR CONTACTING A CAPACITOR STRAP OF A DRAM
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08/19/2014
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13485748
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05/31/2012
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12/05/2013
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NON-VOLATILE MEMORY CROSSPOINT REPAIR
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12/20/2016
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05/31/2012
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12/05/2013
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09/30/2014
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05/31/2012
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12/05/2013
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06/17/2014
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06/01/2012
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10/31/2013
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Assembly of Electronic and Optical Devices
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12/23/2014
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13486644
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06/01/2012
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12/05/2013
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RECEIVER WITH FOUR-SLICE DECISION FEEDBACK EQUALIZER
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12/03/2013
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13487351
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06/04/2012
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12/05/2013
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METHODS OF PERFORMING HIGHLY TILTED HALO IMPLANTATION PROCESSES ON SEMICONDUCTOR DEVICES
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08/26/2014
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06/04/2012
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09/27/2012
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CROSSPOINT ARRAY AND METHOD OF USE WITH A CROSSPOINT ARRAY HAVING CROSSBAR ELEMENTS HAVING A SOLID ELECTROLYTE MATERIAL USED AS A RECTIFIER WITH A SYMMETRIC OR SUBSTANTIALLY SYMMETRIC RESISTIVE MEMORY
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12/10/2013
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06/04/2012
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10/04/2012
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SELF-ALIGNED III-V FIELD EFFECT TRANSISTOR (FET) AND INTEGRATED CIRCUIT (IC) CHIP
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02/26/2013
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06/04/2012
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09/27/2012
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Increasing reliability of copper-based metallization structures in a microstructure device by using aluminum nitride
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02/24/2015
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06/04/2012
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09/20/2012
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03/03/2015
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13488532
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06/05/2012
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12/05/2013
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CIRCUIT TECHNIQUE TO ELECTRICALLY CHARACTERIZE BLOCK MASK SHIFTS
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06/16/2015
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13488693
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06/05/2012
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12/05/2013
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FIXTURE FOR SHAPING A LAMINATE SUBSTRATE
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12/30/2014
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13488870
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06/05/2012
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12/05/2013
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SYSTEM AND METHOD FOR FORMING ALUMINUM FUSE FOR COMPATIBILITY WITH COPPER BEOL INTERCONNECT SCHEME
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02/04/2014
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13488940
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06/05/2012
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09/27/2012
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SURFACE MODIFIED NANOPARTICLES, METHODS OF THEIR PREPARATION, AND USES THEREOF FOR GENE AND DRUG DELIVERY
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08/27/2013
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13489244
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06/05/2012
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AQUA REGIA AND HYDROGEN PEROXIDE HCL COMBINATION TO REMOVE NI AND NIPT RESIDUES
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05/06/2014
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13489539
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06/06/2012
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12/20/2012
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HIGH-K METAL GATE ELECTRODE STRUCTURES FORMED BY REDUCING A GATE FILL ASPECT RATIO IN REPLACEMENT GATE TECHNOLOGY
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01/28/2014
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06/06/2012
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12/12/2013
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SPACER ISOLATION IN DEEP TRENCH
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07/01/2014
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13489861
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06/06/2012
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12/12/2013
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EDGE PROTECTION OF BONDED WAFERS DURING WAFER THINNING
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06/30/2015
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13490096
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06/06/2012
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12/12/2013
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MODELING MEMORY CELL SKEW SENSITIVITY
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02/03/2015
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13490239
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06/06/2012
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09/27/2012
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MICROELECTRONIC SUBSTRATE HAVING REMOVABLE EDGE EXTENSION ELEMENT
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02/18/2014
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13490618
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06/07/2012
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11/14/2013
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FABRICATE SELF-FORMED NANOMETER PORE ARRAY AT WAFER SCALE FOR DNA SEQUENCING
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05/27/2014
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13490840
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06/07/2012
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12/12/2013
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INTEGRATED CIRCUITS HAVING A CONTINUOUS ACTIVE AREA AND METHODS FOR FABRICATING SAME
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12/23/2014
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13491036
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06/07/2012
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09/27/2012
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SEMICONDUCTOR DEVICES HAVING TENSILE AND/OR COMPRESSIVE STRAIN AND METHODS OF MANUFACTURING AND DESIGN STRUCTURE
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02/09/2016
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13491093
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06/07/2012
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09/27/2012
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REMOVING MATERIAL FROM DEFECTIVE OPENING IN GLASS MOLD
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05/31/2016
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13491210
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06/07/2012
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12/12/2013
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UNIVERSAL JITTER METER AND PHASE NOISE MEASUREMENT
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03/25/2014
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06/08/2012
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12/12/2013
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RECESSING AND CAPPING OF GATE STRUCTURES WITH VARYING METAL COMPOSITIONS
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09/19/2017
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06/08/2012
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09/27/2012
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METHOD OF FABRICATING A FINFET HAVING A GATE STRUCTURE DISPOSED AT LEAST PARTIALLY AT A BEND REGION OF THE SEMICONDUCTOR FIN.
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09/24/2013
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06/11/2012
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09/27/2012
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COMPUTER IMPLEMENTED DESIGN OF DEVICE FOR ELECTRO-OPTICAL
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04/01/2014
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06/11/2012
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12/12/2013
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METHODS OF FORMING SEMICONDUCTOR DEVICES BY FORMING SEMICONDUCTOR CHANNEL REGION MATERIALS PRIOR TO FORMING ISOLATION STRUCTURES
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03/11/2014
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06/11/2012
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12/12/2013
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METHODS OF FORMING HIGH MOBILITY FIN CHANNELS ON THREE DIMENSIONAL SEMICONDUCTOR DEVICES
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01/20/2015
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06/11/2012
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12/12/2013
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SEMICONDUCTOR DEVICES HAVING IMPROVED GATE HEIGHT UNIFORMITY AND METHODS FOR FABRICATING SAME
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11/17/2015
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06/12/2012
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12/12/2013
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Optimizing Heat Transfer in 3-D Chip-Stacks
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12/17/2013
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06/12/2012
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10/04/2012
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LAYERED STRUCTURE WITH FUSE
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01/07/2014
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06/12/2012
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12/12/2013
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SIDE-GATE DEFINED TUNABLE NANOCONSTRICTION IN DOUBLE-GATED GRAPHENE MULTILAYERS
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12/16/2014
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06/12/2012
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12/12/2013
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THREE DIMENSIONAL FLIP CHIP SYSTEM AND METHOD
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09/09/2014
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06/12/2012
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12/12/2013
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04/22/2014
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06/13/2012
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12/19/2013
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METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR (MOSFET) GATE TERMINATION
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03/26/2013
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06/13/2012
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10/04/2012
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SEMICONDUCTOR DEVICE AND METHOD OF MAKING SEMICONDUCTOR DEVICE
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13511535
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06/04/2012
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11/22/2012
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NETWORK-WIDE STORING AND SCHEDULING METHOD AND SYSTEM FOR INTERNET PROTOCOL TELEVISION
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01/06/2015
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06/14/2012
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12/19/2013
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CONTINUOUSLY SCALABLE WIDTH AND HEIGHT SEMICONDUCTOR FINS
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08/09/2016
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13523182
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06/14/2012
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12/19/2013
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GRAPHENE BASED STRUCTURES AND METHODS FOR BROADBAND ELECTROMAGNETIC RADIATION ABSORPTION AT THE MICROWAVE AND TERAHERTZ FREQUENCIES
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01/21/2014
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13523331
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06/14/2012
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01/03/2013
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ANALOG-DIGITAL CONVERTER
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11/26/2013
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13523624
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06/14/2012
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12/19/2013
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BITLINE DELETION
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12/16/2014
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13523971
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06/15/2012
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12/19/2013
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BAD WORDLINE/ARRAY DETECTION IN MEMORY
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12/31/2013
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13525479
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06/18/2012
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12/19/2013
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STRAINED SILICON AND STRAINED SILICON GERMANIUM ON INSULATOR METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTORS (MOSFETS)
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12/17/2013
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06/18/2012
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11/21/2013
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SEMICONDUCTOR ACTIVE MATRIX ON BURIED INSULATOR
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05/20/2014
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13526152
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06/18/2012
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12/19/2013
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METHOD AND APPARATUS FOR HIERARCHICAL WAFER QUALITY PREDICTIVE MODELING
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09/02/2014
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13526153
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06/18/2012
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03/20/2014
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Token-Based Current Control to Mitigate Current Delivery Limitations in Integrated Circuits
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12/16/2014
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Application #:
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13526252
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Filing Dt:
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06/18/2012
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Publication #:
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Pub Dt:
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07/10/2014
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Title:
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ADAPTIVE WORKLOAD BASED OPTIMIZATIONS COUPLED WITH A HETEROGENEOUS CURRENT-AWARE BASELINE DESIGN TO MITIGATE CURRENT DELIVERY LIMITATIONS IN INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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07/01/2014
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13526585
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Filing Dt:
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06/19/2012
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Publication #:
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Pub Dt:
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11/28/2013
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Title:
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DRIFT-INSENSITIVE OR INVARIANT MATERIAL FOR PHASE CHANGE MEMORY
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Patent #:
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Issue Dt:
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05/26/2015
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Application #:
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13527131
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Filing Dt:
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06/19/2012
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Publication #:
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Pub Dt:
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12/19/2013
| | | | |
Title:
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THROUGH SILICON VIA WAFER AND METHODS OF MANUFACTURING
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Patent #:
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Issue Dt:
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08/11/2015
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Application #:
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13527280
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Filing Dt:
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06/19/2012
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Publication #:
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Pub Dt:
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12/19/2013
| | | | |
Title:
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COPPER FEATURE DESIGN FOR WARPAGE CONTROL OF SUBSTRATES
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Patent #:
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Issue Dt:
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01/13/2015
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Application #:
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13528947
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Filing Dt:
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06/21/2012
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Publication #:
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Pub Dt:
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12/26/2013
| | | | |
Title:
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PROBE-ON-SUBSTRATE
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Patent #:
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Issue Dt:
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07/05/2016
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Application #:
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13529264
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Filing Dt:
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06/21/2012
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Publication #:
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Pub Dt:
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12/26/2013
| | | | |
Title:
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OVERHEAD SUBSTRATE HANDLING AND STORAGE SYSTEM
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Patent #:
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Issue Dt:
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07/29/2014
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Application #:
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13529327
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Filing Dt:
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06/21/2012
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Publication #:
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Pub Dt:
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12/26/2013
| | | | |
Title:
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METHODS FOR FABRICATING INTEGRATED CIRCUITS WITH FLUORINE PASSIVATION
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Patent #:
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Issue Dt:
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09/17/2013
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Application #:
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13529334
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Filing Dt:
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06/21/2012
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Title:
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NANOWIRE FET AND FINFET
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Patent #:
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Issue Dt:
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11/18/2014
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Application #:
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13529360
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Filing Dt:
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06/21/2012
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Publication #:
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Pub Dt:
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12/26/2013
| | | | |
Title:
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DOUBLE LAYER INTERLEAVED P-N DIODE MODULATOR
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Patent #:
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Issue Dt:
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01/15/2013
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Application #:
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13529558
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Filing Dt:
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06/21/2012
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Publication #:
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Pub Dt:
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10/18/2012
| | | | |
Title:
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EMBEDDED STRESSOR FOR SEMICONDUCTOR STRUCTURES
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Patent #:
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Issue Dt:
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04/08/2014
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Application #:
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13529625
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Filing Dt:
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06/21/2012
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Publication #:
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Pub Dt:
|
10/18/2012
| | | | |
Title:
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HETEROJUNCTION BIPOLAR TRANSISTORS AND METHODS OF MANUFACTURE
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Patent #:
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Issue Dt:
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01/27/2015
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Application #:
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13529898
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Filing Dt:
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06/21/2012
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Publication #:
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Pub Dt:
|
12/26/2013
| | | | |
Title:
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METHODS FOR FABRICATING INTEGRATED CIRCUITS WITH DRIFT REGIONS AND REPLACEMENT GATES
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Patent #:
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Issue Dt:
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05/05/2015
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Application #:
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13530449
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Filing Dt:
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06/22/2012
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Publication #:
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Pub Dt:
|
12/26/2013
| | | | |
Title:
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ULTRATHIN BODY FULLY DEPLETED SILICON-ON-INSULATOR INTEGRATED CIRCUITS AND METHODS FOR FABRICATING SAME
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Patent #:
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Issue Dt:
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04/08/2014
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Application #:
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13530519
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Filing Dt:
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06/22/2012
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Publication #:
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Pub Dt:
|
10/18/2012
| | | | |
Title:
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LATERAL EPITAXIAL GROWN SOI IN DEEP TRENCH STRUCTURES AND METHODS OF MANUFACTURE
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Patent #:
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Issue Dt:
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09/10/2013
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Application #:
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13530605
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Filing Dt:
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06/22/2012
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Title:
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METHOD OF LARGE-AREA CIRCUIT LAYOUT RECOGNITION
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Patent #:
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Issue Dt:
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12/17/2013
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Application #:
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13530725
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Filing Dt:
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06/22/2012
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Publication #:
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Pub Dt:
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12/19/2013
| | | | |
Title:
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GRAPHENE BASED STRUCTURES AND METHODS FOR BROADBAND ELECTROMAGNETIC RADIATION ABSORPTION AT THE MICROWAVE AND TERAHERTZ FREQUENCIES
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Patent #:
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Issue Dt:
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08/27/2013
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Application #:
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13530889
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Filing Dt:
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06/22/2012
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Publication #:
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Pub Dt:
|
10/18/2012
| | | | |
Title:
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PHASE CHANGE MEMORY CYCLE TIMER AND METHOD
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Patent #:
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Issue Dt:
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10/14/2014
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Application #:
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13531053
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Filing Dt:
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06/22/2012
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Publication #:
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Pub Dt:
|
10/18/2012
| | | | |
Title:
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STRAINED THIN BODY CMOS DEVICE HAVING VERTICALLY RAISED SOURCE/DRAIN STRESSORS WITH SINGLE SPACER
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Patent #:
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Issue Dt:
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01/13/2015
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Application #:
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13531175
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Filing Dt:
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06/22/2012
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Publication #:
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Pub Dt:
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10/18/2012
| | | | |
Title:
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DEVICE STRUCTURE, LAYOUT AND FABRICATION METHOD FOR UNIAXIALLY STRAINED TRANSISTORS
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Patent #:
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Issue Dt:
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12/02/2014
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Application #:
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13531518
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Filing Dt:
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06/23/2012
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Publication #:
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Pub Dt:
|
10/18/2012
| | | | |
Title:
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INTERCONNECT STRUCTURES WITH ENGINEERED DIELECTRICS WITH NANOCOLUMNAR POROSITY
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Patent #:
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Issue Dt:
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06/16/2015
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Application #:
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13531654
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Filing Dt:
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06/25/2012
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Publication #:
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Pub Dt:
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12/26/2013
| | | | |
Title:
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SHALLOW TRENCH ISOLATION STRUCTURES
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Patent #:
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Issue Dt:
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03/18/2014
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Application #:
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13531780
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Filing Dt:
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06/25/2012
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Publication #:
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Pub Dt:
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12/26/2013
| | | | |
Title:
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SHALLOW TRENCH ISOLATION STRUCTURES
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Patent #:
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Issue Dt:
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03/24/2015
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Application #:
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13532157
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Filing Dt:
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06/25/2012
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Publication #:
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Pub Dt:
|
10/18/2012
| | | | |
Title:
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SYSTEMS AND METHODS FOR MANAGING COMPUTING SYSTEMS UTILIZING AUGMENTED REALITY
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Patent #:
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Issue Dt:
|
08/06/2013
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Application #:
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13532323
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Filing Dt:
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06/25/2012
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Title:
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BIPOLAR JUNCTION TRANSISTOR WITH EPITAXIAL CONTACTS
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Patent #:
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Issue Dt:
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01/05/2016
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Application #:
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13532716
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Filing Dt:
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06/25/2012
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Publication #:
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Pub Dt:
|
10/18/2012
| | | | |
Title:
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METHODS FOR FABRICATING MAGNETIC TRANSDUCERS USING POST-DEPOSITION TILTING
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Patent #:
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Issue Dt:
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03/26/2013
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Application #:
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13532991
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Filing Dt:
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06/26/2012
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Publication #:
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Pub Dt:
|
10/25/2012
| | | | |
Title:
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COUPLING PIEZOELECTRIC MATERIAL GENERATED STRESSES TO DEVICES FORMED IN INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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05/06/2014
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Application #:
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13533099
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Filing Dt:
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06/26/2012
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Publication #:
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Pub Dt:
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10/25/2012
| | | | |
Title:
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METHOD OF FABRICATING ISOLATED CAPACITORS AND STRUCTURE THEREOF
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Patent #:
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Issue Dt:
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01/06/2015
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Application #:
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13533182
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Filing Dt:
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06/26/2012
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Publication #:
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Pub Dt:
|
10/25/2012
| | | | |
Title:
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FORMATION OF ALPHA PARTICLE SHIELDS IN CHIP PACKAGING
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Patent #:
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Issue Dt:
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07/28/2015
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Application #:
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13533484
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Filing Dt:
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06/26/2012
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Publication #:
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Pub Dt:
|
12/26/2013
| | | | |
Title:
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IMPLEMENTING GATE WITHIN A GATE UTILIZING REPLACEMENT METAL GATE PROCESS
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Patent #:
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Issue Dt:
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04/16/2013
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Application #:
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13533499
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Filing Dt:
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06/26/2012
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Publication #:
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Pub Dt:
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10/18/2012
| | | | |
Title:
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MONOLAYER DOPANT EMBEDDED STRESSOR FOR ADVANCED CMOS
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Patent #:
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Issue Dt:
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02/18/2014
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Application #:
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13533807
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Filing Dt:
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06/26/2012
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Publication #:
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Pub Dt:
|
10/18/2012
| | | | |
Title:
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HIGH-K METAL GATE ELECTRODE STRUCTURES FORMED BY SEPARATE REMOVAL OF PLACEHOLDER MATERIALS USING A MASKING REGIME PRIOR TO GATE PATTERNING
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Patent #:
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Issue Dt:
|
11/19/2013
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Application #:
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13533816
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Filing Dt:
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06/26/2012
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Title:
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METHODS FOR FABRICATING INTEGRATED CIRCUITS WITH RUTHENIUM-LINED COPPER
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Patent #:
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Issue Dt:
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01/27/2015
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Application #:
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13534012
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Filing Dt:
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06/27/2012
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Publication #:
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Pub Dt:
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01/02/2014
| | | | |
Title:
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SEMICONDUCTOR DEVICES HAVING DIFFERENT GATE OXIDE THICKNESSES
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Patent #:
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Issue Dt:
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02/24/2015
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Application #:
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13534037
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Filing Dt:
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06/27/2012
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Publication #:
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Pub Dt:
|
01/02/2014
| | | | |
Title:
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INTEGRATION OF A TITANIA LAYER IN AN ANTI-REFLECTIVE COATING
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Patent #:
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Issue Dt:
|
10/22/2013
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Application #:
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13534067
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Filing Dt:
|
06/27/2012
|
Title:
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THREE DIMENSIONAL INTEGRATED CIRCUIT INTEGRATION USING ALIGNMENT VIA/DIELECTRIC BONDING FIRST AND THROUGH VIA FORMATION LAST
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Patent #:
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Issue Dt:
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11/18/2014
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Application #:
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13534082
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Filing Dt:
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06/27/2012
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Publication #:
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Pub Dt:
|
11/01/2012
| | | | |
Title:
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DAMASCENE METHOD OF FORMING A SEMICONDUCTOR STRUCTURE AND A SEMICONDUCTOR STRUCTURE WITH MULTIPLE FIN-SHAPED CHANNEL REGIONS HAVING DIFFERENT WIDTHS
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Patent #:
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Issue Dt:
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08/27/2013
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Application #:
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13534350
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Filing Dt:
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06/27/2012
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Publication #:
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Pub Dt:
|
10/18/2012
| | | | |
Title:
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INTEGRATED MILLIMETER WAVE ANTENNA AND TRANSCEIVER ON A SUBSTRATE
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Patent #:
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Issue Dt:
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05/21/2013
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Application #:
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13534462
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Filing Dt:
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06/27/2012
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Publication #:
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Pub Dt:
|
10/18/2012
| | | | |
Title:
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SEMICONDUCTOR SWITCHING DEVICE EMPLOYING A QUANTUM DOT STRUCTURE
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Patent #:
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Issue Dt:
|
05/28/2013
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Application #:
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13534855
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Filing Dt:
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06/27/2012
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Publication #:
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Pub Dt:
|
11/01/2012
| | | | |
Title:
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SURFACE CHARGE ENABLED NANOPOROUS SEMI-PERMEABLE MEMBRANE FOR DESALINATION
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Patent #:
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Issue Dt:
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03/18/2014
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Application #:
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13535393
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Filing Dt:
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06/28/2012
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Publication #:
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Pub Dt:
|
10/18/2012
| | | | |
Title:
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ANTI-FUSE DEVICE STRUCTURE AND ELECTROPLATING CIRCUIT STRUCTURE AND METHOD
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Patent #:
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Issue Dt:
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02/04/2014
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Application #:
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13535412
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Filing Dt:
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06/28/2012
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Publication #:
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Pub Dt:
|
10/25/2012
| | | | |
Title:
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STRUCTURE AND DESIGN STRUCTURE FOR HIGH-Q VALUE INDUCTOR AND METHOD OF MANUFACTURING THE SAME
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Patent #:
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Issue Dt:
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06/04/2013
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Application #:
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13535466
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Filing Dt:
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06/28/2012
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Publication #:
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Pub Dt:
|
10/25/2012
| | | | |
Title:
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SPIN-ON FORMULATION AND METHOD FOR STRIPPING AN ION IMPLANTED PHOTORESIST
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Patent #:
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Issue Dt:
|
10/22/2013
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Application #:
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13535528
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Filing Dt:
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06/28/2012
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Publication #:
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Pub Dt:
|
11/01/2012
| | | | |
Title:
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SPIN-ON FORMULATION AND METHOD FOR STRIPPING AN ION IMPLANTED PHOTORESIST
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Patent #:
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Issue Dt:
|
06/21/2016
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Application #:
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13535675
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Filing Dt:
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06/28/2012
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Publication #:
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Pub Dt:
|
10/25/2012
| | | | |
Title:
|
ENHANCED MODULARITY IN HETEROGENEOUS 3D STACKS
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|