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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:049490/0001   Pages: 892
Recorded: 11/29/2018
Conveyance: SECURITY AGREEMENT
1
Patent #:
Issue Dt:
11/28/2017
Application #:
13482864
Filing Dt:
05/29/2012
Publication #:
Pub Dt:
12/05/2013
Title:
INTEGRATED CIRCUIT INCLUDING WIRE STRUCTURE, RELATED METHOD AND DESIGN STRUCTURE
2
Patent #:
Issue Dt:
05/06/2014
Application #:
13482871
Filing Dt:
05/29/2012
Publication #:
Pub Dt:
12/05/2013
Title:
METHODS FOR FABRICATING INTEGRATED CIRCUITS HAVING IMPROVED SPACERS
3
Patent #:
Issue Dt:
05/05/2015
Application #:
13483200
Filing Dt:
05/30/2012
Publication #:
Pub Dt:
12/05/2013
Title:
EMBEDDED PLANAR SOURCE/DRAIN STRESSORS FOR A FINFET INCLUDING A PLURALITY OF FINS
4
Patent #:
Issue Dt:
12/29/2015
Application #:
13483481
Filing Dt:
05/30/2012
Publication #:
Pub Dt:
12/06/2012
Title:
PERFORMANCE ENHANCEMENT IN TRANSISTORS BY PROVIDING AN EMBEDDED STRAIN-INDUCING SEMICONDUCTOR MATERIAL ON THE BASIS OF A SEED LAYER
5
Patent #:
Issue Dt:
03/18/2014
Application #:
13483630
Filing Dt:
05/30/2012
Publication #:
Pub Dt:
12/06/2012
Title:
TRANSISTORS WITH EMBEDDED STRAIN-INDUCING MATERIAL FORMED IN CAVITIES PROVIDED BY AN OXIDIZING ETCH PROCESS
6
Patent #:
Issue Dt:
03/04/2014
Application #:
13483759
Filing Dt:
05/30/2012
Publication #:
Pub Dt:
12/05/2013
Title:
SOURCE AND DRAIN ARCHITECTURE IN AN ACTIVE REGION OF A P-CHANNEL TRANSISTOR BY TILTED IMPLANTATION
7
Patent #:
Issue Dt:
06/16/2015
Application #:
13483781
Filing Dt:
05/30/2012
Publication #:
Pub Dt:
12/05/2013
Title:
SEMICONDUCTOR-ON-INSULATOR (SOI) SUBSTRATES WITH ULTRA-THIN SOI LAYERS AND BURIED OXIDES
8
Patent #:
Issue Dt:
07/05/2016
Application #:
13484739
Filing Dt:
05/31/2012
Publication #:
Pub Dt:
12/05/2013
Title:
WRAP-AROUND FIN FOR CONTACTING A CAPACITOR STRAP OF A DRAM
9
Patent #:
Issue Dt:
08/19/2014
Application #:
13485748
Filing Dt:
05/31/2012
Publication #:
Pub Dt:
12/05/2013
Title:
NON-VOLATILE MEMORY CROSSPOINT REPAIR
10
Patent #:
Issue Dt:
12/20/2016
Application #:
13485828
Filing Dt:
05/31/2012
Publication #:
Pub Dt:
12/05/2013
Title:
ELEMENT PLACEMENT IN CIRCUIT DESIGN BASED ON PREFERRED LOCATION
11
Patent #:
Issue Dt:
09/30/2014
Application #:
13485862
Filing Dt:
05/31/2012
Publication #:
Pub Dt:
12/05/2013
Title:
MANUFACTURING CONTROL BASED ON A FINAL DESIGN STRUCTURE INCORPORATING BOTH LAYOUT AND CLIENT-SPECIFIC MANUFACTURING INFORMATION
12
Patent #:
Issue Dt:
06/17/2014
Application #:
13486573
Filing Dt:
06/01/2012
Publication #:
Pub Dt:
10/31/2013
Title:
Assembly of Electronic and Optical Devices
13
Patent #:
Issue Dt:
12/23/2014
Application #:
13486644
Filing Dt:
06/01/2012
Publication #:
Pub Dt:
12/05/2013
Title:
RECEIVER WITH FOUR-SLICE DECISION FEEDBACK EQUALIZER
14
Patent #:
Issue Dt:
12/03/2013
Application #:
13487351
Filing Dt:
06/04/2012
Publication #:
Pub Dt:
12/05/2013
Title:
METHODS OF PERFORMING HIGHLY TILTED HALO IMPLANTATION PROCESSES ON SEMICONDUCTOR DEVICES
15
Patent #:
Issue Dt:
08/26/2014
Application #:
13487427
Filing Dt:
06/04/2012
Publication #:
Pub Dt:
09/27/2012
Title:
CROSSPOINT ARRAY AND METHOD OF USE WITH A CROSSPOINT ARRAY HAVING CROSSBAR ELEMENTS HAVING A SOLID ELECTROLYTE MATERIAL USED AS A RECTIFIER WITH A SYMMETRIC OR SUBSTANTIALLY SYMMETRIC RESISTIVE MEMORY
16
Patent #:
Issue Dt:
12/10/2013
Application #:
13487473
Filing Dt:
06/04/2012
Publication #:
Pub Dt:
10/04/2012
Title:
SELF-ALIGNED III-V FIELD EFFECT TRANSISTOR (FET) AND INTEGRATED CIRCUIT (IC) CHIP
17
Patent #:
Issue Dt:
02/26/2013
Application #:
13487647
Filing Dt:
06/04/2012
Publication #:
Pub Dt:
09/27/2012
Title:
Increasing reliability of copper-based metallization structures in a microstructure device by using aluminum nitride
18
Patent #:
Issue Dt:
02/24/2015
Application #:
13487904
Filing Dt:
06/04/2012
Publication #:
Pub Dt:
09/20/2012
Title:
ESD NETWORK CIRCUIT WITH A THROUGH WAFER VIA STRUCTURE AND A METHOD OF MANUFACTURE
19
Patent #:
Issue Dt:
03/03/2015
Application #:
13488532
Filing Dt:
06/05/2012
Publication #:
Pub Dt:
12/05/2013
Title:
CIRCUIT TECHNIQUE TO ELECTRICALLY CHARACTERIZE BLOCK MASK SHIFTS
20
Patent #:
Issue Dt:
06/16/2015
Application #:
13488693
Filing Dt:
06/05/2012
Publication #:
Pub Dt:
12/05/2013
Title:
FIXTURE FOR SHAPING A LAMINATE SUBSTRATE
21
Patent #:
Issue Dt:
12/30/2014
Application #:
13488870
Filing Dt:
06/05/2012
Publication #:
Pub Dt:
12/05/2013
Title:
SYSTEM AND METHOD FOR FORMING ALUMINUM FUSE FOR COMPATIBILITY WITH COPPER BEOL INTERCONNECT SCHEME
22
Patent #:
Issue Dt:
02/04/2014
Application #:
13488940
Filing Dt:
06/05/2012
Publication #:
Pub Dt:
09/27/2012
Title:
SURFACE MODIFIED NANOPARTICLES, METHODS OF THEIR PREPARATION, AND USES THEREOF FOR GENE AND DRUG DELIVERY
23
Patent #:
Issue Dt:
08/27/2013
Application #:
13489244
Filing Dt:
06/05/2012
Title:
AQUA REGIA AND HYDROGEN PEROXIDE HCL COMBINATION TO REMOVE NI AND NIPT RESIDUES
24
Patent #:
Issue Dt:
05/06/2014
Application #:
13489539
Filing Dt:
06/06/2012
Publication #:
Pub Dt:
12/20/2012
Title:
HIGH-K METAL GATE ELECTRODE STRUCTURES FORMED BY REDUCING A GATE FILL ASPECT RATIO IN REPLACEMENT GATE TECHNOLOGY
25
Patent #:
Issue Dt:
01/28/2014
Application #:
13489572
Filing Dt:
06/06/2012
Publication #:
Pub Dt:
12/12/2013
Title:
SPACER ISOLATION IN DEEP TRENCH
26
Patent #:
Issue Dt:
07/01/2014
Application #:
13489861
Filing Dt:
06/06/2012
Publication #:
Pub Dt:
12/12/2013
Title:
EDGE PROTECTION OF BONDED WAFERS DURING WAFER THINNING
27
Patent #:
Issue Dt:
06/30/2015
Application #:
13490096
Filing Dt:
06/06/2012
Publication #:
Pub Dt:
12/12/2013
Title:
MODELING MEMORY CELL SKEW SENSITIVITY
28
Patent #:
Issue Dt:
02/03/2015
Application #:
13490239
Filing Dt:
06/06/2012
Publication #:
Pub Dt:
09/27/2012
Title:
MICROELECTRONIC SUBSTRATE HAVING REMOVABLE EDGE EXTENSION ELEMENT
29
Patent #:
Issue Dt:
02/18/2014
Application #:
13490618
Filing Dt:
06/07/2012
Publication #:
Pub Dt:
11/14/2013
Title:
FABRICATE SELF-FORMED NANOMETER PORE ARRAY AT WAFER SCALE FOR DNA SEQUENCING
30
Patent #:
Issue Dt:
05/27/2014
Application #:
13490840
Filing Dt:
06/07/2012
Publication #:
Pub Dt:
12/12/2013
Title:
INTEGRATED CIRCUITS HAVING A CONTINUOUS ACTIVE AREA AND METHODS FOR FABRICATING SAME
31
Patent #:
Issue Dt:
12/23/2014
Application #:
13491036
Filing Dt:
06/07/2012
Publication #:
Pub Dt:
09/27/2012
Title:
SEMICONDUCTOR DEVICES HAVING TENSILE AND/OR COMPRESSIVE STRAIN AND METHODS OF MANUFACTURING AND DESIGN STRUCTURE
32
Patent #:
Issue Dt:
02/09/2016
Application #:
13491093
Filing Dt:
06/07/2012
Publication #:
Pub Dt:
09/27/2012
Title:
REMOVING MATERIAL FROM DEFECTIVE OPENING IN GLASS MOLD
33
Patent #:
Issue Dt:
05/31/2016
Application #:
13491210
Filing Dt:
06/07/2012
Publication #:
Pub Dt:
12/12/2013
Title:
UNIVERSAL JITTER METER AND PHASE NOISE MEASUREMENT
34
Patent #:
Issue Dt:
03/25/2014
Application #:
13491857
Filing Dt:
06/08/2012
Publication #:
Pub Dt:
12/12/2013
Title:
RECESSING AND CAPPING OF GATE STRUCTURES WITH VARYING METAL COMPOSITIONS
35
Patent #:
Issue Dt:
09/19/2017
Application #:
13492108
Filing Dt:
06/08/2012
Publication #:
Pub Dt:
09/27/2012
Title:
METHOD OF FABRICATING A FINFET HAVING A GATE STRUCTURE DISPOSED AT LEAST PARTIALLY AT A BEND REGION OF THE SEMICONDUCTOR FIN.
36
Patent #:
Issue Dt:
09/24/2013
Application #:
13492964
Filing Dt:
06/11/2012
Publication #:
Pub Dt:
09/27/2012
Title:
COMPUTER IMPLEMENTED DESIGN OF DEVICE FOR ELECTRO-OPTICAL MODULATION OF LIGHT INCIDENT UPON DEVICE
37
Patent #:
Issue Dt:
04/01/2014
Application #:
13493003
Filing Dt:
06/11/2012
Publication #:
Pub Dt:
12/12/2013
Title:
METHODS OF FORMING SEMICONDUCTOR DEVICES BY FORMING SEMICONDUCTOR CHANNEL REGION MATERIALS PRIOR TO FORMING ISOLATION STRUCTURES
38
Patent #:
Issue Dt:
03/11/2014
Application #:
13493021
Filing Dt:
06/11/2012
Publication #:
Pub Dt:
12/12/2013
Title:
METHODS OF FORMING HIGH MOBILITY FIN CHANNELS ON THREE DIMENSIONAL SEMICONDUCTOR DEVICES
39
Patent #:
Issue Dt:
01/20/2015
Application #:
13493865
Filing Dt:
06/11/2012
Publication #:
Pub Dt:
12/12/2013
Title:
SEMICONDUCTOR DEVICES HAVING IMPROVED GATE HEIGHT UNIFORMITY AND METHODS FOR FABRICATING SAME
40
Patent #:
Issue Dt:
11/17/2015
Application #:
13494047
Filing Dt:
06/12/2012
Publication #:
Pub Dt:
12/12/2013
Title:
Optimizing Heat Transfer in 3-D Chip-Stacks
41
Patent #:
Issue Dt:
12/17/2013
Application #:
13494327
Filing Dt:
06/12/2012
Publication #:
Pub Dt:
10/04/2012
Title:
LAYERED STRUCTURE WITH FUSE
42
Patent #:
Issue Dt:
01/07/2014
Application #:
13494635
Filing Dt:
06/12/2012
Publication #:
Pub Dt:
12/12/2013
Title:
SIDE-GATE DEFINED TUNABLE NANOCONSTRICTION IN DOUBLE-GATED GRAPHENE MULTILAYERS
43
Patent #:
Issue Dt:
12/16/2014
Application #:
13494667
Filing Dt:
06/12/2012
Publication #:
Pub Dt:
12/12/2013
Title:
THREE DIMENSIONAL FLIP CHIP SYSTEM AND METHOD
44
Patent #:
Issue Dt:
09/09/2014
Application #:
13494686
Filing Dt:
06/12/2012
Publication #:
Pub Dt:
12/12/2013
Title:
METHODS OF TAILORING WORK FUNCTION OF SEMICONDUCTOR DEVICES WITH HIGH-K/METAL LAYER GATE STRUCTURES BY PERFORMING A FLUORINE IMPLANT PROCESS
45
Patent #:
Issue Dt:
04/22/2014
Application #:
13495081
Filing Dt:
06/13/2012
Publication #:
Pub Dt:
12/19/2013
Title:
METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR (MOSFET) GATE TERMINATION
46
Patent #:
Issue Dt:
03/26/2013
Application #:
13495195
Filing Dt:
06/13/2012
Publication #:
Pub Dt:
10/04/2012
Title:
SEMICONDUCTOR DEVICE AND METHOD OF MAKING SEMICONDUCTOR DEVICE
47
Patent #:
NONE
Issue Dt:
Application #:
13511535
Filing Dt:
06/04/2012
Publication #:
Pub Dt:
11/22/2012
Title:
NETWORK-WIDE STORING AND SCHEDULING METHOD AND SYSTEM FOR INTERNET PROTOCOL TELEVISION
48
Patent #:
Issue Dt:
01/06/2015
Application #:
13523048
Filing Dt:
06/14/2012
Publication #:
Pub Dt:
12/19/2013
Title:
CONTINUOUSLY SCALABLE WIDTH AND HEIGHT SEMICONDUCTOR FINS
49
Patent #:
Issue Dt:
08/09/2016
Application #:
13523182
Filing Dt:
06/14/2012
Publication #:
Pub Dt:
12/19/2013
Title:
GRAPHENE BASED STRUCTURES AND METHODS FOR BROADBAND ELECTROMAGNETIC RADIATION ABSORPTION AT THE MICROWAVE AND TERAHERTZ FREQUENCIES
50
Patent #:
Issue Dt:
01/21/2014
Application #:
13523331
Filing Dt:
06/14/2012
Publication #:
Pub Dt:
01/03/2013
Title:
ANALOG-DIGITAL CONVERTER
51
Patent #:
Issue Dt:
11/26/2013
Application #:
13523624
Filing Dt:
06/14/2012
Publication #:
Pub Dt:
12/19/2013
Title:
BITLINE DELETION
52
Patent #:
Issue Dt:
12/16/2014
Application #:
13523971
Filing Dt:
06/15/2012
Publication #:
Pub Dt:
12/19/2013
Title:
BAD WORDLINE/ARRAY DETECTION IN MEMORY
53
Patent #:
Issue Dt:
12/31/2013
Application #:
13525479
Filing Dt:
06/18/2012
Publication #:
Pub Dt:
12/19/2013
Title:
STRAINED SILICON AND STRAINED SILICON GERMANIUM ON INSULATOR METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTORS (MOSFETS)
54
Patent #:
Issue Dt:
12/17/2013
Application #:
13526139
Filing Dt:
06/18/2012
Publication #:
Pub Dt:
11/21/2013
Title:
SEMICONDUCTOR ACTIVE MATRIX ON BURIED INSULATOR
55
Patent #:
Issue Dt:
05/20/2014
Application #:
13526152
Filing Dt:
06/18/2012
Publication #:
Pub Dt:
12/19/2013
Title:
METHOD AND APPARATUS FOR HIERARCHICAL WAFER QUALITY PREDICTIVE MODELING
56
Patent #:
Issue Dt:
09/02/2014
Application #:
13526153
Filing Dt:
06/18/2012
Publication #:
Pub Dt:
03/20/2014
Title:
Token-Based Current Control to Mitigate Current Delivery Limitations in Integrated Circuits
57
Patent #:
Issue Dt:
12/16/2014
Application #:
13526252
Filing Dt:
06/18/2012
Publication #:
Pub Dt:
07/10/2014
Title:
ADAPTIVE WORKLOAD BASED OPTIMIZATIONS COUPLED WITH A HETEROGENEOUS CURRENT-AWARE BASELINE DESIGN TO MITIGATE CURRENT DELIVERY LIMITATIONS IN INTEGRATED CIRCUITS
58
Patent #:
Issue Dt:
07/01/2014
Application #:
13526585
Filing Dt:
06/19/2012
Publication #:
Pub Dt:
11/28/2013
Title:
DRIFT-INSENSITIVE OR INVARIANT MATERIAL FOR PHASE CHANGE MEMORY
59
Patent #:
Issue Dt:
05/26/2015
Application #:
13527131
Filing Dt:
06/19/2012
Publication #:
Pub Dt:
12/19/2013
Title:
THROUGH SILICON VIA WAFER AND METHODS OF MANUFACTURING
60
Patent #:
Issue Dt:
08/11/2015
Application #:
13527280
Filing Dt:
06/19/2012
Publication #:
Pub Dt:
12/19/2013
Title:
COPPER FEATURE DESIGN FOR WARPAGE CONTROL OF SUBSTRATES
61
Patent #:
Issue Dt:
01/13/2015
Application #:
13528947
Filing Dt:
06/21/2012
Publication #:
Pub Dt:
12/26/2013
Title:
PROBE-ON-SUBSTRATE
62
Patent #:
Issue Dt:
07/05/2016
Application #:
13529264
Filing Dt:
06/21/2012
Publication #:
Pub Dt:
12/26/2013
Title:
OVERHEAD SUBSTRATE HANDLING AND STORAGE SYSTEM
63
Patent #:
Issue Dt:
07/29/2014
Application #:
13529327
Filing Dt:
06/21/2012
Publication #:
Pub Dt:
12/26/2013
Title:
METHODS FOR FABRICATING INTEGRATED CIRCUITS WITH FLUORINE PASSIVATION
64
Patent #:
Issue Dt:
09/17/2013
Application #:
13529334
Filing Dt:
06/21/2012
Title:
NANOWIRE FET AND FINFET
65
Patent #:
Issue Dt:
11/18/2014
Application #:
13529360
Filing Dt:
06/21/2012
Publication #:
Pub Dt:
12/26/2013
Title:
DOUBLE LAYER INTERLEAVED P-N DIODE MODULATOR
66
Patent #:
Issue Dt:
01/15/2013
Application #:
13529558
Filing Dt:
06/21/2012
Publication #:
Pub Dt:
10/18/2012
Title:
EMBEDDED STRESSOR FOR SEMICONDUCTOR STRUCTURES
67
Patent #:
Issue Dt:
04/08/2014
Application #:
13529625
Filing Dt:
06/21/2012
Publication #:
Pub Dt:
10/18/2012
Title:
HETEROJUNCTION BIPOLAR TRANSISTORS AND METHODS OF MANUFACTURE
68
Patent #:
Issue Dt:
01/27/2015
Application #:
13529898
Filing Dt:
06/21/2012
Publication #:
Pub Dt:
12/26/2013
Title:
METHODS FOR FABRICATING INTEGRATED CIRCUITS WITH DRIFT REGIONS AND REPLACEMENT GATES
69
Patent #:
Issue Dt:
05/05/2015
Application #:
13530449
Filing Dt:
06/22/2012
Publication #:
Pub Dt:
12/26/2013
Title:
ULTRATHIN BODY FULLY DEPLETED SILICON-ON-INSULATOR INTEGRATED CIRCUITS AND METHODS FOR FABRICATING SAME
70
Patent #:
Issue Dt:
04/08/2014
Application #:
13530519
Filing Dt:
06/22/2012
Publication #:
Pub Dt:
10/18/2012
Title:
LATERAL EPITAXIAL GROWN SOI IN DEEP TRENCH STRUCTURES AND METHODS OF MANUFACTURE
71
Patent #:
Issue Dt:
09/10/2013
Application #:
13530605
Filing Dt:
06/22/2012
Title:
METHOD OF LARGE-AREA CIRCUIT LAYOUT RECOGNITION
72
Patent #:
Issue Dt:
12/17/2013
Application #:
13530725
Filing Dt:
06/22/2012
Publication #:
Pub Dt:
12/19/2013
Title:
GRAPHENE BASED STRUCTURES AND METHODS FOR BROADBAND ELECTROMAGNETIC RADIATION ABSORPTION AT THE MICROWAVE AND TERAHERTZ FREQUENCIES
73
Patent #:
Issue Dt:
08/27/2013
Application #:
13530889
Filing Dt:
06/22/2012
Publication #:
Pub Dt:
10/18/2012
Title:
PHASE CHANGE MEMORY CYCLE TIMER AND METHOD
74
Patent #:
Issue Dt:
10/14/2014
Application #:
13531053
Filing Dt:
06/22/2012
Publication #:
Pub Dt:
10/18/2012
Title:
STRAINED THIN BODY CMOS DEVICE HAVING VERTICALLY RAISED SOURCE/DRAIN STRESSORS WITH SINGLE SPACER
75
Patent #:
Issue Dt:
01/13/2015
Application #:
13531175
Filing Dt:
06/22/2012
Publication #:
Pub Dt:
10/18/2012
Title:
DEVICE STRUCTURE, LAYOUT AND FABRICATION METHOD FOR UNIAXIALLY STRAINED TRANSISTORS
76
Patent #:
Issue Dt:
12/02/2014
Application #:
13531518
Filing Dt:
06/23/2012
Publication #:
Pub Dt:
10/18/2012
Title:
INTERCONNECT STRUCTURES WITH ENGINEERED DIELECTRICS WITH NANOCOLUMNAR POROSITY
77
Patent #:
Issue Dt:
06/16/2015
Application #:
13531654
Filing Dt:
06/25/2012
Publication #:
Pub Dt:
12/26/2013
Title:
SHALLOW TRENCH ISOLATION STRUCTURES
78
Patent #:
Issue Dt:
03/18/2014
Application #:
13531780
Filing Dt:
06/25/2012
Publication #:
Pub Dt:
12/26/2013
Title:
SHALLOW TRENCH ISOLATION STRUCTURES
79
Patent #:
Issue Dt:
03/24/2015
Application #:
13532157
Filing Dt:
06/25/2012
Publication #:
Pub Dt:
10/18/2012
Title:
SYSTEMS AND METHODS FOR MANAGING COMPUTING SYSTEMS UTILIZING AUGMENTED REALITY
80
Patent #:
Issue Dt:
08/06/2013
Application #:
13532323
Filing Dt:
06/25/2012
Title:
BIPOLAR JUNCTION TRANSISTOR WITH EPITAXIAL CONTACTS
81
Patent #:
Issue Dt:
01/05/2016
Application #:
13532716
Filing Dt:
06/25/2012
Publication #:
Pub Dt:
10/18/2012
Title:
METHODS FOR FABRICATING MAGNETIC TRANSDUCERS USING POST-DEPOSITION TILTING
82
Patent #:
Issue Dt:
03/26/2013
Application #:
13532991
Filing Dt:
06/26/2012
Publication #:
Pub Dt:
10/25/2012
Title:
COUPLING PIEZOELECTRIC MATERIAL GENERATED STRESSES TO DEVICES FORMED IN INTEGRATED CIRCUITS
83
Patent #:
Issue Dt:
05/06/2014
Application #:
13533099
Filing Dt:
06/26/2012
Publication #:
Pub Dt:
10/25/2012
Title:
METHOD OF FABRICATING ISOLATED CAPACITORS AND STRUCTURE THEREOF
84
Patent #:
Issue Dt:
01/06/2015
Application #:
13533182
Filing Dt:
06/26/2012
Publication #:
Pub Dt:
10/25/2012
Title:
FORMATION OF ALPHA PARTICLE SHIELDS IN CHIP PACKAGING
85
Patent #:
Issue Dt:
07/28/2015
Application #:
13533484
Filing Dt:
06/26/2012
Publication #:
Pub Dt:
12/26/2013
Title:
IMPLEMENTING GATE WITHIN A GATE UTILIZING REPLACEMENT METAL GATE PROCESS
86
Patent #:
Issue Dt:
04/16/2013
Application #:
13533499
Filing Dt:
06/26/2012
Publication #:
Pub Dt:
10/18/2012
Title:
MONOLAYER DOPANT EMBEDDED STRESSOR FOR ADVANCED CMOS
87
Patent #:
Issue Dt:
02/18/2014
Application #:
13533807
Filing Dt:
06/26/2012
Publication #:
Pub Dt:
10/18/2012
Title:
HIGH-K METAL GATE ELECTRODE STRUCTURES FORMED BY SEPARATE REMOVAL OF PLACEHOLDER MATERIALS USING A MASKING REGIME PRIOR TO GATE PATTERNING
88
Patent #:
Issue Dt:
11/19/2013
Application #:
13533816
Filing Dt:
06/26/2012
Title:
METHODS FOR FABRICATING INTEGRATED CIRCUITS WITH RUTHENIUM-LINED COPPER
89
Patent #:
Issue Dt:
01/27/2015
Application #:
13534012
Filing Dt:
06/27/2012
Publication #:
Pub Dt:
01/02/2014
Title:
SEMICONDUCTOR DEVICES HAVING DIFFERENT GATE OXIDE THICKNESSES
90
Patent #:
Issue Dt:
02/24/2015
Application #:
13534037
Filing Dt:
06/27/2012
Publication #:
Pub Dt:
01/02/2014
Title:
INTEGRATION OF A TITANIA LAYER IN AN ANTI-REFLECTIVE COATING
91
Patent #:
Issue Dt:
10/22/2013
Application #:
13534067
Filing Dt:
06/27/2012
Title:
THREE DIMENSIONAL INTEGRATED CIRCUIT INTEGRATION USING ALIGNMENT VIA/DIELECTRIC BONDING FIRST AND THROUGH VIA FORMATION LAST
92
Patent #:
Issue Dt:
11/18/2014
Application #:
13534082
Filing Dt:
06/27/2012
Publication #:
Pub Dt:
11/01/2012
Title:
DAMASCENE METHOD OF FORMING A SEMICONDUCTOR STRUCTURE AND A SEMICONDUCTOR STRUCTURE WITH MULTIPLE FIN-SHAPED CHANNEL REGIONS HAVING DIFFERENT WIDTHS
93
Patent #:
Issue Dt:
08/27/2013
Application #:
13534350
Filing Dt:
06/27/2012
Publication #:
Pub Dt:
10/18/2012
Title:
INTEGRATED MILLIMETER WAVE ANTENNA AND TRANSCEIVER ON A SUBSTRATE
94
Patent #:
Issue Dt:
05/21/2013
Application #:
13534462
Filing Dt:
06/27/2012
Publication #:
Pub Dt:
10/18/2012
Title:
SEMICONDUCTOR SWITCHING DEVICE EMPLOYING A QUANTUM DOT STRUCTURE
95
Patent #:
Issue Dt:
05/28/2013
Application #:
13534855
Filing Dt:
06/27/2012
Publication #:
Pub Dt:
11/01/2012
Title:
SURFACE CHARGE ENABLED NANOPOROUS SEMI-PERMEABLE MEMBRANE FOR DESALINATION
96
Patent #:
Issue Dt:
03/18/2014
Application #:
13535393
Filing Dt:
06/28/2012
Publication #:
Pub Dt:
10/18/2012
Title:
ANTI-FUSE DEVICE STRUCTURE AND ELECTROPLATING CIRCUIT STRUCTURE AND METHOD
97
Patent #:
Issue Dt:
02/04/2014
Application #:
13535412
Filing Dt:
06/28/2012
Publication #:
Pub Dt:
10/25/2012
Title:
STRUCTURE AND DESIGN STRUCTURE FOR HIGH-Q VALUE INDUCTOR AND METHOD OF MANUFACTURING THE SAME
98
Patent #:
Issue Dt:
06/04/2013
Application #:
13535466
Filing Dt:
06/28/2012
Publication #:
Pub Dt:
10/25/2012
Title:
SPIN-ON FORMULATION AND METHOD FOR STRIPPING AN ION IMPLANTED PHOTORESIST
99
Patent #:
Issue Dt:
10/22/2013
Application #:
13535528
Filing Dt:
06/28/2012
Publication #:
Pub Dt:
11/01/2012
Title:
SPIN-ON FORMULATION AND METHOD FOR STRIPPING AN ION IMPLANTED PHOTORESIST
100
Patent #:
Issue Dt:
06/21/2016
Application #:
13535675
Filing Dt:
06/28/2012
Publication #:
Pub Dt:
10/25/2012
Title:
ENHANCED MODULARITY IN HETEROGENEOUS 3D STACKS
Assignor
1
Exec Dt:
11/27/2018
Assignee
1
1100 NORTH MARKET STREET
WILMINGTON, DELAWARE 19801
Correspondence name and address
CT CORPORATION
4400 EASTON COMMONS WAY
SUITE 125
COLUMBUS, OH 43219

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