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Patent #:
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Issue Dt:
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11/03/2015
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13572039
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Filing Dt:
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08/10/2012
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Publication #:
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Pub Dt:
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12/06/2012
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Title:
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METHOD FOR FABRICATING MOSFET ON SILICON-ON-INSULATOR WITH INTERNAL BODY CONTACT
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09/09/2014
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13572114
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Filing Dt:
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08/10/2012
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Publication #:
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Pub Dt:
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12/06/2012
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Title:
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NANOWIRE FET WITH TRAPEZOID GATE STRUCTURE
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Issue Dt:
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09/03/2013
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13572289
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Filing Dt:
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08/10/2012
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Title:
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RELIABLE PHYSICAL UNCLONABLE FUNCTION FOR DEVICE AUTHENTICATION
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02/24/2015
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13572343
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08/10/2012
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Pub Dt:
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02/13/2014
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Title:
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INTEGRATED CIRCUITS WITH IMPROVED SPACERS AND METHODS FOR FABRICATING SAME
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10/29/2013
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13572742
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Filing Dt:
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08/13/2012
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Pub Dt:
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12/06/2012
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Title:
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BEOL COMPATIBLE FET STRUCTRURE
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Issue Dt:
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09/17/2013
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13572954
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Filing Dt:
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08/13/2012
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Title:
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SYSTEM YIELD OPTIMIZATION USING THE RESULTS OF INTEGRATED CIRCUIT CHIP PERFORMANCE PATH TESTING
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04/15/2014
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13572988
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08/13/2012
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Pub Dt:
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02/13/2014
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Title:
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COMPUTING MULTI-MAGNET BASED DEVICES AND METHODS FOR SOLUTION OF OPTIMIZATION PROBLEMS
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07/15/2014
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13573000
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08/13/2012
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Pub Dt:
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12/06/2012
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Title:
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DETERMINING CELL-STATE IN PHASE-CHANGE MEMORY
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Patent #:
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Issue Dt:
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09/03/2013
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13584055
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Filing Dt:
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08/13/2012
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Title:
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METHODS OF FORMING SEMICONDUCTOR DEVICES WITH SELF-ALIGNED CONTACTS AND LOW-K SPACERS AND THE RESULTING DEVICES
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Patent #:
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09/16/2014
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13584120
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Filing Dt:
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10/28/2012
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Pub Dt:
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04/03/2014
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Title:
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MULTI-BIT RESISTANCE MEASUREMENT
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Patent #:
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Issue Dt:
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09/16/2014
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13584156
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Filing Dt:
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08/13/2012
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Publication #:
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Pub Dt:
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02/13/2014
| | | | |
Title:
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STRUCTURE AND METHOD TO FORM INPUT/OUTPUT DEVICES
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Patent #:
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Issue Dt:
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09/23/2014
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13584176
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Filing Dt:
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08/13/2012
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Publication #:
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Pub Dt:
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02/13/2014
| | | | |
Title:
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HIGH DENSITY BULK FIN CAPACITOR
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Patent #:
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Issue Dt:
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06/03/2014
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13584199
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Filing Dt:
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08/13/2012
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Publication #:
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Pub Dt:
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02/13/2014
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Title:
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CONTACTS-FIRST SELF-ALIGNED CARBON NANOTUBE TRANSISTOR WITH GATE-ALL-AROUND
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Patent #:
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Issue Dt:
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05/17/2016
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13584326
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Filing Dt:
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08/13/2012
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Publication #:
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Pub Dt:
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08/28/2014
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Title:
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TWO MASK PROCESS FOR ELECTROPLATING METAL EMPLOYING A NEGATIVE ELECTROPHORETIC PHOTORESIST
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Patent #:
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Issue Dt:
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12/02/2014
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Application #:
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13584423
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Filing Dt:
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08/13/2012
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Publication #:
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Pub Dt:
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01/23/2014
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Title:
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DECODING SCHEME FOR BIPOLAR-BASED DIODE THREE-DIMENSIONAL MEMORY REQUIRING UNIPOLAR PROGRAMMING
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Issue Dt:
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05/06/2014
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13584981
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Filing Dt:
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08/14/2012
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Pub Dt:
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02/20/2014
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Title:
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METHODS OF FORMING ISOLATION STRUCTURES FOR SEMICONDUCTOR DEVICES BY PERFORMING A DRY CHEMICAL REMOVAL PROCESS
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Patent #:
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Issue Dt:
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12/17/2013
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13585152
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Filing Dt:
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08/14/2012
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Title:
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IDENTIFICATION OF ILLEGAL DEVICES USING CONTACT MAPPING
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Patent #:
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Issue Dt:
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06/03/2014
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13585395
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Filing Dt:
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08/14/2012
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Publication #:
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Pub Dt:
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02/20/2014
| | | | |
Title:
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FIN STRUCTURE FORMATION INCLUDING PARTIAL SPACER REMOVAL
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Patent #:
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Issue Dt:
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06/17/2014
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13585465
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Filing Dt:
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08/14/2012
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Publication #:
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Pub Dt:
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02/13/2014
| | | | |
Title:
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DOUBLE CONTACTS FOR CARBON NANOTUBES THIN FILM DEVICES
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Patent #:
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Issue Dt:
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03/11/2014
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13585974
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Filing Dt:
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08/15/2012
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Publication #:
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Pub Dt:
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02/20/2014
| | | | |
Title:
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METHODS OF THINNING AND/OR DICING SEMICONDUCTING SUBSTRATES HAVING INTEGRATED CIRCUIT PRODUCTS FORMED THEREON
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Issue Dt:
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02/10/2015
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13586136
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Filing Dt:
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08/15/2012
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Publication #:
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Pub Dt:
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02/20/2014
| | | | |
Title:
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MEMORY CELL ASSEMBLY INCLUDING AN AVOID DISTURB CELL
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Patent #:
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Issue Dt:
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11/05/2013
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13586182
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Filing Dt:
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08/15/2012
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Title:
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MULTI-ELEMENT PACKAGING OF CONCENTRATOR PHOTOVOLTAIC CELLS
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Patent #:
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Issue Dt:
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01/28/2014
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13586187
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Filing Dt:
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08/15/2012
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Publication #:
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Pub Dt:
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01/30/2014
| | | | |
Title:
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PHOTONIC MODULATOR WITH A SEMICONDUCTOR CONTACT
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Issue Dt:
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07/08/2014
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13587088
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08/16/2012
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Pub Dt:
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05/29/2014
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Title:
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TONE INVERSION OF SELF-ASSEMBLED SELF-ALIGNED STRUCTURES
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Patent #:
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Issue Dt:
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10/15/2013
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13587146
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Filing Dt:
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08/16/2012
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Title:
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WRITING SCHEME FOR PHASE CHANGE MATERIAL-CONTENT ADDRESSABLE MEMORY
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Patent #:
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Issue Dt:
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03/31/2015
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13587288
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Filing Dt:
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08/16/2012
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Publication #:
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Pub Dt:
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02/20/2014
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Title:
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METHOD OF MANUFACTURING A BODY-CONTACTED SOI FINFET
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Patent #:
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Issue Dt:
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03/18/2014
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13587508
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Filing Dt:
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08/16/2012
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Publication #:
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Pub Dt:
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02/13/2014
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Title:
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CONTACTS-FIRST SELF-ALIGNED CARBON NANOTUBE TRANSISTOR WITH GATE-ALL-AROUND
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Patent #:
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Issue Dt:
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12/17/2013
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Application #:
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13587521
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Filing Dt:
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08/16/2012
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Title:
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USE OF GRAPHENE TO LIMIT COPPER SURFACE OXIDATION, DIFFUSION AND ELECTROMIGRATION IN INTERCONNECT STRUCTURES
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Patent #:
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Issue Dt:
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04/21/2015
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13587694
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08/16/2012
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Publication #:
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Pub Dt:
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01/23/2014
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Title:
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SELF-ALIGNED PROCESS TO FABRICATE A MEMORY CELL ARRAY WITH A SURROUNDING-GATE ACCESS TRANSISTOR
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Patent #:
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Issue Dt:
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07/01/2014
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13587970
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08/17/2012
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Pub Dt:
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02/20/2014
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Title:
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REDUCING EDGE DIE REFLECTIVITY IN EXTREME ULTRAVIOLET LITHOGRAPHY
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Issue Dt:
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12/29/2015
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13587998
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Filing Dt:
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08/17/2012
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Pub Dt:
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02/20/2014
| | | | |
Title:
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METHOD TO IMPROVE FINE CU LINE RELIABILITY IN AN INTEGRATED CIRCUIT DEVICE
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Issue Dt:
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09/24/2013
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Application #:
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13588059
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Filing Dt:
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08/17/2012
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Title:
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NOVEL REPLACEMENT GATE PROCESS FLOW FOR HIGHLY SCALED SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
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09/24/2013
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13588218
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08/17/2012
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Pub Dt:
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12/13/2012
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Title:
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COMPACT THERMALLY CONTROLLED THIN FILM RESISTORS UTILIZING SUBSTRATE CONTACTS AND METHODS OF MANUFACTURE
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Issue Dt:
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03/17/2015
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13588260
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Filing Dt:
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08/17/2012
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Pub Dt:
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01/23/2014
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Title:
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DATA CENTER COOLING SYSTEM
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Issue Dt:
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08/26/2014
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13588327
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Filing Dt:
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08/17/2012
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Publication #:
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Pub Dt:
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02/20/2014
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Title:
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DEVICE COMPRISING A PLURALITY OF STATIC RANDOM ACCESS MEMORY CELLS AND METHOD OF OPERATION THEREOF
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Issue Dt:
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03/12/2013
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13588382
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Filing Dt:
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08/17/2012
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Title:
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HIGH DENSITY SELECTIVE DEPOSITION OF CARBON NANOTUBES ONTO A SUBSTRATE
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Patent #:
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Issue Dt:
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06/24/2014
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13588460
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Filing Dt:
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08/17/2012
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Pub Dt:
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02/20/2014
| | | | |
Title:
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COMPRESSIVE STRESS TRANSFER IN AN INTERLAYER DIELECTRIC OF A SEMICONDUCTOR DEVICE BY PROVIDING A BI-LAYER OF SUPERIOR ADHESION AND INTERNAL STRESS
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Issue Dt:
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12/22/2015
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13588517
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Filing Dt:
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08/17/2012
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Publication #:
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Pub Dt:
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02/20/2014
| | | | |
Title:
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METHODS OF FORMING A REPLACEMENT GATE STRUCTURE HAVING A GATE ELECTRODE COMPRISED OF A DEPOSITED INTERMETALLIC COMPOUND MATERIAL
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Patent #:
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Issue Dt:
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02/18/2014
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13588585
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Filing Dt:
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08/17/2012
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Publication #:
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Pub Dt:
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03/21/2013
| | | | |
Title:
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METALLURGICAL CLAMSHELL METHODS FOR MICRO LAND GRID ARRAY FABRICATION
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Patent #:
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Issue Dt:
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02/25/2014
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Application #:
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13588724
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Filing Dt:
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08/17/2012
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Publication #:
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Pub Dt:
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02/20/2014
| | | | |
Title:
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Techniques for Metal Gate Work Function Engineering to Enable Multiple Threshold Voltage Nanowire FET Devices
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Patent #:
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Issue Dt:
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03/17/2015
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Application #:
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13589325
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Filing Dt:
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08/20/2012
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Pub Dt:
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08/29/2013
| | | | |
Title:
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SEMI-AUTOMATIC CONVERSION AND EXECUTION OF FUNCTIONAL MANUAL TESTS
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Patent #:
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Issue Dt:
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11/04/2014
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Application #:
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13589606
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Filing Dt:
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08/20/2012
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Publication #:
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Pub Dt:
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12/06/2012
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Title:
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DEVICES WITH GATE-TO-GATE ISOLATION STRUCTURES AND METHODS OF MANUFACTURE
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Patent #:
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Issue Dt:
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09/24/2013
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Application #:
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13589680
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Filing Dt:
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08/20/2012
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Publication #:
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Pub Dt:
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02/21/2013
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Title:
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RECEIVER AND INTEGRATED AM-FM/IQ DEMODULATORS FOR GIGABIT-RATE DATA DETECTION
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Patent #:
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Issue Dt:
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01/21/2014
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Application #:
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13589702
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Filing Dt:
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08/20/2012
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Publication #:
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Pub Dt:
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02/21/2013
| | | | |
Title:
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RECEIVER AND INTEGRATED AM-FM/IQ DEMODULATORS FOR GIGABIT-RATE DATA DETECTION
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Patent #:
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Issue Dt:
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03/18/2014
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Application #:
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13589707
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Filing Dt:
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08/20/2012
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Publication #:
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Pub Dt:
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02/20/2014
| | | | |
Title:
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TECHNIQUES FOR GATE WORKFUNCTION ENGINEERING TO REDUCE SHORT CHANNEL EFFECTS IN PLANAR CMOS DEVICES
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Patent #:
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Issue Dt:
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10/22/2013
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Application #:
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13590212
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Filing Dt:
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08/21/2012
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Title:
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FIELD EFFECT TRANSISTORS WITH LOW BODY RESISTANCE AND SELF-BALANCED BODY POTENTIAL
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Patent #:
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Issue Dt:
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05/05/2015
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13590251
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Filing Dt:
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08/21/2012
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Publication #:
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Pub Dt:
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02/27/2014
| | | | |
Title:
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SENSING BIOMOLECULES USING SCANNING PROBE WITH TWIN- NANOPORE TO DETECT A CHANGE IN THE MAGNITUDE OF THE CURRENT THROUGH THE SECOND NANOPORE
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Patent #:
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Issue Dt:
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08/27/2013
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Application #:
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13590300
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Filing Dt:
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08/21/2012
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Publication #:
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Pub Dt:
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12/06/2012
| | | | |
Title:
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SPATIAL CORRELATION-BASED ESTIMATION OF YIELD OF INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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05/12/2015
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Application #:
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13590556
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Filing Dt:
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08/21/2012
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Publication #:
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Pub Dt:
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02/27/2014
| | | | |
Title:
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FORMING A HARDMASK CAPPING LAYER
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Patent #:
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Issue Dt:
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06/03/2014
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Application #:
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13592434
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Filing Dt:
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08/23/2012
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Pub Dt:
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02/27/2014
| | | | |
Title:
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METHOD AND APPARATUS FOR APPLYING POST GRAPHIC DATA SYSTEM STREAM ENHANCEMENTS
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Patent #:
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Issue Dt:
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10/27/2015
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Application #:
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13593590
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Filing Dt:
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08/24/2012
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Pub Dt:
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02/06/2014
| | | | |
Title:
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RATE ADAPTIVE TRANSMISSION OF WIRELESS BROADCAST PACKETS
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Issue Dt:
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03/03/2015
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Application #:
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13593614
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Filing Dt:
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08/24/2012
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Publication #:
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Pub Dt:
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02/27/2014
| | | | |
Title:
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METHODS OF FORMING A LAYER OF SILICON ON A LAYER OF SILICON/GERMANIUM
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Patent #:
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Issue Dt:
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05/27/2014
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Application #:
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13594037
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Filing Dt:
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08/24/2012
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Publication #:
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Pub Dt:
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02/27/2014
| | | | |
Title:
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GATE TUNABLE TUNNEL DIODE
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Patent #:
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Issue Dt:
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02/25/2014
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Application #:
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13594198
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Filing Dt:
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08/24/2012
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Publication #:
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Pub Dt:
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12/20/2012
| | | | |
Title:
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OPTIMIZATION OF A MANUFACTURING PROCESS OF AN INTEGRATED CIRCUIT LAYOUT
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Patent #:
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Issue Dt:
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10/07/2014
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Application #:
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13594292
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Filing Dt:
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08/24/2012
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Publication #:
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Pub Dt:
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02/27/2014
| | | | |
Title:
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CIRCULAR TRANSMISSION LINE METHODS COMPATIBLE WITH COMBINATORIAL PROCESSING OF SEMICONDUCTORS
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Patent #:
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Issue Dt:
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04/29/2014
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Application #:
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13595025
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Filing Dt:
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08/27/2012
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Publication #:
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Pub Dt:
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03/07/2013
| | | | |
Title:
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IMPLANT FREE EXTREMELY THIN SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
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03/31/2015
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Application #:
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13595208
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Filing Dt:
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08/27/2012
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Publication #:
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Pub Dt:
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02/27/2014
| | | | |
Title:
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SEMICONDUCTOR DEVICES AND METHODS OF FORMING THE SEMICONDUCTOR DEVICES INCLUDING A RETROGRADE WELL
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Patent #:
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Issue Dt:
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07/23/2013
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Application #:
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13595432
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Filing Dt:
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08/27/2012
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Title:
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HIGH DENSITY SELECTIVE DEPOSITION OF CARBON NANOTUBES ONTO A SUBSTRATE
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Patent #:
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Issue Dt:
|
12/02/2014
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Application #:
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13595574
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Filing Dt:
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08/27/2012
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Publication #:
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Pub Dt:
|
02/27/2014
| | | | |
Title:
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METHOD OF FORMING HARDMASK LAYER WITH ALTERNATING NANOLAYERS
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Patent #:
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Issue Dt:
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11/05/2013
|
Application #:
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13595650
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Filing Dt:
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08/27/2012
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Publication #:
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Pub Dt:
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03/28/2013
| | | | |
Title:
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LITHOGRAPHIC CD CORRECTION BY SECOND EXPOSURE
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Patent #:
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Issue Dt:
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02/11/2014
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Application #:
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13596126
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Filing Dt:
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08/28/2012
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Publication #:
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Pub Dt:
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03/06/2014
| | | | |
Title:
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METHOD FOR POST DECOMPOSITION DENSITY BALANCING IN INTEGRATED CIRCUIT LAYOUTS, RELATED SYSTEM AND PROGRAM PRODUCT
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Patent #:
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Issue Dt:
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01/07/2014
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Application #:
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13596140
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Filing Dt:
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08/28/2012
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Title:
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DENSITY BALANCING IN MULTIPLE PATTERNING LITHOGRAPHY USING INTEGRATED CIRCUIT LAYOUT FILL
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Patent #:
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Issue Dt:
|
03/11/2014
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Application #:
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13596198
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Filing Dt:
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08/28/2012
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Publication #:
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Pub Dt:
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03/06/2014
| | | | |
Title:
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BEOL INTEGRATION SCHEME FOR COPPER CMP TO PREVENT DENDRITE FORMATION
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Patent #:
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Issue Dt:
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01/20/2015
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Application #:
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13596234
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Filing Dt:
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08/28/2012
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Publication #:
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Pub Dt:
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02/06/2014
| | | | |
Title:
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EPITAXIALLY THICKENED DOPED OR UNDOPED CORE NANOWIRE FET STRUCTURE AND METHOD FOR INCREASING EFFECTIVE DEVICE WIDTH
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Patent #:
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Issue Dt:
|
09/02/2014
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Application #:
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13596251
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Filing Dt:
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08/28/2012
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Publication #:
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Pub Dt:
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02/27/2014
| | | | |
Title:
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SCANNING PROBE WITH TWIN-NANOPORE OR A-SINGLE-NANOPORE FOR SENSING BIOMOLECULES
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Patent #:
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Issue Dt:
|
06/16/2015
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Application #:
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13596351
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Filing Dt:
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08/28/2012
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Publication #:
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Pub Dt:
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12/20/2012
| | | | |
Title:
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ENCODING A DATA WORD FOR WRITING THE ENCODED DATA WORD IN A MULTI-LEVEL SOLID STATE MEMORY
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Patent #:
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Issue Dt:
|
11/18/2014
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Application #:
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13596410
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Filing Dt:
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08/28/2012
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Publication #:
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Pub Dt:
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12/20/2012
| | | | |
Title:
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SHIELDING FOR HIGH-VOLTAGE SEMICONDUCTOR-ON-INSULATOR DEVICES
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Patent #:
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Issue Dt:
|
03/11/2014
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Application #:
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13596687
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Filing Dt:
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08/28/2012
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Publication #:
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Pub Dt:
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03/06/2014
| | | | |
Title:
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TECHNIQUES FOR METAL GATE WORKFUNCTION ENGINEERING TO ENABLE MULTIPLE THRESHOLD VOLTAGE FINFET DEVICES
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Patent #:
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Issue Dt:
|
02/24/2015
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Application #:
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13596808
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Filing Dt:
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08/28/2012
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Publication #:
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Pub Dt:
|
03/06/2014
| | | | |
Title:
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METHOD AND DEVICE TO ACHIEVE SELF-STOP AND PRECISE GATE HEIGHT
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|
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Patent #:
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Issue Dt:
|
05/28/2013
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Application #:
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13597331
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Filing Dt:
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08/29/2012
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Publication #:
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Pub Dt:
|
12/20/2012
| | | | |
Title:
|
BORDERLESS CONTACTS FOR SEMICONDUCTOR DEVICES
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|
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Patent #:
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Issue Dt:
|
06/17/2014
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Application #:
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13597412
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Filing Dt:
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08/29/2012
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Publication #:
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Pub Dt:
|
03/06/2014
| | | | |
Title:
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PLATED LAMINATION STRUCTURES FOR INTEGRATED MAGNETIC DEVICES
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|
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Patent #:
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Issue Dt:
|
02/17/2015
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Application #:
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13597610
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Filing Dt:
|
08/29/2012
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Publication #:
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Pub Dt:
|
02/27/2014
| | | | |
Title:
|
GATE TUNABLE TUNNEL DIODE
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|
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Patent #:
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Issue Dt:
|
06/23/2015
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Application #:
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13597752
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Filing Dt:
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08/29/2012
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Publication #:
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Pub Dt:
|
03/06/2014
| | | | |
Title:
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SUBLITHOGRAPHIC WIDTH FINFET EMPLOYING SOLID PHASE EPITAXY
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|
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Patent #:
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Issue Dt:
|
05/19/2015
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Application #:
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13597799
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Filing Dt:
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08/29/2012
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Publication #:
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Pub Dt:
|
03/06/2014
| | | | |
Title:
|
SEMICONDUCTOR FIN ON LOCAL OXIDE
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|
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Patent #:
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|
Issue Dt:
|
02/25/2014
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Application #:
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13597802
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Filing Dt:
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08/29/2012
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Publication #:
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Pub Dt:
|
02/20/2014
| | | | |
Title:
|
Techniques for Metal Gate Work Function Engineering to Enable Multiple Threshold Voltage Nanowire FET Devices
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|
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Patent #:
|
|
Issue Dt:
|
06/16/2015
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Application #:
|
13598001
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Filing Dt:
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08/29/2012
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Publication #:
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Pub Dt:
|
03/06/2014
| | | | |
Title:
|
DRAM REFRESH
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|
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Patent #:
|
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Issue Dt:
|
01/13/2015
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Application #:
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13598080
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Filing Dt:
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08/29/2012
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Publication #:
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Pub Dt:
|
03/06/2014
| | | | |
Title:
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FINFET WITH SELF-ALIGNED PUNCHTHROUGH STOPPER
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|
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Patent #:
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Issue Dt:
|
06/16/2015
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Application #:
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13598787
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Filing Dt:
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08/30/2012
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Publication #:
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Pub Dt:
|
03/06/2014
| | | | |
Title:
|
SRAM LOCAL EVALUATION LOGIC FOR COLUMN SELECTION
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|
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Patent #:
|
|
Issue Dt:
|
07/01/2014
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Application #:
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13599256
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Filing Dt:
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08/30/2012
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Publication #:
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Pub Dt:
|
03/06/2014
| | | | |
Title:
|
DOPING OF COPPER WIRING STRUCTURES IN BACK END OF LINE PROCESSING
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|
|
Patent #:
|
|
Issue Dt:
|
02/03/2015
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Application #:
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13600314
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Filing Dt:
|
08/31/2012
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Publication #:
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Pub Dt:
|
03/06/2014
| | | | |
Title:
|
FINFET WITH REDUCED PARASITIC CAPACITANCE
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|
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Patent #:
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|
Issue Dt:
|
11/18/2014
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Application #:
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13600324
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Filing Dt:
|
08/31/2012
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Publication #:
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|
Pub Dt:
|
03/06/2014
| | | | |
Title:
|
SUSPENDED NANOWIRE STRUCTURE
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|
|
Patent #:
|
|
Issue Dt:
|
11/10/2015
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Application #:
|
13600598
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Filing Dt:
|
08/31/2012
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Publication #:
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Pub Dt:
|
12/20/2012
| | | | |
Title:
|
PLANAR AND NANOWIRE FIELD EFFECT TRANSISTORS
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|
|
Patent #:
|
|
Issue Dt:
|
08/20/2013
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Application #:
|
13600625
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Filing Dt:
|
08/31/2012
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Title:
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SILICON GERMANIUM CHANNEL WITH SILICON BUFFER REGIONS FOR FIN FIELD EFFECT TRANSISTOR DEVICE
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|
|
Patent #:
|
|
Issue Dt:
|
03/31/2015
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Application #:
|
13601072
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Filing Dt:
|
08/31/2012
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Publication #:
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|
Pub Dt:
|
03/06/2014
| | | | |
Title:
|
METHOD OF FORMING A MATERIAL LAYER IN A SEMICONDUCTOR STRUCTURE
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|
|
Patent #:
|
|
Issue Dt:
|
08/05/2014
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Application #:
|
13601240
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Filing Dt:
|
08/31/2012
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Publication #:
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Pub Dt:
|
06/26/2014
| | | | |
Title:
|
CALIBRATION SCHEMES FOR CHARGE-RECYCLING STACKED VOLTAGE DOMAINS
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|
|
Patent #:
|
|
Issue Dt:
|
06/17/2014
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Application #:
|
13602117
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Filing Dt:
|
09/01/2012
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Publication #:
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Pub Dt:
|
12/27/2012
| | | | |
Title:
|
GRAPHENE TRANSISTOR WITH A SELF-ALIGNED GATE
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|
|
Patent #:
|
|
Issue Dt:
|
06/16/2015
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Application #:
|
13602118
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Filing Dt:
|
09/01/2012
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Publication #:
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Pub Dt:
|
01/03/2013
| | | | |
Title:
|
STRUCTURE AND METHOD TO OBTAIN EOT SCALED DIELECTRIC STACKS
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|
|
Patent #:
|
|
Issue Dt:
|
06/25/2013
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Application #:
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13602119
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Filing Dt:
|
09/01/2012
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Publication #:
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Pub Dt:
|
12/27/2012
| | | | |
Title:
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METHODS TO MITIGATE PLASMA DAMAGE IN ORGANOSILICATE DIELECTRICS
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|
|
Patent #:
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|
Issue Dt:
|
12/31/2013
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Application #:
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13602123
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Filing Dt:
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09/01/2012
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Publication #:
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Pub Dt:
|
12/27/2012
| | | | |
Title:
|
MATERIALS CONTAINING VOIDS WITH VOID SIZE CONTROLLED ON THE NANOMETER SCALE
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|
|
Patent #:
|
|
Issue Dt:
|
06/16/2015
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Application #:
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13602126
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Filing Dt:
|
09/01/2012
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Publication #:
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Pub Dt:
|
01/03/2013
| | | | |
Title:
|
INTERCONNECT STRUCTURES CONTAINING A PHOTO-PATTERNABLE
LOW-K DIELECTRIC WITH A CURVED SIDEWALL SURFACE
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|
|
Patent #:
|
|
Issue Dt:
|
06/10/2014
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Application #:
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13602164
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Filing Dt:
|
09/02/2012
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Publication #:
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Pub Dt:
|
12/27/2012
| | | | |
Title:
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IMPLEMENTING DUAL SPEED LEVEL SHIFTER WITH AUTOMATIC MODE CONTROL
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|
|
Patent #:
|
|
Issue Dt:
|
09/02/2014
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Application #:
|
13602777
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Filing Dt:
|
09/04/2012
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Publication #:
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Pub Dt:
|
01/02/2014
| | | | |
Title:
|
3-D STACKED MULTIPROCESSOR STRUCTURES AND METHODS TO ENABLE RELIABLE OPERATION OF PROCESSORS AT SPEEDS ABOVE SPECIFIED LIMITS
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|
|
Patent #:
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|
Issue Dt:
|
10/14/2014
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Application #:
|
13602839
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Filing Dt:
|
09/04/2012
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Publication #:
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Pub Dt:
|
03/06/2014
| | | | |
Title:
|
SEMICONDUCTOR DEVICE INCORPORATING A MULTI-FUNCTION LAYER INTO GATE STACKS
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|
|
Patent #:
|
|
Issue Dt:
|
07/23/2013
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Application #:
|
13602957
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Filing Dt:
|
09/04/2012
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Publication #:
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Pub Dt:
|
12/27/2012
| | | | |
Title:
|
HOMOGENEOUS POROUS LOW DIELECTRIC CONSTANT MATERIALS
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|
|
Patent #:
|
|
Issue Dt:
|
12/22/2015
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Application #:
|
13603008
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Filing Dt:
|
09/04/2012
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Publication #:
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Pub Dt:
|
12/27/2012
| | | | |
Title:
|
LOW k POROUS SiCOH DIELECTRIC AND INTEGRATION WITH POST FILM FORMATION TREATMENT
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|
|
Patent #:
|
|
Issue Dt:
|
11/12/2013
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Application #:
|
13603052
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Filing Dt:
|
09/04/2012
|
Title:
|
SYSTEM AND METHOD FOR GENERATING A WIRE MODEL
|
|
|
Patent #:
|
|
Issue Dt:
|
06/04/2013
|
Application #:
|
13603086
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Filing Dt:
|
09/04/2012
|
Publication #:
|
|
Pub Dt:
|
01/03/2013
| | | | |
Title:
|
SOLID STATE KLYSTRON
|
|
|
Patent #:
|
|
Issue Dt:
|
12/24/2013
|
Application #:
|
13603110
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Filing Dt:
|
09/04/2012
|
Publication #:
|
|
Pub Dt:
|
12/27/2012
| | | | |
Title:
|
SOLID STATE KLYSTRON
|
|
|
Patent #:
|
|
Issue Dt:
|
05/06/2014
|
Application #:
|
13603304
|
Filing Dt:
|
09/04/2012
|
Publication #:
|
|
Pub Dt:
|
03/06/2014
| | | | |
Title:
|
METHOD TO ENHANCE DOUBLE PATTERNING ROUTING EFFICIENCY
|
|
|
Patent #:
|
|
Issue Dt:
|
11/04/2014
|
Application #:
|
13603513
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Filing Dt:
|
09/05/2012
|
Publication #:
|
|
Pub Dt:
|
03/06/2014
| | | | |
Title:
|
LOW RESISTIVITY GATE CONDUCTOR
|
|