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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:049490/0001   Pages: 892
Recorded: 11/29/2018
Conveyance: SECURITY AGREEMENT
1
Patent #:
Issue Dt:
11/03/2015
Application #:
13572039
Filing Dt:
08/10/2012
Publication #:
Pub Dt:
12/06/2012
Title:
METHOD FOR FABRICATING MOSFET ON SILICON-ON-INSULATOR WITH INTERNAL BODY CONTACT
2
Patent #:
Issue Dt:
09/09/2014
Application #:
13572114
Filing Dt:
08/10/2012
Publication #:
Pub Dt:
12/06/2012
Title:
NANOWIRE FET WITH TRAPEZOID GATE STRUCTURE
3
Patent #:
Issue Dt:
09/03/2013
Application #:
13572289
Filing Dt:
08/10/2012
Title:
RELIABLE PHYSICAL UNCLONABLE FUNCTION FOR DEVICE AUTHENTICATION
4
Patent #:
Issue Dt:
02/24/2015
Application #:
13572343
Filing Dt:
08/10/2012
Publication #:
Pub Dt:
02/13/2014
Title:
INTEGRATED CIRCUITS WITH IMPROVED SPACERS AND METHODS FOR FABRICATING SAME
5
Patent #:
Issue Dt:
10/29/2013
Application #:
13572742
Filing Dt:
08/13/2012
Publication #:
Pub Dt:
12/06/2012
Title:
BEOL COMPATIBLE FET STRUCTRURE
6
Patent #:
Issue Dt:
09/17/2013
Application #:
13572954
Filing Dt:
08/13/2012
Title:
SYSTEM YIELD OPTIMIZATION USING THE RESULTS OF INTEGRATED CIRCUIT CHIP PERFORMANCE PATH TESTING
7
Patent #:
Issue Dt:
04/15/2014
Application #:
13572988
Filing Dt:
08/13/2012
Publication #:
Pub Dt:
02/13/2014
Title:
COMPUTING MULTI-MAGNET BASED DEVICES AND METHODS FOR SOLUTION OF OPTIMIZATION PROBLEMS
8
Patent #:
Issue Dt:
07/15/2014
Application #:
13573000
Filing Dt:
08/13/2012
Publication #:
Pub Dt:
12/06/2012
Title:
DETERMINING CELL-STATE IN PHASE-CHANGE MEMORY
9
Patent #:
Issue Dt:
09/03/2013
Application #:
13584055
Filing Dt:
08/13/2012
Title:
METHODS OF FORMING SEMICONDUCTOR DEVICES WITH SELF-ALIGNED CONTACTS AND LOW-K SPACERS AND THE RESULTING DEVICES
10
Patent #:
Issue Dt:
09/16/2014
Application #:
13584120
Filing Dt:
10/28/2012
Publication #:
Pub Dt:
04/03/2014
Title:
MULTI-BIT RESISTANCE MEASUREMENT
11
Patent #:
Issue Dt:
09/16/2014
Application #:
13584156
Filing Dt:
08/13/2012
Publication #:
Pub Dt:
02/13/2014
Title:
STRUCTURE AND METHOD TO FORM INPUT/OUTPUT DEVICES
12
Patent #:
Issue Dt:
09/23/2014
Application #:
13584176
Filing Dt:
08/13/2012
Publication #:
Pub Dt:
02/13/2014
Title:
HIGH DENSITY BULK FIN CAPACITOR
13
Patent #:
Issue Dt:
06/03/2014
Application #:
13584199
Filing Dt:
08/13/2012
Publication #:
Pub Dt:
02/13/2014
Title:
CONTACTS-FIRST SELF-ALIGNED CARBON NANOTUBE TRANSISTOR WITH GATE-ALL-AROUND
14
Patent #:
Issue Dt:
05/17/2016
Application #:
13584326
Filing Dt:
08/13/2012
Publication #:
Pub Dt:
08/28/2014
Title:
TWO MASK PROCESS FOR ELECTROPLATING METAL EMPLOYING A NEGATIVE ELECTROPHORETIC PHOTORESIST
15
Patent #:
Issue Dt:
12/02/2014
Application #:
13584423
Filing Dt:
08/13/2012
Publication #:
Pub Dt:
01/23/2014
Title:
DECODING SCHEME FOR BIPOLAR-BASED DIODE THREE-DIMENSIONAL MEMORY REQUIRING UNIPOLAR PROGRAMMING
16
Patent #:
Issue Dt:
05/06/2014
Application #:
13584981
Filing Dt:
08/14/2012
Publication #:
Pub Dt:
02/20/2014
Title:
METHODS OF FORMING ISOLATION STRUCTURES FOR SEMICONDUCTOR DEVICES BY PERFORMING A DRY CHEMICAL REMOVAL PROCESS
17
Patent #:
Issue Dt:
12/17/2013
Application #:
13585152
Filing Dt:
08/14/2012
Title:
IDENTIFICATION OF ILLEGAL DEVICES USING CONTACT MAPPING
18
Patent #:
Issue Dt:
06/03/2014
Application #:
13585395
Filing Dt:
08/14/2012
Publication #:
Pub Dt:
02/20/2014
Title:
FIN STRUCTURE FORMATION INCLUDING PARTIAL SPACER REMOVAL
19
Patent #:
Issue Dt:
06/17/2014
Application #:
13585465
Filing Dt:
08/14/2012
Publication #:
Pub Dt:
02/13/2014
Title:
DOUBLE CONTACTS FOR CARBON NANOTUBES THIN FILM DEVICES
20
Patent #:
Issue Dt:
03/11/2014
Application #:
13585974
Filing Dt:
08/15/2012
Publication #:
Pub Dt:
02/20/2014
Title:
METHODS OF THINNING AND/OR DICING SEMICONDUCTING SUBSTRATES HAVING INTEGRATED CIRCUIT PRODUCTS FORMED THEREON
21
Patent #:
Issue Dt:
02/10/2015
Application #:
13586136
Filing Dt:
08/15/2012
Publication #:
Pub Dt:
02/20/2014
Title:
MEMORY CELL ASSEMBLY INCLUDING AN AVOID DISTURB CELL
22
Patent #:
Issue Dt:
11/05/2013
Application #:
13586182
Filing Dt:
08/15/2012
Title:
MULTI-ELEMENT PACKAGING OF CONCENTRATOR PHOTOVOLTAIC CELLS
23
Patent #:
Issue Dt:
01/28/2014
Application #:
13586187
Filing Dt:
08/15/2012
Publication #:
Pub Dt:
01/30/2014
Title:
PHOTONIC MODULATOR WITH A SEMICONDUCTOR CONTACT
24
Patent #:
Issue Dt:
07/08/2014
Application #:
13587088
Filing Dt:
08/16/2012
Publication #:
Pub Dt:
05/29/2014
Title:
TONE INVERSION OF SELF-ASSEMBLED SELF-ALIGNED STRUCTURES
25
Patent #:
Issue Dt:
10/15/2013
Application #:
13587146
Filing Dt:
08/16/2012
Title:
WRITING SCHEME FOR PHASE CHANGE MATERIAL-CONTENT ADDRESSABLE MEMORY
26
Patent #:
Issue Dt:
03/31/2015
Application #:
13587288
Filing Dt:
08/16/2012
Publication #:
Pub Dt:
02/20/2014
Title:
METHOD OF MANUFACTURING A BODY-CONTACTED SOI FINFET
27
Patent #:
Issue Dt:
03/18/2014
Application #:
13587508
Filing Dt:
08/16/2012
Publication #:
Pub Dt:
02/13/2014
Title:
CONTACTS-FIRST SELF-ALIGNED CARBON NANOTUBE TRANSISTOR WITH GATE-ALL-AROUND
28
Patent #:
Issue Dt:
12/17/2013
Application #:
13587521
Filing Dt:
08/16/2012
Title:
USE OF GRAPHENE TO LIMIT COPPER SURFACE OXIDATION, DIFFUSION AND ELECTROMIGRATION IN INTERCONNECT STRUCTURES
29
Patent #:
Issue Dt:
04/21/2015
Application #:
13587694
Filing Dt:
08/16/2012
Publication #:
Pub Dt:
01/23/2014
Title:
SELF-ALIGNED PROCESS TO FABRICATE A MEMORY CELL ARRAY WITH A SURROUNDING-GATE ACCESS TRANSISTOR
30
Patent #:
Issue Dt:
07/01/2014
Application #:
13587970
Filing Dt:
08/17/2012
Publication #:
Pub Dt:
02/20/2014
Title:
REDUCING EDGE DIE REFLECTIVITY IN EXTREME ULTRAVIOLET LITHOGRAPHY
31
Patent #:
Issue Dt:
12/29/2015
Application #:
13587998
Filing Dt:
08/17/2012
Publication #:
Pub Dt:
02/20/2014
Title:
METHOD TO IMPROVE FINE CU LINE RELIABILITY IN AN INTEGRATED CIRCUIT DEVICE
32
Patent #:
Issue Dt:
09/24/2013
Application #:
13588059
Filing Dt:
08/17/2012
Title:
NOVEL REPLACEMENT GATE PROCESS FLOW FOR HIGHLY SCALED SEMICONDUCTOR DEVICES
33
Patent #:
Issue Dt:
09/24/2013
Application #:
13588218
Filing Dt:
08/17/2012
Publication #:
Pub Dt:
12/13/2012
Title:
COMPACT THERMALLY CONTROLLED THIN FILM RESISTORS UTILIZING SUBSTRATE CONTACTS AND METHODS OF MANUFACTURE
34
Patent #:
Issue Dt:
03/17/2015
Application #:
13588260
Filing Dt:
08/17/2012
Publication #:
Pub Dt:
01/23/2014
Title:
DATA CENTER COOLING SYSTEM
35
Patent #:
Issue Dt:
08/26/2014
Application #:
13588327
Filing Dt:
08/17/2012
Publication #:
Pub Dt:
02/20/2014
Title:
DEVICE COMPRISING A PLURALITY OF STATIC RANDOM ACCESS MEMORY CELLS AND METHOD OF OPERATION THEREOF
36
Patent #:
Issue Dt:
03/12/2013
Application #:
13588382
Filing Dt:
08/17/2012
Title:
HIGH DENSITY SELECTIVE DEPOSITION OF CARBON NANOTUBES ONTO A SUBSTRATE
37
Patent #:
Issue Dt:
06/24/2014
Application #:
13588460
Filing Dt:
08/17/2012
Publication #:
Pub Dt:
02/20/2014
Title:
COMPRESSIVE STRESS TRANSFER IN AN INTERLAYER DIELECTRIC OF A SEMICONDUCTOR DEVICE BY PROVIDING A BI-LAYER OF SUPERIOR ADHESION AND INTERNAL STRESS
38
Patent #:
Issue Dt:
12/22/2015
Application #:
13588517
Filing Dt:
08/17/2012
Publication #:
Pub Dt:
02/20/2014
Title:
METHODS OF FORMING A REPLACEMENT GATE STRUCTURE HAVING A GATE ELECTRODE COMPRISED OF A DEPOSITED INTERMETALLIC COMPOUND MATERIAL
39
Patent #:
Issue Dt:
02/18/2014
Application #:
13588585
Filing Dt:
08/17/2012
Publication #:
Pub Dt:
03/21/2013
Title:
METALLURGICAL CLAMSHELL METHODS FOR MICRO LAND GRID ARRAY FABRICATION
40
Patent #:
Issue Dt:
02/25/2014
Application #:
13588724
Filing Dt:
08/17/2012
Publication #:
Pub Dt:
02/20/2014
Title:
Techniques for Metal Gate Work Function Engineering to Enable Multiple Threshold Voltage Nanowire FET Devices
41
Patent #:
Issue Dt:
03/17/2015
Application #:
13589325
Filing Dt:
08/20/2012
Publication #:
Pub Dt:
08/29/2013
Title:
SEMI-AUTOMATIC CONVERSION AND EXECUTION OF FUNCTIONAL MANUAL TESTS
42
Patent #:
Issue Dt:
11/04/2014
Application #:
13589606
Filing Dt:
08/20/2012
Publication #:
Pub Dt:
12/06/2012
Title:
DEVICES WITH GATE-TO-GATE ISOLATION STRUCTURES AND METHODS OF MANUFACTURE
43
Patent #:
Issue Dt:
09/24/2013
Application #:
13589680
Filing Dt:
08/20/2012
Publication #:
Pub Dt:
02/21/2013
Title:
RECEIVER AND INTEGRATED AM-FM/IQ DEMODULATORS FOR GIGABIT-RATE DATA DETECTION
44
Patent #:
Issue Dt:
01/21/2014
Application #:
13589702
Filing Dt:
08/20/2012
Publication #:
Pub Dt:
02/21/2013
Title:
RECEIVER AND INTEGRATED AM-FM/IQ DEMODULATORS FOR GIGABIT-RATE DATA DETECTION
45
Patent #:
Issue Dt:
03/18/2014
Application #:
13589707
Filing Dt:
08/20/2012
Publication #:
Pub Dt:
02/20/2014
Title:
TECHNIQUES FOR GATE WORKFUNCTION ENGINEERING TO REDUCE SHORT CHANNEL EFFECTS IN PLANAR CMOS DEVICES
46
Patent #:
Issue Dt:
10/22/2013
Application #:
13590212
Filing Dt:
08/21/2012
Title:
FIELD EFFECT TRANSISTORS WITH LOW BODY RESISTANCE AND SELF-BALANCED BODY POTENTIAL
47
Patent #:
Issue Dt:
05/05/2015
Application #:
13590251
Filing Dt:
08/21/2012
Publication #:
Pub Dt:
02/27/2014
Title:
SENSING BIOMOLECULES USING SCANNING PROBE WITH TWIN- NANOPORE TO DETECT A CHANGE IN THE MAGNITUDE OF THE CURRENT THROUGH THE SECOND NANOPORE
48
Patent #:
Issue Dt:
08/27/2013
Application #:
13590300
Filing Dt:
08/21/2012
Publication #:
Pub Dt:
12/06/2012
Title:
SPATIAL CORRELATION-BASED ESTIMATION OF YIELD OF INTEGRATED CIRCUITS
49
Patent #:
Issue Dt:
05/12/2015
Application #:
13590556
Filing Dt:
08/21/2012
Publication #:
Pub Dt:
02/27/2014
Title:
FORMING A HARDMASK CAPPING LAYER
50
Patent #:
Issue Dt:
06/03/2014
Application #:
13592434
Filing Dt:
08/23/2012
Publication #:
Pub Dt:
02/27/2014
Title:
METHOD AND APPARATUS FOR APPLYING POST GRAPHIC DATA SYSTEM STREAM ENHANCEMENTS
51
Patent #:
Issue Dt:
10/27/2015
Application #:
13593590
Filing Dt:
08/24/2012
Publication #:
Pub Dt:
02/06/2014
Title:
RATE ADAPTIVE TRANSMISSION OF WIRELESS BROADCAST PACKETS
52
Patent #:
Issue Dt:
03/03/2015
Application #:
13593614
Filing Dt:
08/24/2012
Publication #:
Pub Dt:
02/27/2014
Title:
METHODS OF FORMING A LAYER OF SILICON ON A LAYER OF SILICON/GERMANIUM
53
Patent #:
Issue Dt:
05/27/2014
Application #:
13594037
Filing Dt:
08/24/2012
Publication #:
Pub Dt:
02/27/2014
Title:
GATE TUNABLE TUNNEL DIODE
54
Patent #:
Issue Dt:
02/25/2014
Application #:
13594198
Filing Dt:
08/24/2012
Publication #:
Pub Dt:
12/20/2012
Title:
OPTIMIZATION OF A MANUFACTURING PROCESS OF AN INTEGRATED CIRCUIT LAYOUT
55
Patent #:
Issue Dt:
10/07/2014
Application #:
13594292
Filing Dt:
08/24/2012
Publication #:
Pub Dt:
02/27/2014
Title:
CIRCULAR TRANSMISSION LINE METHODS COMPATIBLE WITH COMBINATORIAL PROCESSING OF SEMICONDUCTORS
56
Patent #:
Issue Dt:
04/29/2014
Application #:
13595025
Filing Dt:
08/27/2012
Publication #:
Pub Dt:
03/07/2013
Title:
IMPLANT FREE EXTREMELY THIN SEMICONDUCTOR DEVICES
57
Patent #:
Issue Dt:
03/31/2015
Application #:
13595208
Filing Dt:
08/27/2012
Publication #:
Pub Dt:
02/27/2014
Title:
SEMICONDUCTOR DEVICES AND METHODS OF FORMING THE SEMICONDUCTOR DEVICES INCLUDING A RETROGRADE WELL
58
Patent #:
Issue Dt:
07/23/2013
Application #:
13595432
Filing Dt:
08/27/2012
Title:
HIGH DENSITY SELECTIVE DEPOSITION OF CARBON NANOTUBES ONTO A SUBSTRATE
59
Patent #:
Issue Dt:
12/02/2014
Application #:
13595574
Filing Dt:
08/27/2012
Publication #:
Pub Dt:
02/27/2014
Title:
METHOD OF FORMING HARDMASK LAYER WITH ALTERNATING NANOLAYERS
60
Patent #:
Issue Dt:
11/05/2013
Application #:
13595650
Filing Dt:
08/27/2012
Publication #:
Pub Dt:
03/28/2013
Title:
LITHOGRAPHIC CD CORRECTION BY SECOND EXPOSURE
61
Patent #:
Issue Dt:
02/11/2014
Application #:
13596126
Filing Dt:
08/28/2012
Publication #:
Pub Dt:
03/06/2014
Title:
METHOD FOR POST DECOMPOSITION DENSITY BALANCING IN INTEGRATED CIRCUIT LAYOUTS, RELATED SYSTEM AND PROGRAM PRODUCT
62
Patent #:
Issue Dt:
01/07/2014
Application #:
13596140
Filing Dt:
08/28/2012
Title:
DENSITY BALANCING IN MULTIPLE PATTERNING LITHOGRAPHY USING INTEGRATED CIRCUIT LAYOUT FILL
63
Patent #:
Issue Dt:
03/11/2014
Application #:
13596198
Filing Dt:
08/28/2012
Publication #:
Pub Dt:
03/06/2014
Title:
BEOL INTEGRATION SCHEME FOR COPPER CMP TO PREVENT DENDRITE FORMATION
64
Patent #:
Issue Dt:
01/20/2015
Application #:
13596234
Filing Dt:
08/28/2012
Publication #:
Pub Dt:
02/06/2014
Title:
EPITAXIALLY THICKENED DOPED OR UNDOPED CORE NANOWIRE FET STRUCTURE AND METHOD FOR INCREASING EFFECTIVE DEVICE WIDTH
65
Patent #:
Issue Dt:
09/02/2014
Application #:
13596251
Filing Dt:
08/28/2012
Publication #:
Pub Dt:
02/27/2014
Title:
SCANNING PROBE WITH TWIN-NANOPORE OR A-SINGLE-NANOPORE FOR SENSING BIOMOLECULES
66
Patent #:
Issue Dt:
06/16/2015
Application #:
13596351
Filing Dt:
08/28/2012
Publication #:
Pub Dt:
12/20/2012
Title:
ENCODING A DATA WORD FOR WRITING THE ENCODED DATA WORD IN A MULTI-LEVEL SOLID STATE MEMORY
67
Patent #:
Issue Dt:
11/18/2014
Application #:
13596410
Filing Dt:
08/28/2012
Publication #:
Pub Dt:
12/20/2012
Title:
SHIELDING FOR HIGH-VOLTAGE SEMICONDUCTOR-ON-INSULATOR DEVICES
68
Patent #:
Issue Dt:
03/11/2014
Application #:
13596687
Filing Dt:
08/28/2012
Publication #:
Pub Dt:
03/06/2014
Title:
TECHNIQUES FOR METAL GATE WORKFUNCTION ENGINEERING TO ENABLE MULTIPLE THRESHOLD VOLTAGE FINFET DEVICES
69
Patent #:
Issue Dt:
02/24/2015
Application #:
13596808
Filing Dt:
08/28/2012
Publication #:
Pub Dt:
03/06/2014
Title:
METHOD AND DEVICE TO ACHIEVE SELF-STOP AND PRECISE GATE HEIGHT
70
Patent #:
Issue Dt:
05/28/2013
Application #:
13597331
Filing Dt:
08/29/2012
Publication #:
Pub Dt:
12/20/2012
Title:
BORDERLESS CONTACTS FOR SEMICONDUCTOR DEVICES
71
Patent #:
Issue Dt:
06/17/2014
Application #:
13597412
Filing Dt:
08/29/2012
Publication #:
Pub Dt:
03/06/2014
Title:
PLATED LAMINATION STRUCTURES FOR INTEGRATED MAGNETIC DEVICES
72
Patent #:
Issue Dt:
02/17/2015
Application #:
13597610
Filing Dt:
08/29/2012
Publication #:
Pub Dt:
02/27/2014
Title:
GATE TUNABLE TUNNEL DIODE
73
Patent #:
Issue Dt:
06/23/2015
Application #:
13597752
Filing Dt:
08/29/2012
Publication #:
Pub Dt:
03/06/2014
Title:
SUBLITHOGRAPHIC WIDTH FINFET EMPLOYING SOLID PHASE EPITAXY
74
Patent #:
Issue Dt:
05/19/2015
Application #:
13597799
Filing Dt:
08/29/2012
Publication #:
Pub Dt:
03/06/2014
Title:
SEMICONDUCTOR FIN ON LOCAL OXIDE
75
Patent #:
Issue Dt:
02/25/2014
Application #:
13597802
Filing Dt:
08/29/2012
Publication #:
Pub Dt:
02/20/2014
Title:
Techniques for Metal Gate Work Function Engineering to Enable Multiple Threshold Voltage Nanowire FET Devices
76
Patent #:
Issue Dt:
06/16/2015
Application #:
13598001
Filing Dt:
08/29/2012
Publication #:
Pub Dt:
03/06/2014
Title:
DRAM REFRESH
77
Patent #:
Issue Dt:
01/13/2015
Application #:
13598080
Filing Dt:
08/29/2012
Publication #:
Pub Dt:
03/06/2014
Title:
FINFET WITH SELF-ALIGNED PUNCHTHROUGH STOPPER
78
Patent #:
Issue Dt:
06/16/2015
Application #:
13598787
Filing Dt:
08/30/2012
Publication #:
Pub Dt:
03/06/2014
Title:
SRAM LOCAL EVALUATION LOGIC FOR COLUMN SELECTION
79
Patent #:
Issue Dt:
07/01/2014
Application #:
13599256
Filing Dt:
08/30/2012
Publication #:
Pub Dt:
03/06/2014
Title:
DOPING OF COPPER WIRING STRUCTURES IN BACK END OF LINE PROCESSING
80
Patent #:
Issue Dt:
02/03/2015
Application #:
13600314
Filing Dt:
08/31/2012
Publication #:
Pub Dt:
03/06/2014
Title:
FINFET WITH REDUCED PARASITIC CAPACITANCE
81
Patent #:
Issue Dt:
11/18/2014
Application #:
13600324
Filing Dt:
08/31/2012
Publication #:
Pub Dt:
03/06/2014
Title:
SUSPENDED NANOWIRE STRUCTURE
82
Patent #:
Issue Dt:
11/10/2015
Application #:
13600598
Filing Dt:
08/31/2012
Publication #:
Pub Dt:
12/20/2012
Title:
PLANAR AND NANOWIRE FIELD EFFECT TRANSISTORS
83
Patent #:
Issue Dt:
08/20/2013
Application #:
13600625
Filing Dt:
08/31/2012
Title:
SILICON GERMANIUM CHANNEL WITH SILICON BUFFER REGIONS FOR FIN FIELD EFFECT TRANSISTOR DEVICE
84
Patent #:
Issue Dt:
03/31/2015
Application #:
13601072
Filing Dt:
08/31/2012
Publication #:
Pub Dt:
03/06/2014
Title:
METHOD OF FORMING A MATERIAL LAYER IN A SEMICONDUCTOR STRUCTURE
85
Patent #:
Issue Dt:
08/05/2014
Application #:
13601240
Filing Dt:
08/31/2012
Publication #:
Pub Dt:
06/26/2014
Title:
CALIBRATION SCHEMES FOR CHARGE-RECYCLING STACKED VOLTAGE DOMAINS
86
Patent #:
Issue Dt:
06/17/2014
Application #:
13602117
Filing Dt:
09/01/2012
Publication #:
Pub Dt:
12/27/2012
Title:
GRAPHENE TRANSISTOR WITH A SELF-ALIGNED GATE
87
Patent #:
Issue Dt:
06/16/2015
Application #:
13602118
Filing Dt:
09/01/2012
Publication #:
Pub Dt:
01/03/2013
Title:
STRUCTURE AND METHOD TO OBTAIN EOT SCALED DIELECTRIC STACKS
88
Patent #:
Issue Dt:
06/25/2013
Application #:
13602119
Filing Dt:
09/01/2012
Publication #:
Pub Dt:
12/27/2012
Title:
METHODS TO MITIGATE PLASMA DAMAGE IN ORGANOSILICATE DIELECTRICS
89
Patent #:
Issue Dt:
12/31/2013
Application #:
13602123
Filing Dt:
09/01/2012
Publication #:
Pub Dt:
12/27/2012
Title:
MATERIALS CONTAINING VOIDS WITH VOID SIZE CONTROLLED ON THE NANOMETER SCALE
90
Patent #:
Issue Dt:
06/16/2015
Application #:
13602126
Filing Dt:
09/01/2012
Publication #:
Pub Dt:
01/03/2013
Title:
INTERCONNECT STRUCTURES CONTAINING A PHOTO-PATTERNABLE LOW-K DIELECTRIC WITH A CURVED SIDEWALL SURFACE
91
Patent #:
Issue Dt:
06/10/2014
Application #:
13602164
Filing Dt:
09/02/2012
Publication #:
Pub Dt:
12/27/2012
Title:
IMPLEMENTING DUAL SPEED LEVEL SHIFTER WITH AUTOMATIC MODE CONTROL
92
Patent #:
Issue Dt:
09/02/2014
Application #:
13602777
Filing Dt:
09/04/2012
Publication #:
Pub Dt:
01/02/2014
Title:
3-D STACKED MULTIPROCESSOR STRUCTURES AND METHODS TO ENABLE RELIABLE OPERATION OF PROCESSORS AT SPEEDS ABOVE SPECIFIED LIMITS
93
Patent #:
Issue Dt:
10/14/2014
Application #:
13602839
Filing Dt:
09/04/2012
Publication #:
Pub Dt:
03/06/2014
Title:
SEMICONDUCTOR DEVICE INCORPORATING A MULTI-FUNCTION LAYER INTO GATE STACKS
94
Patent #:
Issue Dt:
07/23/2013
Application #:
13602957
Filing Dt:
09/04/2012
Publication #:
Pub Dt:
12/27/2012
Title:
HOMOGENEOUS POROUS LOW DIELECTRIC CONSTANT MATERIALS
95
Patent #:
Issue Dt:
12/22/2015
Application #:
13603008
Filing Dt:
09/04/2012
Publication #:
Pub Dt:
12/27/2012
Title:
LOW k POROUS SiCOH DIELECTRIC AND INTEGRATION WITH POST FILM FORMATION TREATMENT
96
Patent #:
Issue Dt:
11/12/2013
Application #:
13603052
Filing Dt:
09/04/2012
Title:
SYSTEM AND METHOD FOR GENERATING A WIRE MODEL
97
Patent #:
Issue Dt:
06/04/2013
Application #:
13603086
Filing Dt:
09/04/2012
Publication #:
Pub Dt:
01/03/2013
Title:
SOLID STATE KLYSTRON
98
Patent #:
Issue Dt:
12/24/2013
Application #:
13603110
Filing Dt:
09/04/2012
Publication #:
Pub Dt:
12/27/2012
Title:
SOLID STATE KLYSTRON
99
Patent #:
Issue Dt:
05/06/2014
Application #:
13603304
Filing Dt:
09/04/2012
Publication #:
Pub Dt:
03/06/2014
Title:
METHOD TO ENHANCE DOUBLE PATTERNING ROUTING EFFICIENCY
100
Patent #:
Issue Dt:
11/04/2014
Application #:
13603513
Filing Dt:
09/05/2012
Publication #:
Pub Dt:
03/06/2014
Title:
LOW RESISTIVITY GATE CONDUCTOR
Assignor
1
Exec Dt:
11/27/2018
Assignee
1
1100 NORTH MARKET STREET
WILMINGTON, DELAWARE 19801
Correspondence name and address
CT CORPORATION
4400 EASTON COMMONS WAY
SUITE 125
COLUMBUS, OH 43219

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