Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 049657/0037 | |
| Pages: | 9 |
| | Recorded: | 07/02/2019 | | |
| Attorney Dkt #: | G3696-00001 |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
6
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Patent #:
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Issue Dt:
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07/02/2019
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Application #:
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16200997
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Filing Dt:
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11/27/2018
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Publication #:
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Pub Dt:
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03/28/2019
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Title:
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Method of Maintaining the State of Semiconductor Memory Having Electrically Floating Body Transistor
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Patent #:
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Issue Dt:
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07/09/2019
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Application #:
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16239758
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Filing Dt:
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01/04/2019
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Publication #:
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Pub Dt:
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05/09/2019
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Title:
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Compact Semiconductor Memory Device Having Reduced Number of Contacts, Methods of Operating and Methods of Making
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Patent #:
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Issue Dt:
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08/20/2019
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Application #:
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16239945
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Filing Dt:
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01/04/2019
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Publication #:
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Pub Dt:
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05/23/2019
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Title:
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Semiconductor Device Having Electrically Floating Body Transistor, Semiconductor Device Having Both Volatile and Non-Volatile Functionality and Method of Operating
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Patent #:
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Issue Dt:
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09/03/2019
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Application #:
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16273629
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Filing Dt:
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02/12/2019
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Publication #:
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Pub Dt:
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06/20/2019
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Title:
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MEMORY CELLS, MEMORY CELL ARRAYS, METHODS OF USING AND METHODS OF MAKING
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Patent #:
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Issue Dt:
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10/22/2019
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Application #:
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16404964
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Filing Dt:
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05/07/2019
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Publication #:
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Pub Dt:
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08/22/2019
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Title:
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Method of Maintaining the State of Semiconductor Memory Having Electrically Floating Body Transistor
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Patent #:
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Issue Dt:
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10/29/2019
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Application #:
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16408649
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Filing Dt:
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05/10/2019
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Publication #:
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Pub Dt:
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08/29/2019
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Title:
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Compact Semiconductor Memory Device Having Reduced Number of Contacts, Methods of Operating and Methods of Making
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Assignee
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| 1171 SONORA COURT |
| SUNNYVALE, CALIFORNIA 94086 |
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Correspondence name and address
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RIMON LAW
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2479 E. BAYSHORE ROAD
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SUITE 210
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PALO ALTO, CA 94303
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