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Reel/Frame:	049709/0871			Pages:	19
		Recorded:	07/10/2019
Conveyance:	ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 269
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Patent #:	6312793	Issue Dt:	11/06/2001	Application #:	09320495	Filing Dt:	05/26/1999
Title:	MULTIPHASE LOW DIELECTRIC CONSTANT MATERIAL AND METHOD OF DEPOSITION

Patent #:	6784485	Issue Dt:	08/31/2004	Application #:	09502729	Filing Dt:	02/11/2000
Title:	DIFFUSION BARRIER LAYER AND SEMICONDUCTOR DEVICE CONTAINING SAME

Patent #:	6627998	Issue Dt:	09/30/2003	Application #:	09626904	Filing Dt:	07/27/2000
Title:	WAFER SCALE THIN FILM PACKAGE

Patent #:	6838015	Issue Dt:	01/04/2005	Application #:	09945596	Filing Dt:	09/04/2001
Publication #:	US20030045117	Pub Dt:	03/06/2003
Title:	LIQUID OR SUPERCRITICAL CARBON DIOXIDE COMPOSITION

Patent #:	6437443	Issue Dt:	08/20/2002	Application #:	09966834	Filing Dt:	09/27/2001
Publication #:	US20020034625	Pub Dt:	03/21/2002
Title:	MULTIPHASE LOW DIELECTRIC CONSTANT MATERIAL AND METHOD OF DEPOSITION

Patent #:	6479110	Issue Dt:	11/12/2002	Application #:	09966836	Filing Dt:	09/27/2001
Publication #:	US20020037442	Pub Dt:	03/28/2002
Title:	MULTIPHASE LOW DIELECTRIC CONSTANT MATERIAL AND METHOD OF DEPOSITION

Patent #:	7064416	Issue Dt:	06/20/2006	Application #:	09991142	Filing Dt:	11/16/2001
Publication #:	US20030094673	Pub Dt:	05/22/2003
Title:	SEMICONDUCTOR DEVICE AND METHOD HAVING MULTIPLE SUBCOLLECTORS FORMED ON A COMMON WAFER

Patent #:	6682872	Issue Dt:	01/27/2004	Application #:	10056245	Filing Dt:	01/22/2002
Publication #:	US20030138733	Pub Dt:	07/24/2003
Title:	UV-CURABLE COMPOSITIONS AND METHOD OF USE THEREOF IN MICROELECTRONICS

Patent #:	6933566	Issue Dt:	08/23/2005	Application #:	10059422	Filing Dt:	01/31/2002
Publication #:	US20030008521	Pub Dt:	01/09/2003
Title:	METHOD OF FORMING LATTICE-MATCHED STRUCTURE ON SILICON AND STRUCTURE FORMED THEREBY

Patent #:	7381276	Issue Dt:	06/03/2008	Application #:	10064451	Filing Dt:	07/16/2002
Publication #:	US20040011293	Pub Dt:	01/22/2004
Title:	SUSCEPTOR POCKET WITH BEVELED PROJECTION SIDEWALL

Patent #:	6888251	Issue Dt:	05/03/2005	Application #:	10186814	Filing Dt:	07/01/2002
Publication #:	US20040000721	Pub Dt:	01/01/2004
Title:	METAL SPACER IN SINGLE AND DUAL DAMASCENE PROCESSING

Patent #:	6887798	Issue Dt:	05/03/2005	Application #:	10250047	Filing Dt:	05/30/2003
Publication #:	US20040242010	Pub Dt:	12/02/2004
Title:	STI STRESS MODIFICATION BY NITROGEN PLASMA TREATMENT FOR IMPROVING PERFORMANCE IN SMALL WIDTH DEVICES

Patent #:	7252875	Issue Dt:	08/07/2007	Application #:	10320111	Filing Dt:	12/16/2002
Publication #:	US20040115407	Pub Dt:	06/17/2004
Title:	DIFFUSION BARRIER WITH LOW DIELECTRIC CONSTANT AND SEMICONDUCTOR DEVICE CONTAINING SAME

Patent #:	6849530	Issue Dt:	02/01/2005	Application #:	10334337	Filing Dt:	12/30/2002
Publication #:	US20040043590	Pub Dt:	03/04/2004
Title:	METHOD FOR SEMICONDUCTOR GATE LINE DIMENSION REDUCTION

Patent #:	7348261	Issue Dt:	03/25/2008	Application #:	10438947	Filing Dt:	05/15/2003
Publication #:	US20030199121	Pub Dt:	10/23/2003
Title:	WAFER SCALE THIN FILM PACKAGE

Patent #:	7378710	Issue Dt:	05/27/2008	Application #:	10539335	Filing Dt:	06/15/2005
Publication #:	US20060068531	Pub Dt:	03/30/2006
Title:	FINFET SRAM CELL USING INVERTED FINFET THIN FILM TRANSISTORS

Patent #:	6936522	Issue Dt:	08/30/2005	Application #:	10604102	Filing Dt:	06/26/2003
Publication #:	US20040262695	Pub Dt:	12/30/2004
Title:	SELECTIVE SILICON-ON-INSULATOR ISOLATION STRUCTURE AND METHOD

Patent #:	6955737	Issue Dt:	10/18/2005	Application #:	10604191	Filing Dt:	06/30/2003
Publication #:	US20040265537	Pub Dt:	12/30/2004
Title:	SUPPORTED GREENSHEET STRUCTURE AND METHOD IN MLC PROCESSING

Patent #:	6812105	Issue Dt:	11/02/2004	Application #:	10604382	Filing Dt:	07/16/2003
Title:	ULTRA-THIN CHANNEL DEVICE WITH RAISED SOURCE AND DRAIN AND SOLID SOURCE EXTENSION DOPING

Patent #:	6803660	Issue Dt:	10/12/2004	Application #:	10627790	Filing Dt:	07/25/2003
Title:	PATTERNING LAYERS COMPRISED OF SPIN-ON CERAMIC FILMS

Patent #:	7378738	Issue Dt:	05/27/2008	Application #:	10653476	Filing Dt:	09/02/2003
Publication #:	US20050045997	Pub Dt:	03/03/2005
Title:	METHOD FOR PRODUCING SELF-ALIGNED MASK, ARTICLES PRODUCED BY SAME AND COMPOSITION FOR SAME

Patent #:	7384868	Issue Dt:	06/10/2008	Application #:	10662900	Filing Dt:	09/15/2003
Publication #:	US20050059242	Pub Dt:	03/17/2005
Title:	REDUCTION OF SILICIDE FORMATION TEMPERATURE ON SIGE CONTAINING SUBSTRATES

Patent #:	7361991	Issue Dt:	04/22/2008	Application #:	10666564	Filing Dt:	09/19/2003
Publication #:	US20050062165	Pub Dt:	03/24/2005
Title:	Closed air gap interconnect structure

Patent #:	7187081	Issue Dt:	03/06/2007	Application #:	10699238	Filing Dt:	10/31/2003
Publication #:	US20040147111	Pub Dt:	07/29/2004
Title:	POLYCARBOSILANE BURIED ETCH STOPS IN INTERCONNECT STRUCTURES

Patent #:	7951660	Issue Dt:	05/31/2011	Application #:	10703355	Filing Dt:	11/07/2003
Publication #:	US20050098804	Pub Dt:	05/12/2005
Title:	METHODS FOR FABRICATING A METAL-OXIDE-SEMICONDUCTOR DEVICE STRUCTURE

Patent #:	7098537	Issue Dt:	08/29/2006	Application #:	10707117	Filing Dt:	11/21/2003
Publication #:	US20050110144	Pub Dt:	05/26/2005
Title:	INTERCONNECT STRUCTURE DIFFUSION BARRIER WITH HIGH NITROGEN CONTENT

Patent #:	7015150	Issue Dt:	03/21/2006	Application #:	10709747	Filing Dt:	05/26/2004
Publication #:	US20050266698	Pub Dt:	12/01/2005
Title:	EXPOSED PORE SEALING POST PATTERNING

Patent #:	7303994	Issue Dt:	12/04/2007	Application #:	10710034	Filing Dt:	06/14/2004
Publication #:	US20050277266	Pub Dt:	12/15/2005
Title:	PROCESS FOR INTERFACIAL ADHESION IN LAMINATE STRUCTURES THROUGH PATTERNED ROUGHING OF A SURFACE

Patent #:	7404874	Issue Dt:	07/29/2008	Application #:	10710226	Filing Dt:	06/28/2004
Publication #:	US20050284576	Pub Dt:	12/29/2005
Title:	METHOD AND APPARATUS FOR TREATING WAFER EDGE REGION WITH TOROIDAL PLASMA

Patent #:	7390748	Issue Dt:	06/24/2008	Application #:	10710827	Filing Dt:	08/05/2004
Publication #:	US20060030154	Pub Dt:	02/09/2006
Title:	METHOD OF FORMING A POLISHING INHIBITING LAYER USING A SLURRY HAVING AN ADDITIVE

Patent #:	7253098	Issue Dt:	08/07/2007	Application #:	10711145	Filing Dt:	08/27/2004
Publication #:	US20060043590	Pub Dt:	03/02/2006
Title:	MAINTAINING UNIFORM CMP HARD MASK THICKNESS

Patent #:	7112470	Issue Dt:	09/26/2006	Application #:	10711383	Filing Dt:	09/15/2004
Publication #:	US20060057822	Pub Dt:	03/16/2006
Title:	CHIP DICING

Patent #:	7112470	Issue Dt:	09/26/2006	Application #:	10711383	Filing Dt:	09/15/2004
Publication #:	US20060057822	Pub Dt:	03/16/2006
Title:	CHIP DICING

Patent #:	NONE	Issue Dt:		Application #:	10717279	Filing Dt:	11/19/2003
Publication #:	US20050104092	Pub Dt:	05/19/2005
Title:	SEMICONDUCTOR FIELD-EFFECT TRANSISTOR FORMED ON A STRAINED-LAYER HAVING THREADING DISLOCATION EXTEND CONTINOUSLY BETWEEN THE SOURCE AND DRAIN REGIONS

Patent #:	7365001	Issue Dt:	04/29/2008	Application #:	10735845	Filing Dt:	12/16/2003
Publication #:	US20050127511	Pub Dt:	06/16/2005
Title:	INTERCONNECT STRUCTURES AND METHODS OF MAKING THEREOF

Patent #:	7479688	Issue Dt:	01/20/2009	Application #:	10751831	Filing Dt:	01/05/2004
Publication #:	US20040238914	Pub Dt:	12/02/2004
Title:	STI STRESS MODIFICATION BY NITROGEN PLASMA TREATMENT FOR IMPROVING PERFORMANCE IN SMALL WIDTH DEVICES

Patent #:	7504727	Issue Dt:	03/17/2009	Application #:	10845718	Filing Dt:	05/14/2004
Publication #:	US20050258542	Pub Dt:	11/24/2005
Title:	A SEMICONDUCTOR INTERCONNECT STRUCTURE UTILIZING A POROUS DIELECTRIC MATERIAL AS AN ETCH STOP LAYER BETWEEN ADJACENT NON-POROUS DIELECTRIC MATERIALS

Patent #:	7476926	Issue Dt:	01/13/2009	Application #:	10905475	Filing Dt:	01/06/2005
Publication #:	US20060145235	Pub Dt:	07/06/2006
Title:	ERASABLE NONVOLATILE MEMORY WITH SIDEWALL STORAGE

Patent #:	NONE	Issue Dt:		Application #:	10905938	Filing Dt:	01/27/2005
Publication #:	US20060166416	Pub Dt:	07/27/2006
Title:	ADDITION OF BALLAST HYDROCARBON GAS TO DOPED POLYSILICON ETCH MASKED BY RESIST

Patent #:	7405152	Issue Dt:	07/29/2008	Application #:	10906013	Filing Dt:	01/31/2005
Publication #:	US20060172514	Pub Dt:	08/03/2006
Title:	REDUCING WIRE EROSION DURING DAMASCENE PROCESSING

Patent #:	7354867	Issue Dt:	04/08/2008	Application #:	10906112	Filing Dt:	02/03/2005
Publication #:	US20060172535	Pub Dt:	08/03/2006
Title:	ETCH PROCESS FOR IMPROVING YIELD OF DIELECTRIC CONTACTS ON NICKEL SILICIDES

Patent #:	7287325	Issue Dt:	10/30/2007	Application #:	10908392	Filing Dt:	05/10/2005
Publication #:	US20060254053	Pub Dt:	11/16/2006
Title:	METHOD OF FORMING INTERCONNECT STRUCTURE OR INTERCONNECT AND VIA STRUCTURES USING POST CHEMICAL MECHANICAL POLISHING

Patent #:	7355221	Issue Dt:	04/08/2008	Application #:	10908448	Filing Dt:	05/12/2005
Publication #:	US20060255415	Pub Dt:	11/16/2006
Title:	FIELD EFFECT TRANSISTOR HAVING AN ASYMMETRICALLY STRESSED CHANNEL REGION

Patent #:	7271446	Issue Dt:	09/18/2007	Application #:	10916814	Filing Dt:	08/12/2004
Publication #:	US20050014314	Pub Dt:	01/20/2005
Title:	ULTRA-THIN CHANNEL DEVICE WITH RAISED SOURCE AND DRAIN AND SOLID SOURCE EXTENSION DOPING

Patent #:	7268066	Issue Dt:	09/11/2007	Application #:	10922093	Filing Dt:	08/19/2004
Publication #:	US20050020019	Pub Dt:	01/27/2005
Title:	METHOD FOR SEMICONDUCTOR GATE LINE DIMENSION REDUCTION

Patent #:	7311809	Issue Dt:	12/25/2007	Application #:	10930823	Filing Dt:	09/01/2004
Publication #:	US20050077173	Pub Dt:	04/14/2005
Title:	PLATING APPARATUS FOR SUBSTRATE

Patent #:	7544610	Issue Dt:	06/09/2009	Application #:	10935497	Filing Dt:	09/07/2004
Publication #:	US20060051961	Pub Dt:	03/09/2006
Title:	METHOD AND PROCESS FOR FORMING A SELF-ALIGNED SILICIDE CONTACT

Patent #:	7329439	Issue Dt:	02/12/2008	Application #:	10953752	Filing Dt:	09/29/2004
Publication #:	US20060069177	Pub Dt:	03/30/2006
Title:	UV-CURABLE SOLVENT FREE COMPOSITIONS AND USE THEREOF IN CERAMIC CHIP DEFECT REPAIR

Patent #:	7332436	Issue Dt:	02/19/2008	Application #:	10966301	Filing Dt:	10/15/2004
Publication #:	US20050224748	Pub Dt:	10/13/2005
Title:	PROCESS OF REMOVING RESIDUE FROM A PRECISION SURFACE USING LIQUID OR SUPERCRITICAL CARBON DIOXIDE COMPOSITION

Patent #:	7387911	Issue Dt:	06/17/2008	Application #:	10990778	Filing Dt:	11/16/2004
Publication #:	US20060105547	Pub Dt:	05/18/2006
Title:	APPLICATION OF A THERMALLY CONDUCTIVE THIN FILM TO A WAFER BACKSIDE PRIOR TO DICING TO PREVENT CHIPPING AND CRACKING

Patent #:	7084062	Issue Dt:	08/01/2006	Application #:	11033653	Filing Dt:	01/12/2005
Title:	USE OF TA-CAPPED METAL LINE TO IMPROVE FORMATION OF MEMORY ELEMENT FILMS

Patent #:	7282425	Issue Dt:	10/16/2007	Application #:	11046912	Filing Dt:	01/31/2005
Publication #:	US20060172505	Pub Dt:	08/03/2006
Title:	STRUCTURE AND METHOD OF INTEGRATING COMPOUND AND ELEMENTAL SEMICONDUCTORS FOR HIGH-PERFORMACE CMOS

Patent #:	7452568	Issue Dt:	11/18/2008	Application #:	11049846	Filing Dt:	02/04/2005
Publication #:	US20060177568	Pub Dt:	08/10/2006
Title:	CENTRIFUGAL METHOD FOR FILING HIGH ASPECT RATIO BLIND MICRO VIAS WITH POWDERED MATERIALS FOR CIRCUIT FORMATION

Patent #:	7381637	Issue Dt:	06/03/2008	Application #:	11053706	Filing Dt:	02/08/2005
Publication #:	US20050146040	Pub Dt:	07/07/2005
Title:	METAL SPACER IN SINGLE AND DUAL DAMASCENE PROCESSING

Patent #:	7326983	Issue Dt:	02/05/2008	Application #:	11082993	Filing Dt:	03/17/2005
Publication #:	US20050164468	Pub Dt:	07/28/2005
Title:	SELECTIVE SILICON-ON-INSULATOR ISOLATION STRUCTURE AND METHOD

Patent #:	7348611	Issue Dt:	03/25/2008	Application #:	11112820	Filing Dt:	04/22/2005
Publication #:	US20060237785	Pub Dt:	10/26/2006
Title:	STRAINED COMPLEMENTARY METAL OXIDE SEMICONDUCTOR (CMOS) ON ROTATED WAFERS AND METHODS THEREOF

Patent #:	7247363	Issue Dt:	07/24/2007	Application #:	11137957	Filing Dt:	05/26/2005
Publication #:	US20050214508	Pub Dt:	09/29/2005
Title:	SUPPORTED GREENSHEET STRUCTURE AND METHOD IN MLC PROCESSING

Patent #:	7485521	Issue Dt:	02/03/2009	Application #:	11160676	Filing Dt:	07/05/2005
Publication #:	US20070007552	Pub Dt:	01/11/2007
Title:	SELF-ALIGNED DUAL STRESSED LAYERS FOR NFET AND PFET

Patent #:	7674697	Issue Dt:	03/09/2010	Application #:	11160698	Filing Dt:	07/06/2005
Publication #:	US20070010081	Pub Dt:	01/11/2007
Title:	MOSFET WITH MULTIPLE FULLY SILICIDED GATE AND METHOD FOR MAKING THE SAME

Patent #:	7456115	Issue Dt:	11/25/2008	Application #:	11160700	Filing Dt:	07/06/2005
Publication #:	US20070010050	Pub Dt:	01/11/2007
Title:	METHOD FOR FORMING SEMICONDUCTOR DEVICES HAVING REDUCED GATE EDGE LEAKAGE CURRENT

Patent #:	7384878	Issue Dt:	06/10/2008	Application #:	11161214	Filing Dt:	07/27/2005
Publication #:	US20060003468	Pub Dt:	01/05/2006
Title:	METHOD FOR APPLYING A LAYER TO A HYDROPHOBIC SURFACE

Patent #:	7459367	Issue Dt:	12/02/2008	Application #:	11161239	Filing Dt:	07/27/2005
Publication #:	US20070023811	Pub Dt:	02/01/2007
Title:	METHOD OF FORMING A VERTICAL P-N JUNCTION DEVICE

Patent #:	7382029	Issue Dt:	06/03/2008	Application #:	11161337	Filing Dt:	07/29/2005
Publication #:	US20070026598	Pub Dt:	02/01/2007
Title:	METHOD AND APPARATUS FOR IMPROVING INTEGRATED CIRCUIT DEVICE PERFORMANCE USING HYBRID CRYSTAL ORIENTATIONS

Patent #:	7230287	Issue Dt:	06/12/2007	Application #:	11161623	Filing Dt:	08/10/2005
Publication #:	US20070034971	Pub Dt:	02/15/2007
Title:	CHEVRON CMOS TRIGATE STRUCTURE

Patent #:	7442585	Issue Dt:	10/28/2008	Application #:	11162126	Filing Dt:	08/30/2005
Publication #:	US20070045611	Pub Dt:	03/01/2007
Title:	MOSFET WITH LATERALLY GRADED CHANNEL REGION AND METHOD FOR MANUFACTURING SAME

Patent #:	7394154	Issue Dt:	07/01/2008	Application #:	11162513	Filing Dt:	09/13/2005
Publication #:	US20070057374	Pub Dt:	03/15/2007
Title:	EMBEDDED BARRIER FOR DIELECTRIC ENCAPSULATION

Patent #:	7335563	Issue Dt:	02/26/2008	Application #:	11164070	Filing Dt:	11/09/2005
Publication #:	US20070105326	Pub Dt:	05/10/2007
Title:	ROTATED FIELD EFFECT TRANSISTORS AND METHOD OF MANUFACTURE

Patent #:	7977185	Issue Dt:	07/12/2011	Application #:	11164417	Filing Dt:	11/22/2005
Publication #:	US20070161244	Pub Dt:	07/12/2007
Title:	METHOD AND APPARATUS FOR POST SILICIDE SPACER REMOVAL

Patent #:	7419907	Issue Dt:	09/02/2008	Application #:	11173038	Filing Dt:	07/01/2005
Publication #:	US20070004205	Pub Dt:	01/04/2007
Title:	ELIMINATING METAL-RICH SILICIDES USING AN AMORPHOUS NI ALLOY SILICIDE STRUCTURE

Patent #:	7348226	Issue Dt:	03/25/2008	Application #:	11174738	Filing Dt:	07/06/2005
Publication #:	US20050266663	Pub Dt:	12/01/2005
Title:	METHOD OF FORMING LATTICE-MATCHED STRUCTURE ON SILICON AND STRUCTURE FORMED THEREBY

Patent #:	7994575	Issue Dt:	08/09/2011	Application #:	11175582	Filing Dt:	07/06/2005
Publication #:	US20050242378	Pub Dt:	11/03/2005
Title:	METAL-OXIDE-SEMICONDUCTOR DEVICE STRUCTURES WITH TAILORED DOPANT DEPTH PROFILES

Patent #:	7445945	Issue Dt:	11/04/2008	Application #:	11194843	Filing Dt:	08/01/2005
Title:	METHOD AND APPARATUS FOR DYNAMIC ADJUSTMENT OF A SAMPLING PLAN BASED ON WAFER ELECTRICAL TEST DATA

Patent #:	7420248	Issue Dt:	09/02/2008	Application #:	11211813	Filing Dt:	08/25/2005
Publication #:	US20070045733	Pub Dt:	03/01/2007
Title:	PROGRAMMABLE RANDOM LOGIC ARRAYS USING PN ISOLATION

Patent #:	7381655	Issue Dt:	06/03/2008	Application #:	11226726	Filing Dt:	09/14/2005
Publication #:	US20070059891	Pub Dt:	03/15/2007
Title:	MANDREL/TRIM ALIGNMENT IN SIT PROCESSING

Patent #:	7326601	Issue Dt:	02/05/2008	Application #:	11235791	Filing Dt:	09/26/2005
Publication #:	US20070072380	Pub Dt:	03/29/2007
Title:	METHODS FOR FABRICATION OF A STRESSED MOS DEVICE

Patent #:	7348216	Issue Dt:	03/25/2008	Application #:	11243882	Filing Dt:	10/04/2005
Publication #:	US20070077752	Pub Dt:	04/05/2007
Title:	REWORK PROCESS FOR REMOVING RESIDUAL UV ADHESIVE FROM C4 WAFER SURFACES

Patent #:	7476552	Issue Dt:	01/13/2009	Application #:	11247369	Filing Dt:	10/11/2005
Publication #:	US20060194349	Pub Dt:	08/31/2006
Title:	METHOD OF REWORKING A SEMICONDUCTOR STRUCTURE

Patent #:	7541679	Issue Dt:	06/02/2009	Application #:	11247818	Filing Dt:	10/11/2005
Publication #:	US20060027929	Pub Dt:	02/09/2006
Title:	EXPOSED PORE SEALING POST PATTERNING

Patent #:	7288782	Issue Dt:	10/30/2007	Application #:	11251291	Filing Dt:	10/14/2005
Title:	USE OF TA-CAPPED METAL LINE TO IMPROVE FORMATION OF MEMORY ELEMENT FILMS

Patent #:	7528494	Issue Dt:	05/05/2009	Application #:	11266456	Filing Dt:	11/03/2005
Publication #:	US20070096263	Pub Dt:	05/03/2007
Title:	ACCESSIBLE CHIP STACK AND PROCESS OF MANUFACTURING THEREOF

Patent #:	7470562	Issue Dt:	12/30/2008	Application #:	11268132	Filing Dt:	11/07/2005
Publication #:	US20070105327	Pub Dt:	05/10/2007
Title:	METHODS OF FORMING FIELD EFFECT TRANSISTORS USING DISPOSABLE ALUMINUM OXIDE SPACERS

Patent #:	7442996	Issue Dt:	10/28/2008	Application #:	11275644	Filing Dt:	01/20/2006
Publication #:	US20070170515	Pub Dt:	07/26/2007
Title:	STRUCTURE AND METHOD FOR ENHANCED TRIPLE WELL LATCHUP ROBUSTNESS

Patent #:	7303968	Issue Dt:	12/04/2007	Application #:	11299682	Filing Dt:	12/13/2005
Publication #:	US20060157824	Pub Dt:	07/20/2006
Title:	SEMICONDUCTOR DEVICE AND METHOD HAVING MULTIPLE SUBCOLLECTORS FORMED ON A COMMON WAFER

Patent #:	7504696	Issue Dt:	03/17/2009	Application #:	11306748	Filing Dt:	01/10/2006
Publication #:	US20070278590	Pub Dt:	12/06/2007
Title:	CMOS WITH DUAL METAL GATE

Patent #:	7405153	Issue Dt:	07/29/2008	Application #:	11306932	Filing Dt:	01/17/2006
Publication #:	US20070166995	Pub Dt:	07/19/2007
Title:	METHOD FOR DIRECT ELECTROPLATING OF COPPER ONTO A NON-COPPER PLATEABLE LAYER

Patent #:	7439144	Issue Dt:	10/21/2008	Application #:	11307671	Filing Dt:	02/16/2006
Publication #:	US20070190713	Pub Dt:	08/16/2007
Title:	CMOS GATE STRUCTURES FABRICATED BY SELECTIVE OXIDATION

Patent #:	NONE	Issue Dt:		Application #:	11308604	Filing Dt:	04/11/2006
Publication #:	US20070249133	Pub Dt:	10/25/2007
Title:	CONDUCTIVE SPACERS FOR SEMICONDUCTOR DEVICES AND METHODS OF FORMING

Patent #:	7368393	Issue Dt:	05/06/2008	Application #:	11308672	Filing Dt:	04/20/2006
Publication #:	US20070246442	Pub Dt:	10/25/2007
Title:	CHEMICAL OXIDE REMOVAL OF PLASMA DAMAGED SICOH LOW K DIELECTRICS

Patent #:	7374998	Issue Dt:	05/20/2008	Application #:	11346662	Filing Dt:	02/03/2006
Publication #:	US20070184619	Pub Dt:	08/09/2007
Title:	SELECTIVE INCORPORATION OF CHARGE FOR TRANSISTOR CHANNELS

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100

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Assignor

GLOBALFOUNDRIES INC.

Exec Dt:

11/26/2018

Assignee

ALSEPHINA INNOVATIONS INC.

303 TERRY FOX DRIVE

SUITE 300

OTTAWA, CANADA K2K 3J1

Correspondence name and address
	ALSEPHINA INNOVATIONS INC.
	1891 ROBERTSON ROAD
	SUITE 100
	OTTAWA, K2H 5B7 CANADA

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