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NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:	049827/0326			Pages:	131
		Recorded:	05/21/2019
Conveyance:	RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).

Total properties: 1122
Page 1 of 12
Pages: 1 2 3 4 5 6 7 8 9 10 11 12

1

Patent #:	4642797	Issue Dt:	02/10/1987	Application #:	06551735	Filing Dt:	11/10/1983
Title:	HIGH SPEED FIRST-IN-FIRST-OUT MEMORY

2

Patent #:	4833646	Issue Dt:	05/23/1989	Application #:	06707670	Filing Dt:	03/04/1985
Title:	PROGRAMMABLE LOGIC DEVICE WITH LIMITED SENSE CURRENTS AND NOISE ISOLATION

3

Patent #:	4879688	Issue Dt:	11/07/1989	Application #:	06862815	Filing Dt:	05/13/1986
Title:	IN-SYSTEM PROGRAMMABLE LOGIC DEVICE

4

Patent #:	4766569	Issue Dt:	08/23/1988	Application #:	06871063	Filing Dt:	06/05/1986
Title:	PROGRAMMABLE LOGIC ARRAY

5

Patent #:	4887239	Issue Dt:	12/12/1989	Application #:	06882602	Filing Dt:	07/07/1986
Title:	ONE-TIME PROGRAMMABLE DATA SECURITY SYSTEM FOR PROGRAMMABLE LOGIC DEVICE

6

Patent #:	4852044	Issue Dt:	07/25/1989	Application #:	07236348	Filing Dt:	08/22/1988
Title:	PROGRAMMABLE DATA SECURITY CIRCUIT FOR PROGRAMMABLE LOGIC DEVICE

7

Patent #:	4896296	Issue Dt:	01/23/1990	Application #:	07288945	Filing Dt:	12/23/1988
Title:	PROGRAMMABLE LOGIC DEVICE CONFIGURABLE INPUT/OUTPUT CELL

8

Patent #:	5255203	Issue Dt:	10/19/1993	Application #:	07538211	Filing Dt:	06/14/1990
Title:	INTERCONNECT STRUCTURE FOR PROGRAMMABLE LOGIC DEVICE

9

Patent #:	5255221	Issue Dt:	10/19/1993	Application #:	07679370	Filing Dt:	04/02/1991
Title:	FULLY CONFIGURABLE VERSATILE FIELD PROGRAMMABLE FUNCTION ELEMENT

10

Patent #:	5251169	Issue Dt:	10/05/1993	Application #:	07696453	Filing Dt:	05/06/1991
Title:	NON-VOLATILE ERASABLE AND PROGRAMMABLE INTERCONNECT CELL

11

Patent #:	5281906	Issue Dt:	01/25/1994	Application #:	07785442	Filing Dt:	10/29/1991
Title:	TUNABLE VOLTAGE REFERENCE CIRCUIT TO PROVIDE AN OUTPUT VOLTAGE WITH A PREDETERMINED TEMPERATURE COEFFICIENT INDEPENDENT OF VARIATION IN SUPPLY VOLTAGE

12

Patent #:	5231316	Issue Dt:	07/27/1993	Application #:	07853453	Filing Dt:	03/17/1992
Title:	TEMPERATURE COMPENSATED CMOS VOLTAGE TO CURRENT CONVERTER

13

Patent #:	5357156	Issue Dt:	10/18/1994	Application #:	07911841	Filing Dt:	07/10/1992
Title:	ACTIVE CLAMP CIRCUIT SCHEME FOR CMOS DEVICES

14

Patent #:	5329179	Issue Dt:	07/12/1994	Application #:	07957311	Filing Dt:	10/05/1992
Title:	ARRANGEMENT FOR PARALLEL PROGRAMMING OF IN-SYSTEM PROGRAMMABLE IC LOGIC DEVICES

15

Patent #:	5452229	Issue Dt:	09/19/1995	Application #:	07993711	Filing Dt:	12/18/1992
Title:	PROGRAMMABLE INTEGRATED-CIRCUIT SWITCH

16

Patent #:	5418390	Issue Dt:	05/23/1995	Application #:	08033934	Filing Dt:	03/19/1993
Title:	SINGLE POLYSILICON LAYER E2PROM CELL

17

Patent #:	5394037	Issue Dt:	02/28/1995	Application #:	08042533	Filing Dt:	04/05/1993
Title:	SENSE AMPLIFIERS AND SENSING METHODS

18

Patent #:	5412260	Issue Dt:	05/02/1995	Application #:	08106263	Filing Dt:	08/13/1993
Title:	MULTIPLEXED CONTROL PINS FOR IN-SYSTEM PROGRAMMING AND BOUNDARY SCAN STATE MACHINES IN A HIGH DENSITY PROGRAMMABLE LOGIC DEVICE

19

Patent #:	5353246	Issue Dt:	10/04/1994	Application #:	08108363	Filing Dt:	08/18/1993
Title:	PROGRAMMABLE SEMICONDUCTOR ANTIFUSE STRUCTURE AND METHOD OF FABRICATING

20

Patent #:	5404055	Issue Dt:	04/04/1995	Application #:	08115533	Filing Dt:	09/01/1993
Title:	INPUT ROUTING POOL

21

Patent #:	5394033	Issue Dt:	02/28/1995	Application #:	08115723	Filing Dt:	09/01/1993
Title:	STRUCTURE AND METHOD FOR IMPLEMENTING HIERARCHICAL ROUTING POOLS IN A PROGRAMMABLE LOGIC CIRCUIT

22

Patent #:	5886378	Issue Dt:	03/23/1999	Application #:	08179887	Filing Dt:	01/10/1994
Title:	SINGLE POLYSILICON LAYER FLASH E2PROM CELL

23

Patent #:	5506517	Issue Dt:	04/09/1996	Application #:	08342675	Filing Dt:	11/21/1994
Title:	OUTPUT ENABLE STRUCTURE AND METHOD FOR A PROGRAMMABLE LOGIC DEVICE

24

Patent #:	5574678	Issue Dt:	11/12/1996	Application #:	08396994	Filing Dt:	03/01/1995
Title:	CONTINUOUS TIME PROGRAMMABLE ANALOG BLOCK ARCHITECTURE

25

Patent #:	5617064	Issue Dt:	04/01/1997	Application #:	08403352	Filing Dt:	03/14/1995
Title:	ACTIVE RESISTOR FOR STABILITY COMPENSATION

26

Patent #:	5493205	Issue Dt:	02/20/1996	Application #:	08403354	Filing Dt:	03/14/1995
Title:	LOW DISTORTION DIFFERENTIAL TRANSCONDUCTOR OUTPUT CURRENT MIRROR

27

Patent #:	5510738	Issue Dt:	04/23/1996	Application #:	08403359	Filing Dt:	03/14/1995
Title:	CMOS PROGRAMMABLE RESISTOR-BASED TRANSCONDUCTOR

28

Patent #:	5670907	Issue Dt:	09/23/1997	Application #:	08403595	Filing Dt:	03/14/1995
Title:	VBB REFERENCE FOR PUMPED SUBSTRATES

29

Patent #:	5490074	Issue Dt:	02/06/1996	Application #:	08423303	Filing Dt:	04/18/1995
Title:	CONSTANT DELAY INTERCONNECT FOR COUPLING CONFIGURABLE LOGIC BLOCKS

30

Patent #:	5596524	Issue Dt:	01/21/1997	Application #:	08427117	Filing Dt:	04/21/1995
Title:	CMOS MEMORY CELL WITH GATE OXIDE OF BOTH NMOS AND PMOS TRANSISTORS AS TUNNELING WINDOW FOR PROGRAM AND ERASE

31

Patent #:	5491433	Issue Dt:	02/13/1996	Application #:	08444306	Filing Dt:	05/18/1995
Title:	CASCODE ARRAY CELL PARTITIONING FOR A SENSE AMPLIFIER OF A PROGRAMMABLE LOGIC DEVICE

32

Patent #:	5594687	Issue Dt:	01/14/1997	Application #:	08447991	Filing Dt:	05/23/1995
Title:	COMPLETELY COMPLEMENTARY MOS MEMORY CELL WITH TUNNELING THROUGH THE NMOS AND PMOS TRANSISTORS DURING PROGRAM AND ERASE

33

Patent #:	5756367	Issue Dt:	05/26/1998	Application #:	08449384	Filing Dt:	05/23/1995
Title:	METHOD OF MAKING A SPACER BASED ANTIFUSE STRUCTURE FOR LOW CAPACITANCE AND HIGH RELIABILITY

34

Patent #:	5570046	Issue Dt:	10/29/1996	Application #:	08453184	Filing Dt:	05/30/1995
Title:	LEAD FRAME WITH NOISY AND QUIET V AND V LEADS SS DD

35

Patent #:	5583451	Issue Dt:	12/10/1996	Application #:	08453479	Filing Dt:	05/30/1995
Title:	GROUND BOUNCE ISOLATED OUTPUT BUFFER POLARITY CONTROL CIRCUIT WHICH MAY BE USED W3ITH A GROUND BOUNCE LIMITING BUFFER

36

Patent #:	5621650	Issue Dt:	04/15/1997	Application #:	08456946	Filing Dt:	06/01/1995
Title:	PROGRAMMABLE LOGIC DEVICE WITH INTERNAL TIME-CONSTANT MULTIPLEXING OF SIGNALS FROM EXTERNAL INTERCONNECT BUSES

37

Patent #:	5589782	Issue Dt:	12/31/1996	Application #:	08458865	Filing Dt:	06/02/1995
Title:	MACROCELL AND CLOCK SIGNAL ALLOCATION CIRCUIT FOR A PROGRAMMABLE LOGIC DEVICE (PLD) ENABLING PLD RESOURCES TO PROVIDE MULTIPLE FUNCTIONS

38

Patent #:	5818254	Issue Dt:	10/06/1998	Application #:	08459230	Filing Dt:	06/02/1995
Title:	MULTI-TIERED HIERARCHICAL HIGH SPEED SWITCH MATRIX STRUCTURE FOR VERY HIGH-DENSITY COMPLEX PROGRAMMABLE LOGIC DEVICES

39

Patent #:	5781030	Issue Dt:	07/14/1998	Application #:	08459234	Filing Dt:	06/02/1995
Title:	PROGRAMMABLE UNIFORM SYMMETRICAL DISTRIBUTION LOGIC ALLOCATOR FOR A HIGH-DENSITY COMPLEX PLD

40

Patent #:	6531890	Issue Dt:	03/11/2003	Application #:	08459570	Filing Dt:	06/02/1995
Title:	PROGRAMMABLE OPTIMIZED-DISTRIBUTION LOGIC ALLOCATOR FOR A HIGH-DENSITY COMPLEX PLD

41

Patent #:	5638018	Issue Dt:	06/10/1997	Application #:	08459786	Filing Dt:	06/02/1995
Title:	P-TYPE FLIP-FLOP

42

Patent #:	5521529	Issue Dt:	05/28/1996	Application #:	08459960	Filing Dt:	06/02/1995
Title:	VERY HIGH-DENSITY COMPLEX PROGRAMMABLE LOGIC DEVICES WITH A MULTI-TIERED HIERARCHICAL SWITCH MATRIX AND OPTIMIZED FLIXIBLE LOGIC ALLOCATION

43

Patent #:	5586044	Issue Dt:	12/17/1996	Application #:	08461196	Filing Dt:	06/05/1995
Title:	ARRAY OF CONFIGURABLE LOGIC BLOCKS INCLUDING CASCADABLE LOOKUP TABLES

44

Patent #:	5469368	Issue Dt:	11/21/1995	Application #:	08462934	Filing Dt:	06/05/1995
Title:	ARRAY OF CONFIGURABLE LOGIC BLOCKS EACH INCLUDING A FIRST LOOKUP TABLE OUTPUT COUPLED TO SELECTIVELY REPLACE AN OUTPUT OF SECOND LOOKUP WITH AN ALTERNATE FUNCTION OUTPUT

45

Patent #:	5754471	Issue Dt:	05/19/1998	Application #:	08466438	Filing Dt:	06/06/1995
Title:	LOW POWER CMOS ARRAY CELL FOR A PLD WITH PROGRAM AND ERASE USING CONTROLLED AVALANCHE INJECTION

46

Patent #:	5594657	Issue Dt:	01/14/1997	Application #:	08473620	Filing Dt:	06/07/1995
Title:	SYSTEM FOR SYNTHESIZING FIELD PROGRAMMABLE GATE ARRAY IMPLEMENTATIONS FROM HIGH LEVEL CIRCUIT DESCRIPTIONS

47

Patent #:	5612631	Issue Dt:	03/18/1997	Application #:	08474629	Filing Dt:	06/06/1995
Title:	AN I/O MACROCELL FOR A PROGRAMMABLE LOGIC DEVICE

48

Patent #:	5811986	Issue Dt:	09/22/1998	Application #:	08474635	Filing Dt:	06/06/1995
Title:	FLEXIBLE SYNCHRONOUS/ASYNCHRONOUS CELL STRUCTURE FOR A HIGH DENSITY PROGRAMMABLE LOGIC DEVICE

49

Patent #:	5869981	Issue Dt:	02/09/1999	Application #:	08479872	Filing Dt:	06/06/1995
Title:	A HIGH DENSITY PROGRAMMABLE LOGIC DEVICE

50

Patent #:	5617042	Issue Dt:	04/01/1997	Application #:	08483623	Filing Dt:	06/07/1995
Title:	MULTIPLE ARRAY PROGRAMMABLE LOGIC DEVICE WITH A PLURALITY OF PROGRAMMABLE SWITCH MATRICES

51

Patent #:	5594365	Issue Dt:	01/14/1997	Application #:	08486174	Filing Dt:	06/06/1995
Title:	A FLEXIBLE BLOCK CLOCK GENERATION CIRCUIT FOR PROVIDING CLOCK SIGNALS TO CLOCKED ELEMENTS IN A MULTIPLE ARRAY HIGH DENSITY PROGRAMMABLE LOGIC DIVICE

52

Patent #:	5764078	Issue Dt:	06/09/1998	Application #:	08486178	Filing Dt:	06/06/1995
Title:	FAMILY OF MULTIPLE SEGMENTED PROGRAMMABLE LOGIC BLOCKS INTERCONNECTED BY A HIGH SPEED CENTRALIZED SWITCH MATRIX

53

Patent #:	5526278	Issue Dt:	06/11/1996	Application #:	08492604	Filing Dt:	06/20/1995
Title:	METHOD AND APPARATUS FOR CONVERTING FIELD-PROGRAMMABLE GATE ARRAY IMPLEMENTATIONS INTO MAS-PROGRAMMABLE LOGIC CELL IMPLEMENTATIONS

54

Patent #:	5679599	Issue Dt:	10/21/1997	Application #:	08493640	Filing Dt:	06/22/1995
Title:	ISOLATION USING SELF-ALIGNED TRENCH FORMATION AND CONVENTIONAL LOCOS

55

Patent #:	5565794	Issue Dt:	10/15/1996	Application #:	08494271	Filing Dt:	06/23/1995
Title:	VOLTAGE RANGE TOLERANT CMOS OUTPUT BUFFER WITH REDUCED INPUT CAPACITANCE

56

Patent #:	5742542	Issue Dt:	04/21/1998	Application #:	08497992	Filing Dt:	07/03/1995
Title:	NON-VOLATILE MEMORY CELLS USING ONLY POSITIVE CHARGE TO STORE DATA

57

Patent #:	5700698	Issue Dt:	12/23/1997	Application #:	08500295	Filing Dt:	07/10/1995
Title:	METHOD FOR SCREENING NON-VOLATILE MEMORY AND PROGRAMMABLE LOGIC DEVICES

58

Patent #:	5604370	Issue Dt:	02/18/1997	Application #:	08501230	Filing Dt:	07/11/1995
Title:	FIELD IMPLANT FOR SEMICONDUCTOR DEVICE

59

Patent #:	5635855	Issue Dt:	06/03/1997	Application #:	08505837	Filing Dt:	07/21/1995
Title:	METHOD FOR SIMULTANEOUS PROGRAMMING OF IN-SYSTEM PROGRAMMABLE INTEGRATED CIRCUITS

60

Patent #:	5570039	Issue Dt:	10/29/1996	Application #:	08507893	Filing Dt:	07/27/1995
Title:	PROGRAMMABLE FUNCTION UNIT AS PARALLEL MULTIPLIER CELL

61

Patent #:	5559450	Issue Dt:	09/24/1996	Application #:	08507957	Filing Dt:	07/27/1995
Title:	FIELD PROGRAMMABLE GATE ARRAY WITH MULTI-PORT RAM

62

Patent #:	5581126	Issue Dt:	12/03/1996	Application #:	08528030	Filing Dt:	09/14/1995
Title:	INTERLACED LAYOUT CONFIGURATION FOR DIFFERENTIAL PAIRS OF INTERCONNECT LINES

63

Patent #:	5528170	Issue Dt:	06/18/1996	Application #:	08535362	Filing Dt:	09/28/1995
Title:	LOW-SKEW SIGNAL ROUTING IN A PROGRAMMABLE ARRAY

64

Patent #:	5615150	Issue Dt:	03/25/1997	Application #:	08551974	Filing Dt:	11/02/1995
Title:	CONTROL GATE-ADDRESSED CMOS NON-VOLATILE CELL THAT PROGRAMS THROUGH GATES OF CMOS TRANSISTORS

65

Patent #:	5587945	Issue Dt:	12/24/1996	Application #:	08554092	Filing Dt:	11/06/1995
Title:	CMOS EEPROM CELL WITH TUNNELING WINDOW IN THE READ PATH

66

Patent #:	5666309	Issue Dt:	09/09/1997	Application #:	08560038	Filing Dt:	11/17/1995
Title:	MEMORY CELL FOR A PROGRAMMABLE LOGIC DEVICE (PLD) AVOIDING PUMPING PROGRAMMING VOLTAGE ABOVE AN NMOS THRESHOLD

67

Patent #:	5587921	Issue Dt:	12/24/1996	Application #:	08560933	Filing Dt:	11/20/1995
Title:	ARRAY OF CONFIGURABLE LOGIC BLOCKS EACH INCLUDING A LOOKUP TABLE HAVING INPUTS COUPLED TOA FIRST MULTIPLEXER AND HAVING OUTPUTS TO A SECOND MULTIPLEXER

68

Patent #:	5672521	Issue Dt:	09/30/1997	Application #:	08561306	Filing Dt:	11/21/1995
Title:	METHOD OF FORMING MULTIPLE GATE OXIDE THICKNESSES ON A WAFER SUBSTRATE

69

Patent #:	5809522	Issue Dt:	09/15/1998	Application #:	08573622	Filing Dt:	12/18/1995
Title:	MICROPPROCESSOR SYSTEM WITH PROCESS IDENTIFICATION TAG ENTRIES TO REDUCE CACHE FLUSHING AFTER A CONTEXT SWITCH

70

Patent #:	5739713	Issue Dt:	04/14/1998	Application #:	08574776	Filing Dt:	12/19/1995
Title:	DECONVOLUTION INPUT BUFFER COMPENSATING FOR CAPACITANCE OF A SWITCH MATRIX OF A HIGH DENSITY PROGRAMMABLE LOGIC DEVICE

71

Patent #:	5719516	Issue Dt:	02/17/1998	Application #:	08575852	Filing Dt:	12/20/1995
Title:	LOCK GENERATOR CIRCUIT FOR USE WITH A DUAL EDGE REGISTER THAT PROVIDES A SEPARATE ENABLE FOR EACH EDGE OF AN INPUT CLOCK SIGNAL

72

Patent #:	5736888	Issue Dt:	04/07/1998	Application #:	08575898	Filing Dt:	12/20/1995
Title:	CAPACITANCE ELIMINATION CIRCUIT WHICH PROVIDES CURRENT TO A NODE IN A CIRCUIT TO ELIMINATE THE EFFECT OF PARASITIC CAPACITANCE AT THE NODE

73

Patent #:	5598346	Issue Dt:	01/28/1997	Application #:	08596679	Filing Dt:	02/05/1996
Title:	ARRAY OF CONFIGURABLE LOGIC BLOCKS INCLUDING NETWORK MEANS FOR BROADCASTING CLOCK SIGNALS TO DIFFERENT PLURALITIES OF LOGIC BLOCKS

74

Patent #:	5623217	Issue Dt:	04/22/1997	Application #:	08606702	Filing Dt:	02/26/1996
Title:	FIELD PROGRAMMABLE GATE ARRAY WITH WRITE-PORT ENABLED MEMORY

75

Patent #:	5926841	Issue Dt:	07/20/1999	Application #:	08614728	Filing Dt:	03/13/1996
Title:	SEGMENT DESCRIPTOR CACHE FOR A PROCESSOR

76

Patent #:	5646901	Issue Dt:	07/08/1997	Application #:	08625403	Filing Dt:	03/26/1996
Title:	CMOS MEMORY CELL WITH TUNNELING DURING PROGRAM AND ERASE THROUGH THE NMOS AND PMOS TRANSISTORS AND A PASS GATE SEPARATING THE NMOS AND PMOS TRANSISTORS

77

Patent #:	5751163	Issue Dt:	05/12/1998	Application #:	08632811	Filing Dt:	04/16/1996
Title:	PARALLEL PROGRAMMING OF IN-SYSTEM (ISP) PROGRAMMABLE DEVICES USING AN AUTOMATIC TESTER

78

Patent #:	5666087	Issue Dt:	09/09/1997	Application #:	08635184	Filing Dt:	04/25/1996
Title:	ACTIVE RESISTOR FOR STABILITY COMPENSATION

79

Patent #:	5864486	Issue Dt:	01/26/1999	Application #:	08643291	Filing Dt:	05/08/1996
Title:	METHOD AND APPARATUS FOR IN-SYSTEM PROGRAMMING OF A PROGRAMMABLE LOGIC DEVICE USING A TWO-WIRE INTERFACE

80

Patent #:	5748525	Issue Dt:	05/05/1998	Application #:	08643807	Filing Dt:	05/06/1996
Title:	ARRAY CELL CIRCUIT WITH SPLIT READ/WRITE LINE

81

Patent #:	5789939	Issue Dt:	08/04/1998	Application #:	08653186	Filing Dt:	05/24/1996
Title:	A METHOD FOR PROVIDING A PLURALITY OF HIERARCHICAL SIGNAL PATHS IN A VERY HIGH-DENSITY PROGRAMMABLE LOGIC DEVICE

82

Patent #:	6018456	Issue Dt:	01/25/2000	Application #:	08656032	Filing Dt:	05/31/1996
Title:	ENCLOSURE FOR REMOVABLE COMPUTER PERIPHERAL EQUIPMENT

83

Patent #:	5723984	Issue Dt:	03/03/1998	Application #:	08659279	Filing Dt:	06/06/1996
Title:	FIELD PROGRAMMABLE GATE ARRAY (FPGA) WITH INTERCONNECT ENCODING

84

Patent #:	5808942	Issue Dt:	09/15/1998	Application #:	08659941	Filing Dt:	06/07/1996
Title:	FIELD PROGRAMMABLE GATE ARRAY (FPGA) HAVING AN IMPROVED CONFIGURATION MEMORY AND LOOK UP TABLE

85

Patent #:	5830795	Issue Dt:	11/03/1998	Application #:	08664190	Filing Dt:	06/10/1996
Title:	SIMPLIFIED MASKING PROCESS FOR PROGRAMMABLE LOGIC DEVICE MANUFACTURE

86

Patent #:	5760609	Issue Dt:	06/02/1998	Application #:	08666193	Filing Dt:	06/19/1996
Title:	A CLOCK SIGNAL PROVIDING CIRCUIT WITH ENABLE AND A PULSE GENERATOR WITH ENABLE FOR USE IN A BLOCK CLOCK CIRCUIT OF A PROGRAMMABLE LOGIC DEVICE

87

Patent #:	5796295	Issue Dt:	08/18/1998	Application #:	08668141	Filing Dt:	06/21/1996
Title:	REFERENCE FOR CMOS MEMORY CELL HAVING PMOS AND NMOS TRANSISTORS WITH A COMMON FLOATING GATE

88

Patent #:	5751164	Issue Dt:	05/12/1998	Application #:	08668896	Filing Dt:	06/24/1996
Title:	PROGRAMMABLE LOGIC DEVICE WITH MULTI-LEVEL POWER CONTROL

89

Patent #:	5818294	Issue Dt:	10/06/1998	Application #:	08683373	Filing Dt:	07/18/1996
Title:	TEMPERATURE INSENSITIVE CURRENT SOURCE

90

Patent #:	5734275	Issue Dt:	03/31/1998	Application #:	08683685	Filing Dt:	07/18/1996
Title:	PROGRAMMABLE LOGIC DEVICE HAVING A SENSE AMPLIFIER WITH VIRTUAL GROUND

91

Patent #:	5942780	Issue Dt:	08/24/1999	Application #:	08689523	Filing Dt:	08/09/1996
Title:	AN INTEGRATED CIRCUIT HAVING, AND PROCESS PROVIDING, DIFFERENT OXIDE LAYER THICKNESSES ON A SUBSTRATE

92

Patent #:	5801551	Issue Dt:	09/01/1998	Application #:	08690768	Filing Dt:	08/01/1996
Title:	DEPLETION MODE PASS GATES WITH CONTROLLING DECODER AND NEGATIVE POWER SUPPLY FOR A PROGRAMMABLE LOGIC DEVICE

93

Patent #:	5796750	Issue Dt:	08/18/1998	Application #:	08696444	Filing Dt:	08/13/1996
Title:	METHOD FOR PROGRAMMING A PROGRAMMABLE LOGIC DEVICE IN AN AUTOMATIC TESTER

94

Patent #:	5960274	Issue Dt:	09/28/1999	Application #:	08699401	Filing Dt:	08/19/1996
Title:	OXIDE FORMATION PROCESS FOR MANUFACTURING PROGRAMMABLE LOGIC DEVICE

95

Patent #:	5740069	Issue Dt:	04/14/1998	Application #:	08700616	Filing Dt:	08/16/1996
Title:	PROGRAMMABLE LOGIC DEVICE (PLD) HAVING DIRECT CONNECTIONS BETWEEN CONFIGURABLE LOGIC BLOCKS (CLBS) AND CONFIGURABLE INPUT/OUTPUT BLOCKS (IOBS)

96

Patent #:	5959336	Issue Dt:	09/28/1999	Application #:	08702846	Filing Dt:	08/26/1996
Title:	DECODER CIRCUIT WITH SHORT CHANNEL DEPLETION TRANSISTORS

97

Patent #:	5862365	Issue Dt:	01/19/1999	Application #:	08710445	Filing Dt:	09/17/1996
Title:	CONFIGURATION PIN EMULATION CIRCUIT FOR A FIELD PROGRAMMABLE GATE ARRAY

98

Patent #:	5760605	Issue Dt:	06/02/1998	Application #:	08723082	Filing Dt:	09/30/1996
Title:	PROGRAMMABLE HIGH SPEED ROUTING SWITCH

99

Patent #:	5761116	Issue Dt:	06/02/1998	Application #:	08726512	Filing Dt:	10/07/1996
Title:	A VPP ONLY SCALABLE EEPROM MEMORY CELL HAVING TRANSISTORS WITH THIN TUNNEL GATE OXIDE

100

Patent #:	5991907	Issue Dt:	11/23/1999	Application #:	08729117	Filing Dt:	10/11/1996
Title:	METHOD FOR TESTING FIELD PROGRAMMABLE GATE ARRAYS

Assignor

1

JEFFERIES FINANCE LLC

Exec Dt:

05/17/2019

Assignees

1

LATTICE SEMICONDUCTOR CORPORATION

5555 NE MOORE CT

HILLSBORO, OREGON 97124

2

SILICON IMAGE, INC.

5555 NE MOORE CT

HILLSBORO, OREGON 97124

3

5555 NE MOORE CT

HILLSBORO, OREGON 97124

4

5555 NE MOORE CT

HILLSBORO, OREGON 97124

Correspondence name and address
	URMILA KARANDIKAR
	139 TOWNSEND STREET SUITE 150
	SAN FRANCISCO, CA 94107

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