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Reel/Frame:050896/0366   Pages: 51
Recorded: 10/28/2019
Attorney Dkt #:127110/12
Conveyance: ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN INTELLECTUAL PROPERTY
Total properties: 1522
Page 1 of 16
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
1
Patent #:
7672151
Issue Dt:
03/02/2010
Application #:
07377168
Filing Dt:
07/10/1989
Title:
METHOD FOR READING NON-VOLATLILE FERROELECTRIC CAPACITOR MEMORY CELL
2
Patent #:
7924599
Issue Dt:
04/12/2011
Application #:
07443018
Filing Dt:
11/29/1989
Title:
NON-VOLATILE MEMORY CIRCUIT USING FERROELECTRIC CAPACITOR STORAGE ELEMENT
3
Patent #:
6118702
Issue Dt:
09/12/2000
Application #:
09421151
Filing Dt:
10/19/1999
Title:
SOURCE BIAS COMPENSATION FOR PAGE MODE READ OPERATION IN A FLASH MEMORY DEVICE
4
Patent #:
6163481
Issue Dt:
12/19/2000
Application #:
09431296
Filing Dt:
10/29/1999
Title:
FLASH MEMORY WORDLINE TRACKING ACROSS WHOLE CHIP
5
Patent #:
6465835
Issue Dt:
10/15/2002
Application #:
09487964
Filing Dt:
01/18/2000
Title:
CHARGE GAIN/CHARGE LOSS JUNCTION LEAKAGE PREVENTION FOR FLASH TECHNOLOGY BY USING DOUBLE ISOLATION/CAPPING LAYER BETWEEN LIGHTLY DOPED DRAIN AND GATE
6
Patent #:
6198664
Issue Dt:
03/06/2001
Application #:
09495215
Filing Dt:
01/31/2000
Title:
APDE scheme for flash memory application
7
Patent #:
6246611
Issue Dt:
06/12/2001
Application #:
09514560
Filing Dt:
02/28/2000
Title:
System for erasing a memory cell
8
Patent #:
6362668
Issue Dt:
03/26/2002
Application #:
09534411
Filing Dt:
03/23/2000
Title:
Circuit and method for frequency generator control
9
Patent #:
6249466
Issue Dt:
06/19/2001
Application #:
09534412
Filing Dt:
03/23/2000
Title:
Row redundancy scheme
10
Patent #:
6368916
Issue Dt:
04/09/2002
Application #:
09534507
Filing Dt:
03/24/2000
Title:
METHOD FOR FABRICATING NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
11
Patent #:
6353336
Issue Dt:
03/05/2002
Application #:
09534663
Filing Dt:
03/24/2000
Title:
Electrical ID method for output driver
12
Patent #:
6288948
Issue Dt:
09/11/2001
Application #:
09539903
Filing Dt:
03/31/2000
Title:
Wired address compare circuit and method
13
Patent #:
6682772
Issue Dt:
01/27/2004
Application #:
09556255
Filing Dt:
04/24/2000
Title:
HIGH TEMPERATURE DEPOSITION OF PT/TIOX FOR BOTTOM ELECTRODES
14
Patent #:
6222768
Issue Dt:
04/24/2001
Application #:
09557832
Filing Dt:
04/26/2000
Title:
Auto adjusting window placement scheme for an NROM virtual ground array
15
Patent #:
6350665
Issue Dt:
02/26/2002
Application #:
09561292
Filing Dt:
04/28/2000
Title:
Semiconductor structure and method of making contacts and source and/or drain junctions in a semiconductor device
16
Patent #:
6348406
Issue Dt:
02/19/2002
Application #:
09586264
Filing Dt:
05/31/2000
Title:
Method for using a low dielectric constant layer as a semiconductor anti-reflective coating
17
Patent #:
6708190
Issue Dt:
03/16/2004
Application #:
09587708
Filing Dt:
06/05/2000
Title:
REDUCED PRODUCT TERM CARRY CHAIN
18
Patent #:
6359824
Issue Dt:
03/19/2002
Application #:
09592474
Filing Dt:
06/09/2000
Title:
Activation of wordline decoders to transfer a high voltage supply
19
Patent #:
6839873
Issue Dt:
01/04/2005
Application #:
09602938
Filing Dt:
06/23/2000
Title:
METHOD AND APPARATUS FOR PROGRAMMABLE LOGIC DEVICE (PLD) BUILT-IN-SELF-TEST (BIST)
20
Patent #:
6362675
Issue Dt:
03/26/2002
Application #:
09614157
Filing Dt:
07/11/2000
Title:
NONVOLATILE OCTAL LATCH AND D-TYPE REGISTER
21
Patent #:
6458656
Issue Dt:
10/01/2002
Application #:
09628130
Filing Dt:
07/28/2000
Title:
PROCESS FOR CREATING A FLASH MEMORY CELL USING A PHOTORESIST FLOW OPERATION
22
Patent #:
6495853
Issue Dt:
12/17/2002
Application #:
09636333
Filing Dt:
08/10/2000
Title:
SELF-ALIGNED GATE SEMICONDUCTOR
23
Patent #:
6275421
Issue Dt:
08/14/2001
Application #:
09661358
Filing Dt:
09/14/2000
Title:
Chip enable input buffer
24
Patent #:
6803318
Issue Dt:
10/12/2004
Application #:
09661666
Filing Dt:
09/14/2000
Title:
METHOD OF FORMING SELF ALIGNED CONTACTS
25
Patent #:
6654848
Issue Dt:
11/25/2003
Application #:
09662791
Filing Dt:
09/15/2000
Title:
SIMULTANEOUS EXECUTION COMMAND MODES IN A FLASH MEMORY DEVICE
26
Patent #:
6353566
Issue Dt:
03/05/2002
Application #:
09663552
Filing Dt:
09/18/2000
Title:
System and method for tracking sensing speed by an equalization pulse for a high density flash memory device
27
Patent #:
6436799
Issue Dt:
08/20/2002
Application #:
09670089
Filing Dt:
09/26/2000
Title:
PROCESS FOR ANNEALING SEMICONDUCTORS AND/OR INTEGRATED CIRCUITS
28
Patent #:
6320359
Issue Dt:
11/20/2001
Application #:
09671646
Filing Dt:
09/28/2000
Title:
DC-DC converter and controller and controller for detecting a malfunction therein
29
Patent #:
6388942
Issue Dt:
05/14/2002
Application #:
09672397
Filing Dt:
09/28/2000
Title:
DEEP PIPE SYNCHRONOUS SRAM
30
Patent #:
6813735
Issue Dt:
11/02/2004
Application #:
09676623
Filing Dt:
10/02/2000
Title:
I/O BASED COLUMN REDUNDANCY FOR VIRTUAL GROUND WITH 2-BIT CELL FLASH MEMORY
31
Patent #:
6414873
Issue Dt:
07/02/2002
Application #:
09681317
Filing Dt:
03/16/2001
Title:
NVSRAM WITH MULTIPLE NON-VOLATILE MEMORY CELLS FOR EACH SRAM MEMORY CELL
32
Patent #:
6904436
Issue Dt:
06/07/2005
Application #:
09684160
Filing Dt:
10/04/2000
Title:
METHOD AND SYSTEM FOR GENERATING A BIT ORDER DATA STRUCTURE OF CONFIGURATION BITS FROM A SCHEMATIC HIERARCHY
33
Patent #:
6366501
Issue Dt:
04/02/2002
Application #:
09686686
Filing Dt:
10/11/2000
Title:
Selective erasure of a non-volatile memory cell of a flash memory device
34
Patent #:
6349062
Issue Dt:
02/19/2002
Application #:
09686693
Filing Dt:
10/11/2000
Title:
Selective erasure of a non-volatile memory cell of a flash memory device
35
Patent #:
6490205
Issue Dt:
12/03/2002
Application #:
09697814
Filing Dt:
10/26/2000
Title:
METHOD OF ERASING A NON-VOLATILE MEMORY CELL USING A SUBSTRATE BIAS
36
Patent #:
6438031
Issue Dt:
08/20/2002
Application #:
09697815
Filing Dt:
10/26/2000
Title:
METHOD OF PROGRAMMING A NON-VOLATILE MEMORY CELL USING A SUBSTRATE BIAS
37
Patent #:
6653189
Issue Dt:
11/25/2003
Application #:
09699711
Filing Dt:
10/30/2000
Title:
SOURCE SIDE BORON IMPLANT AND DRAIN SIDE MDD IMPLANT FOR DEEP SUB 0.18 MICRON FLASH MEMORY
38
Patent #:
6524914
Issue Dt:
02/25/2003
Application #:
09699972
Filing Dt:
10/30/2000
Title:
SOURCE SIDE BORON IMPLANTING AND DIFFUSING DEVICE ARCHITECTURE FOR DEEP SUB 0.18 MICRON FLASH MEMORY
39
Patent #:
6417081
Issue Dt:
07/09/2002
Application #:
09721066
Filing Dt:
11/22/2000
Title:
PROCESS FOR REDUCTION OF CAPACITANCE OF A BITLINE FOR A NON-VOLATILE MEMORY CELL
40
Patent #:
6417696
Issue Dt:
07/09/2002
Application #:
09728350
Filing Dt:
12/01/2000
Title:
INTERFACE CIRCUIT FOR MIXED VOLTAGE I/O BUFFER TO PROVIDE GATE OXIDE PROTECTION
41
Patent #:
6468861
Issue Dt:
10/22/2002
Application #:
09738760
Filing Dt:
12/18/2000
Publication #:
US20010021133
Pub Dt:
09/13/2001
Title:
METHOD FOR MANUFACTURING NON-VOLATILE SEMICONDUCTOR MEMORY AND NON-VOLATILE SEMICONDUCTOR MEMORY MANUFACTURED THEREBY
42
Patent #:
6693042
Issue Dt:
02/17/2004
Application #:
09752539
Filing Dt:
12/28/2000
Title:
METHOD FOR ETCHING A DIELECTRIC LAYER FORMED UPON A BARRIER LAYER
43
Patent #:
6449190
Issue Dt:
09/10/2002
Application #:
09764965
Filing Dt:
01/17/2001
Title:
ADAPTIVE REFERENCE CELLS FOR A MEMORY DEVICE
44
Patent #:
6411150
Issue Dt:
06/25/2002
Application #:
09772716
Filing Dt:
01/30/2001
Title:
DYNAMIC CONTROL OF INPUT BUFFER THRESHOLDS
45
Patent #:
6904551
Issue Dt:
06/07/2005
Application #:
09790159
Filing Dt:
02/20/2001
Title:
METHOD AND CIRCUIT FOR SETUP AND HOLD DETECT PASS-FAIL TEST MODE
46
Patent #:
6384621
Issue Dt:
05/07/2002
Application #:
09790372
Filing Dt:
02/22/2001
Title:
PROGRAMMABLE TRANSMISSION LINE IMPEDANCE MATCHING CIRCUIT
47
Patent #:
6593725
Issue Dt:
07/15/2003
Application #:
09790749
Filing Dt:
02/22/2001
Title:
FEED-FORWARD CONTROL FOR DC-DC CONVERTERS
48
Patent #:
6344994
Issue Dt:
02/05/2002
Application #:
09795849
Filing Dt:
02/28/2001
Title:
Data retention characteristics as a result of high temperature bake
49
Patent #:
6307784
Issue Dt:
10/23/2001
Application #:
09795856
Filing Dt:
02/28/2001
Title:
Negative gate erase
50
Patent #:
6495413
Issue Dt:
12/17/2002
Application #:
09797394
Filing Dt:
02/28/2001
Publication #:
US20020117701
Pub Dt:
08/29/2002
Title:
STRUCTURE FOR MASKING INTEGRATED CAPACITORS OF PARTICULAR UTILITY FOR FERROELECTRIC MEMORY INTEGRATED CIRCUITS
51
Patent #:
6980575
Issue Dt:
12/27/2005
Application #:
09801409
Filing Dt:
03/08/2001
Title:
NEW TOPOLOGY ON VCSEL DRIVER
52
Patent #:
6459628
Issue Dt:
10/01/2002
Application #:
09824166
Filing Dt:
04/02/2001
Title:
SYSTEM AND METHOD TO FACILITATE STABILIZATION OF REFERENCE VOLTAGE SIGNALS IN MEMORY DEVICES
53
Patent #:
6859884
Issue Dt:
02/22/2005
Application #:
09826397
Filing Dt:
04/02/2001
Title:
METHOD AND CIRCUIT FOR ALLOWING A MICROPROCESSOR TO CHANGE ITS OPERATING FREQUENCY ON-THE-FLY
54
Patent #:
6493266
Issue Dt:
12/10/2002
Application #:
09829193
Filing Dt:
04/09/2001
Publication #:
US20030021155
Pub Dt:
01/30/2003
Title:
SOFT PROGRAM AND SOFT PROGRAM VERIFY OF THE CORE CELLS IN FLASH MEMORY ARRAY
55
Patent #:
6621761
Issue Dt:
09/16/2003
Application #:
09829518
Filing Dt:
04/09/2001
Publication #:
US20020012278
Pub Dt:
01/31/2002
Title:
BURST ARCHITECTURE FOR A FLASH MEMORY
56
Patent #:
6396749
Issue Dt:
05/28/2002
Application #:
09829657
Filing Dt:
04/10/2001
Publication #:
US20010048613
Pub Dt:
12/06/2001
Title:
DUAL-PORTED CAMS FOR A SIMULTANEOUS OPERATION FLASH MEMORY
57
Patent #:
6400608
Issue Dt:
06/04/2002
Application #:
09842288
Filing Dt:
04/25/2001
Title:
ACCURATE VERIFY APPARATUS AND METHOD FOR NOR FLASH MEMORY CELLS IN THE PRESENCE OF HIGH COLUMN LEAKAGE
58
Patent #:
6969684
Issue Dt:
11/29/2005
Application #:
09846119
Filing Dt:
04/30/2001
Title:
METHOD OF MAKING A PLANARIZED SEMICONDUCTOR STRUCTURE
59
Patent #:
6586296
Issue Dt:
07/01/2003
Application #:
09846666
Filing Dt:
04/30/2001
Title:
METHOD OF DOPING WELLS, CHANNELS, AND GATES OF DUAL GATE CMOS TECHNOLOGY WITH REDUCED NUMBER OF MASKS
60
Patent #:
6438037
Issue Dt:
08/20/2002
Application #:
09851773
Filing Dt:
05/09/2001
Title:
THRESHOLD VOLTAGE COMPACTING FOR NON-VOLATILE SEMICONDUCTOR MEMORY DESIGNS
61
Patent #:
6952778
Issue Dt:
10/04/2005
Application #:
09855868
Filing Dt:
05/14/2001
Title:
PROTECTING ACCESS TO MICROCONTROLLER MEMORY BLOCKS
62
Patent #:
6535446
Issue Dt:
03/18/2003
Application #:
09864851
Filing Dt:
05/24/2001
Publication #:
US20020176304
Pub Dt:
11/28/2002
Title:
TWO STAGE LOW VOLTAGE FERROELECTRIC BOOST CIRCUIT
63
Patent #:
6430093
Issue Dt:
08/06/2002
Application #:
09864858
Filing Dt:
05/24/2001
Title:
CMOS BOOSTING CIRCUIT UTILIZING FERROELECTRIC CAPACITORS
64
Patent #:
6515902
Issue Dt:
02/04/2003
Application #:
09873643
Filing Dt:
06/04/2001
Title:
METHOD AND APPARATUS FOR BOOSTING BITLINES FOR LOW VCC READ
65
Patent #:
7185162
Issue Dt:
02/27/2007
Application #:
09875599
Filing Dt:
06/05/2001
Title:
METHOD AND APPARATUS FOR PROGRAMMING A FLASH MEMORY
66
Patent #:
6404682
Issue Dt:
06/11/2002
Application #:
09876981
Filing Dt:
06/08/2001
Title:
WIRED ADDRESS COMPARE CIRCUIT AND METHOD
67
Patent #:
6492710
Issue Dt:
12/10/2002
Application #:
09877905
Filing Dt:
06/07/2001
Title:
SUBSTRATE ISOLATED TRANSISTOR
68
Patent #:
6456531
Issue Dt:
09/24/2002
Application #:
09884402
Filing Dt:
06/19/2001
Title:
METHOD OF DRAIN AVALANCHE PROGRAMMING OF A NON-VOLATILE MEMORY CELL
69
Patent #:
6456536
Issue Dt:
09/24/2002
Application #:
09884409
Filing Dt:
06/19/2001
Title:
METHOD OF PROGRAMMING A NON-VOLATILE MEMORY CELL USING A SUBSTRATE BIAS
70
Patent #:
6370061
Issue Dt:
04/09/2002
Application #:
09884583
Filing Dt:
06/19/2001
Title:
Ceiling test mode to characterize the threshold voltage distribution of over programmed memory cells
71
Patent #:
6512701
Issue Dt:
01/28/2003
Application #:
09886861
Filing Dt:
06/21/2001
Title:
ERASE METHOD FOR DUAL BIT VIRTUAL GROUND FLASH
72
Patent #:
6532169
Issue Dt:
03/11/2003
Application #:
09892164
Filing Dt:
06/26/2001
Title:
SONOS LATCH AND APPLICATION
73
Patent #:
7149316
Issue Dt:
12/12/2006
Application #:
09893048
Filing Dt:
06/26/2001
Title:
MICROCONTROLLER HAVING AN ON-CHIP HIGH GAIN AMPLIFIER
74
Patent #:
6981090
Issue Dt:
12/27/2005
Application #:
09893050
Filing Dt:
06/26/2001
Title:
MULTIPLE USE OF MICROCONTROLLER PAD
75
Patent #:
6531366
Issue Dt:
03/11/2003
Application #:
09904328
Filing Dt:
07/12/2001
Title:
METHOD AND STRUCTURE FOR HIGH-VOLTAGE DEVICE WITH SELF-ALIGNED GRADED JUNCTIONS
76
Patent #:
6941336
Issue Dt:
09/06/2005
Application #:
09909047
Filing Dt:
07/18/2001
Title:
PROGRAMMABLE ANALOG SYSTEM ARCHITECTURE
77
Patent #:
6630643
Issue Dt:
10/07/2003
Application #:
09916533
Filing Dt:
07/30/2001
Publication #:
US20030019851
Pub Dt:
01/30/2003
Title:
METHOD AND STRUCTURE FOR FORMING METALLIC INTERCONNECTIONS USING DIRECTED THERMAL DIFFUSION
78
Patent #:
6957242
Issue Dt:
10/18/2005
Application #:
09923461
Filing Dt:
08/06/2001
Title:
NONINTERFERING MULTIPLY-MAC (MULTIPLY ACCUMULATE) CIRCUIT
79
Patent #:
6724220
Issue Dt:
04/20/2004
Application #:
09924734
Filing Dt:
08/07/2001
Title:
PROGRAMMABLE MICROCONTROLLER ARCHITECTURE (MIXED ANALOG/DIGITAL)
80
Patent #:
6910164
Issue Dt:
06/21/2005
Application #:
09925721
Filing Dt:
08/09/2001
Title:
HIGH-RESISTANCE CONTACT DETECTION TEST MODE
81
Patent #:
7092980
Issue Dt:
08/15/2006
Application #:
09929891
Filing Dt:
08/14/2001
Title:
PROGRAMMING ARCHITECTURE FOR A PROGRAMMABLE ANALOG SYSTEM
82
Patent #:
6910126
Issue Dt:
06/21/2005
Application #:
09930021
Filing Dt:
08/14/2001
Title:
PROGRAMMING METHODOLOGY AND ARCHITECTURE FOR A PROGRAMMABLE ANALOG SYSTEM
83
Patent #:
7152177
Issue Dt:
12/19/2006
Application #:
09939751
Filing Dt:
08/28/2001
Publication #:
US20020112192
Pub Dt:
08/15/2002
Title:
A SYSTEM FOR GENERATING A MAIN CLOCK FOM AN OSCILLATION SIGNAL BASED UPON A WAKEUP SIGNAL OF A PREDETERMINED CYCLE OR CONDITION OF THE OSCILLATION SIGNAL
84
Patent #:
6979619
Issue Dt:
12/27/2005
Application #:
09941370
Filing Dt:
08/28/2001
Title:
FLASH MEMORY DEVICE AND A METHOD OF FABRICATION THEREOF
85
Patent #:
8149048
Issue Dt:
04/03/2012
Application #:
09943062
Filing Dt:
08/29/2001
Title:
APPARATUS AND METHOD FOR PROGRAMMABLE POWER MANAGEMENT IN A PROGRAMMABLE ANALOG CIRCUIT BLOCK
86
Patent #:
7003545
Issue Dt:
02/21/2006
Application #:
09951685
Filing Dt:
09/11/2001
Title:
HIGH PERFORMANCE CARRY CHAIN WITH REDUCED MACROCELL LOGIC AND FAST CARRY LOOKHEAD
87
Patent #:
6825689
Issue Dt:
11/30/2004
Application #:
09953423
Filing Dt:
09/14/2001
Title:
CONFIGURABLE INPUT/OUTPUT INTERFACE FOR A MICROCONTROLLER
88
Patent #:
6922794
Issue Dt:
07/26/2005
Application #:
09960519
Filing Dt:
09/24/2001
Publication #:
US20020184561
Pub Dt:
12/05/2002
Title:
MICROCOMPUTER WITH DEBUG SUPPORTING FUNCTION
89
Patent #:
6645801
Issue Dt:
11/11/2003
Application #:
09968456
Filing Dt:
10/01/2001
Title:
SALICIDED GATE FOR VIRTUAL GROUND ARRAYS
90
Patent #:
6967511
Issue Dt:
11/22/2005
Application #:
09969311
Filing Dt:
10/01/2001
Title:
METHOD FOR SYNCHRONIZING AND RESETTING CLOCK SIGNALS SUPPLIED TO MULTIPLE PROGRAMMABLE ANALOG BLOCKS
91
Patent #:
7023257
Issue Dt:
04/04/2006
Application #:
09969313
Filing Dt:
10/01/2001
Title:
ARCHITECTURE FOR SYNCHRONIZING AND RESETTING CLOCK SIGNALS SUPPLIED TO MULTIPLE PROGRAMMABLE ANALOG BLOCKS
92
Patent #:
6823282
Issue Dt:
11/23/2004
Application #:
09972003
Filing Dt:
10/05/2001
Title:
TEST ARCHITECTURE FOR MICROCONTROLLER PROVIDING FOR A SERIAL COMMUNICATION INTERFACE
93
Patent #:
6642586
Issue Dt:
11/04/2003
Application #:
09973743
Filing Dt:
10/11/2001
Publication #:
US20020105037
Pub Dt:
08/08/2002
Title:
SEMICONDUCTOR MEMORY CAPABLE OF BEING DRIVEN AT LOW VOLTAGE AND ITS MANUFACTURE METHOD
94
Patent #:
7010773
Issue Dt:
03/07/2006
Application #:
09989571
Filing Dt:
11/19/2001
Title:
METHOD FOR DESIGNING A CIRCUIT FOR PROGRAMMABLE MICROCONTROLLERS
95
Patent #:
7844437
Issue Dt:
11/30/2010
Application #:
09989762
Filing Dt:
11/19/2001
Title:
SYSTEM AND METHOD FOR PERFORMING NEXT PLACEMENTS AND PRUNING OF DISALLOWED PLACEMENTS FOR PROGRAMMING AN INTEGRATED CIRCUIT
96
Patent #:
6701487
Issue Dt:
03/02/2004
Application #:
09989775
Filing Dt:
11/19/2001
Title:
USER DEFINED NAMES FOR REGISTERS IN MEMORY BANKS DERIVED FROM CONFIGURATIONS
97
Patent #:
7086014
Issue Dt:
08/01/2006
Application #:
09989808
Filing Dt:
11/19/2001
Title:
AUTOMATIC GENERATION OF APPLICATION PROGRAM INTERFACES, SOURCE CODE, INTERRUPTS, AND DATASHEETS FOR MICROCONTROLLER PROGRAMMING
98
Patent #:
6785881
Issue Dt:
08/31/2004
Application #:
09989815
Filing Dt:
11/19/2001
Title:
DATA DRIVEN METHOD AND SYSTEM FOR MONITORING HARDWARE RESOURCE USAGE FOR PROGRAMMING AN ELECTRONIC DEVICE
99
Patent #:
6715132
Issue Dt:
03/30/2004
Application #:
09989816
Filing Dt:
11/19/2001
Title:
DATASHEET BROWSING AND CREATION WITH DATA-DRIVEN DATASHEET TABS WITHIN A MICROCONTROLLER DESIGN TOOL
100
Patent #:
6971004
Issue Dt:
11/29/2005
Application #:
09989817
Filing Dt:
11/19/2001
Title:
SYSTEM AND METHOD OF DYNAMICALLY RECONFIGURING A PROGRAMMABLE INTEGRATED CIRCUIT
Assignor
1
MORGAN STANLEY SENIOR FUNDING, INC.
Exec Dt:
07/31/2019
Assignee
1
MUFG UNION BANK, N.A.
350 CALIFORNIA STREET
17TH FLOOR
SAN FRANCISCO, CALIFORNIA 94104
Correspondence name and address
SKADDEN, ARPS, SLATE, MEAGHER & FLOM LLP
FOUR TIMES SQUARE
ATTN: JUSTIN C. SELLE
NEW YORK, NY 10036

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