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06/01/2004
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10306529
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11/27/2002
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07/11/2006
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09/21/2004
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12/02/2002
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05/04/2004
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12/05/2002
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05/18/2004
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12/05/2002
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09/13/2005
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12/06/2002
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12/07/2004
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03/21/2006
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12/10/2002
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06/10/2004
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03/11/2008
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12/12/2002
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06/26/2003
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08/24/2004
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12/13/2002
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10/23/2007
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12/20/2002
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12/19/2006
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05/17/2005
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01/14/2003
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06/20/2006
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08/03/2004
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01/29/2003
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02/28/2006
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01/31/2003
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09/04/2003
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10/28/2003
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08/28/2003
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07/20/2004
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05/11/2004
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02/04/2003
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05/03/2005
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02/04/2003
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04/20/2004
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07/27/2004
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02/10/2003
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01/06/2004
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02/18/2003
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03/22/2005
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02/27/2003
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09/25/2003
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06/27/2006
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02/27/2003
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05/17/2005
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03/05/2003
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08/24/2004
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03/05/2003
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09/21/2004
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09/09/2004
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06/01/2004
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03/05/2003
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08/24/2004
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03/05/2003
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04/11/2006
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06/28/2005
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03/11/2003
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09/16/2004
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06/01/2004
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07/05/2005
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09/25/2003
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12/23/2003
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03/21/2003
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11/01/2011
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03/31/2003
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10/02/2003
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04/26/2005
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03/28/2003
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04/06/2004
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03/31/2003
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10/21/2004
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11/23/2004
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04/24/2003
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08/17/2004
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04/24/2003
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03/01/2005
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05/03/2003
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08/10/2004
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09/13/2005
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05/06/2003
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09/14/2004
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06/19/2007
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07/12/2005
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12/23/2004
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10/18/2005
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Title:
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STRUCTURE AND METHOD TO REDUCE DRAIN INDUCED BARRIER LOWERING
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Patent #:
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Issue Dt:
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10/03/2006
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Application #:
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10636337
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Filing Dt:
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08/06/2003
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Publication #:
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Pub Dt:
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02/10/2005
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Title:
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LOW POWER CHARGE PUMP
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Patent #:
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Issue Dt:
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08/09/2005
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Application #:
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10649994
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Filing Dt:
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08/28/2003
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Publication #:
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Pub Dt:
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03/11/2004
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Title:
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SEMICONDUCTOR MEMORY CAPABLE OF BEING DRIVEN AT LOW VOLTAGE AND ITS MANUFACTURE METHOD
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Patent #:
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Issue Dt:
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03/08/2005
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Application #:
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10652035
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Filing Dt:
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09/02/2003
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Publication #:
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Pub Dt:
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06/10/2004
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Title:
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MEMORY CIRCUIT WITH REDUNDANT CONFIGURATION
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Patent #:
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Issue Dt:
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05/31/2005
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Application #:
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10654739
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Filing Dt:
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09/03/2003
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Title:
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PATTERNING FOR ELONGATED VSS CONTACT ON FLASH MEMORY
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Patent #:
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Issue Dt:
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02/08/2005
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Application #:
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10658428
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Filing Dt:
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09/10/2003
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Publication #:
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Pub Dt:
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05/27/2004
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Title:
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SEMICONDUCTOR MEMORY ENABLING CORRECT SUBSTITUTION OF REDUNDANT CELL ARRAY
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Patent #:
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Issue Dt:
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04/26/2005
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Application #:
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10672093
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Filing Dt:
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09/26/2003
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Title:
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METHOD OF MANUFACTURING A SEMICONDUCTOR MEMORY WITH DEUTERATED MATERIALS
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Patent #:
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Issue Dt:
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12/27/2005
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Application #:
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10677031
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Filing Dt:
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10/01/2003
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Title:
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MEMORY DEVICE AND METHOD
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Patent #:
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Issue Dt:
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12/06/2005
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Application #:
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10677073
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Filing Dt:
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10/01/2003
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Title:
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MEMORY DEVICE AND METHOD
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Patent #:
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Issue Dt:
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11/22/2005
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Application #:
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10677790
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Filing Dt:
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10/02/2003
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Publication #:
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Pub Dt:
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04/07/2005
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Title:
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MEMORY DEVICE AND METHOD USING POSITIVE GATE STRESS TO RECOVER OVERERASED CELL
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Patent #:
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Issue Dt:
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05/24/2005
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Application #:
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10678446
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Filing Dt:
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10/03/2003
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Title:
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EFFICIENT AND ACCURATE SENSING CIRCUIT AND TECHNIQUE FOR LOW VOLTAGE FLASH MEMORY DEVICES
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Patent #:
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Issue Dt:
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03/21/2006
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Application #:
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10699903
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Filing Dt:
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11/03/2003
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Publication #:
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Pub Dt:
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05/05/2005
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Title:
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SIDEWALL FORMATION FOR HIGH DENSITY POLYMER MEMORY ELEMENT ARRAY
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Patent #:
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Issue Dt:
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03/22/2005
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Application #:
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10701780
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Filing Dt:
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11/05/2003
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Title:
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METHOD AND STRUCTURE FOR PROTECTING NROM DEVICES FROM INDUCED CHARGE DAMAGE DURING DEVICE FABRICATION
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Patent #:
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Issue Dt:
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11/22/2005
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Application #:
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10708379
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Filing Dt:
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02/27/2004
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Publication #:
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Pub Dt:
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09/01/2005
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Title:
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METHOD AND APPARATUS FOR IMPROVING CYCLE TIME IN A QUAD DATA RATE SRAM DEVICE
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Patent #:
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Issue Dt:
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09/27/2005
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Application #:
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10717622
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Filing Dt:
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11/21/2003
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Publication #:
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Pub Dt:
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05/27/2004
| | | | |
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Title:
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NONVOLATILE SEMICONDUCTOR MEMORY DEVICE STORING TWO-BIT INFORMATION
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Patent #:
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Issue Dt:
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02/13/2007
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Application #:
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10719108
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Filing Dt:
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11/21/2003
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Publication #:
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Pub Dt:
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05/26/2005
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Title:
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IMPRINT-FREE CODING FOR FERROELECTRIC NONVOLATILE COUNTERS
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Patent #:
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Issue Dt:
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09/27/2005
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Application #:
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10721643
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Filing Dt:
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11/24/2003
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Title:
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READING FLASH MEMORY
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Patent #:
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Issue Dt:
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11/08/2005
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Application #:
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10729732
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Filing Dt:
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12/05/2003
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Title:
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HARD MASK SPACER FOR SUBLITHOGRAPHIC BITLINE
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Patent #:
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Issue Dt:
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10/18/2005
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Application #:
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10731659
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Filing Dt:
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12/09/2003
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Title:
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PROCESS FOR FABRICATION OF NITRIDE LAYER WITH REDUCED HYDROGEN CONTENT IN ONO STRUCTURE IN SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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05/01/2007
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Application #:
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10756585
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Filing Dt:
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01/12/2004
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Title:
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METHOD AND STRUCTURE FOR CONTROLLING FLOATING BODY EFFECTS
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Patent #:
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Issue Dt:
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03/28/2006
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Application #:
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10758173
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Filing Dt:
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01/14/2004
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Title:
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ELECTROSTATIC DISCHARGE PERFORMANCE OF A SILICON STRUCTURE AND EFFICIENT USE OF AREA WITH ELECTROSTATIC DISCHARGE PROTECTIVE DEVICE UNDER THE PAD APPROACH AND ADJUSTMENT OF VIA CONFIGURATION THERETO TO CONTROL DRAIN JUNCTION RESISTANCE
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Patent #:
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Issue Dt:
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04/11/2006
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Application #:
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10759855
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Filing Dt:
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01/16/2004
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Title:
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FLEXIBLE CASCODE AMPLIFIER CIRCUIT WITH HIGH GAIN FOR FLASH MEMORY CELLS
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Patent #:
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Issue Dt:
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11/16/2004
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Application #:
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10762071
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Filing Dt:
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01/20/2004
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Title:
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METHOD FOR ERASING A MEMORY SECTOR IN VIRTUAL GROUND ARCHITECTURE WITH REDUCED LEAKAGE CURRENT
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Patent #:
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Issue Dt:
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11/27/2007
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Application #:
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10762445
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Filing Dt:
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01/22/2004
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Publication #:
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Pub Dt:
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07/28/2005
| | | | |
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Title:
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STRUCTURE AND METHOD FOR LOW VSS RESISTANCE AND REDUCED DIBL IN A FLOATING GATE MEMORY CELL
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Patent #:
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Issue Dt:
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01/17/2006
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Application #:
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10768188
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Filing Dt:
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02/02/2004
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Publication #:
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Pub Dt:
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11/04/2004
| | | | |
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Title:
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SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF
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Patent #:
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Issue Dt:
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03/28/2006
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Application #:
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10770245
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Filing Dt:
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02/02/2004
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Title:
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DISPOSABLE HARD MASK FOR MEMORY BITLINE SCALING
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Patent #:
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Issue Dt:
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01/24/2006
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Application #:
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10770260
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Filing Dt:
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02/02/2004
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Title:
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FLASH MEMORY CELL WITH UV PROTECTIVE LAYER
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Patent #:
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Issue Dt:
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08/09/2005
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Application #:
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10770673
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Filing Dt:
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02/02/2004
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Title:
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BITLINE HARD MASK SPACER FLOW FOR MEMORY CELL SCALING
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Patent #:
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|
Issue Dt:
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06/01/2010
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Application #:
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10775668
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Filing Dt:
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02/09/2004
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Publication #:
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Pub Dt:
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08/11/2005
| | | | |
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Title:
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ENCODING SCHEME FOR DATA TRANSFER
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Patent #:
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Issue Dt:
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05/30/2006
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Application #:
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10778504
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Filing Dt:
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02/13/2004
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Title:
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METHOD AND CIRCUIT FOR HIGH SPEED TRANSMISSION GATE LOGIC
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Patent #:
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Issue Dt:
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11/29/2005
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Application #:
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10785599
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Filing Dt:
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02/24/2004
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Title:
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POWER SUPPLY DETECTING INPUT RECEIVER CIRCUIT AND METHOD
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Patent #:
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Issue Dt:
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02/13/2007
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Application #:
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10798657
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Filing Dt:
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03/11/2004
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Title:
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LOW DUTY CYCLE DISTORTION DIFFERENTIAL TO CMOS TRANSLATOR
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Patent #:
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Issue Dt:
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12/12/2006
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Application #:
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10803011
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Filing Dt:
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03/17/2004
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Publication #:
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Pub Dt:
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09/22/2005
| | | | |
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Title:
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LATCH CIRCUIT AND METHOD FOR WRITING AND READING VOLATILE AND NON-VOLATILE DATA TO AND FROM THE LATCH
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Patent #:
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Issue Dt:
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05/22/2007
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Application #:
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10803030
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Filing Dt:
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03/16/2004
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Title:
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PROGRAMMABLE MICROCONTROLLER ARCHITECTURE (MIXED ANALOG/DIGITAL)
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Patent #:
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Issue Dt:
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03/28/2006
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Application #:
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10806150
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Filing Dt:
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03/23/2004
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Publication #:
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Pub Dt:
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02/10/2005
| | | | |
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Title:
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DC/DC CONVERTER
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Patent #:
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Issue Dt:
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04/25/2006
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Application #:
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10807909
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Filing Dt:
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03/24/2004
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Title:
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PROTECTION OF INTEGRATED CIRCUIT GATES DURING METALLIZATION PROCESSES
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Patent #:
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Issue Dt:
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04/25/2006
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Application #:
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10808532
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Filing Dt:
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03/25/2004
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Publication #:
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Pub Dt:
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04/28/2005
| | | | |
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Title:
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SEMICONDUCTOR INTEGRATED CIRCUIT USING BAND-GAP REFERENCE CIRCUIT
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Patent #:
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Issue Dt:
|
03/03/2009
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Application #:
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10817186
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Filing Dt:
|
04/02/2004
|
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Title:
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USING ORGANIC SEMICONDUCTOR MEMORY IN CONJUNCTION WITH A MEMS ACTUATOR FOR AN ULTRA HIGH DENSITY MEMORY
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