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Reel/Frame:050896/0366   Pages: 51
Recorded: 10/28/2019
Attorney Dkt #:127110/12
Conveyance: ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN INTELLECTUAL PROPERTY
Total properties: 1522
Page 7 of 16
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
1
Patent #:
8445966
Issue Dt:
05/21/2013
Application #:
11614053
Filing Dt:
12/20/2006
Publication #:
US20080151590
Pub Dt:
06/26/2008
Title:
METHOD AND APPARATUS FOR PROTECTION AGAINST PROCESS-INDUCED CHARGING
2
Patent #:
8261091
Issue Dt:
09/04/2012
Application #:
11614306
Filing Dt:
12/21/2006
Publication #:
US20080155271
Pub Dt:
06/26/2008
Title:
SOLID-STATE MEMORY-BASED GENERATION AND HANDLING OF SECURITY AUTHENTICATION TOKENS
3
Patent #:
7863175
Issue Dt:
01/04/2011
Application #:
11614801
Filing Dt:
12/21/2006
Publication #:
US20080149986
Pub Dt:
06/26/2008
Title:
ZERO INTERFACE POLYSILICON TO POLYSILICON GATE FOR FLASH MEMORY
4
Patent #:
7463525
Issue Dt:
12/09/2008
Application #:
11615280
Filing Dt:
12/22/2006
Publication #:
US20080151634
Pub Dt:
06/26/2008
Title:
NEGATIVE WORDLINE BIAS FOR REDUCTION OF LEAKAGE CURRENT DURING FLASH MEMORY OPERATION
5
Patent #:
7687360
Issue Dt:
03/30/2010
Application #:
11615365
Filing Dt:
12/22/2006
Publication #:
US20080149988
Pub Dt:
06/26/2008
Title:
METHOD OF FORMING SPACED-APART CHARGE TRAPPING STACKS
6
Patent #:
8486782
Issue Dt:
07/16/2013
Application #:
11615489
Filing Dt:
12/22/2006
Publication #:
US20080149989
Pub Dt:
06/26/2008
Title:
FLASH MEMORY DEVICES AND METHODS FOR FABRICATING THE SAME
7
Patent #:
8110412
Issue Dt:
02/07/2012
Application #:
11615583
Filing Dt:
12/22/2006
Publication #:
US20080153180
Pub Dt:
06/26/2008
Title:
INTEGRATED CIRCUIT WAFER SYSTEM WITH CONTROL STRATEGY
8
Patent #:
7670959
Issue Dt:
03/02/2010
Application #:
11616085
Filing Dt:
12/26/2006
Publication #:
US20080153298
Pub Dt:
06/26/2008
Title:
MEMORY DEVICE ETCH METHODS
9
Patent #:
NONE
Issue Dt:
Application #:
11616385
Filing Dt:
12/27/2006
Publication #:
US20080162353
Pub Dt:
07/03/2008
Title:
PERSONAL DIGITAL RIGHTS MANAGEMENT AGENT-SERVER
10
Patent #:
7879718
Issue Dt:
02/01/2011
Application #:
11616544
Filing Dt:
12/27/2006
Publication #:
US20080157160
Pub Dt:
07/03/2008
Title:
LOCAL INTERCONNECT HAVING INCREASED MISALIGNMENT TOLERANCE
11
Patent #:
8076715
Issue Dt:
12/13/2011
Application #:
11616718
Filing Dt:
12/27/2006
Publication #:
US20080157263
Pub Dt:
07/03/2008
Title:
DUAL-BIT MEMORY DEVICE HAVING ISOLATION MATERIAL DISPOSED UNDERNEATH A BIT LINE SHARED BY ADJACENT DUAL-BIT MEMORY CELLS
12
Patent #:
8230154
Issue Dt:
07/24/2012
Application #:
11625150
Filing Dt:
01/19/2007
Publication #:
US20080177930
Pub Dt:
07/24/2008
Title:
FULLY ASSOCIATIVE BANKING FOR MEMORY
13
Patent #:
7894243
Issue Dt:
02/22/2011
Application #:
11633800
Filing Dt:
12/05/2006
Publication #:
US20080130381
Pub Dt:
06/05/2008
Title:
METHODS OF PROGRAMMING AND ERASING RESISTIVE MEMORY DEVICES
14
Patent #:
8093698
Issue Dt:
01/10/2012
Application #:
11633844
Filing Dt:
12/05/2006
Publication #:
US20080130195
Pub Dt:
06/05/2008
Title:
GETTERING/STOP LAYER FOR PREVENTION OF REDUCTION OF INSULATING OXIDE IN METAL-INSULATOR-METAL DEVICE
15
Patent #:
8089113
Issue Dt:
01/03/2012
Application #:
11633929
Filing Dt:
12/05/2006
Publication #:
US20080132068
Pub Dt:
06/05/2008
Title:
DAMASCENE METAL-INSULATOR-METAL (MIM) DEVICE
16
Patent #:
8077495
Issue Dt:
12/13/2011
Application #:
11633940
Filing Dt:
12/05/2006
Publication #:
US20080133818
Pub Dt:
06/05/2008
Title:
METHOD OF PROGRAMMING, ERASING AND REPAIRING A MEMORY DEVICE
17
Patent #:
7724075
Issue Dt:
05/25/2010
Application #:
11634776
Filing Dt:
12/06/2006
Publication #:
US20080136381
Pub Dt:
06/12/2008
Title:
METHOD TO PROVIDE A HIGHER REFERENCE VOLTAGE AT A LOWER POWER SUPPLY IN FLASH MEMORY DEVICES
18
Patent #:
9171936
Issue Dt:
10/27/2015
Application #:
11634777
Filing Dt:
12/06/2006
Publication #:
US20080135902
Pub Dt:
06/12/2008
Title:
Barrier region underlying source/drain regions for dual-bit memory devices
19
Patent #:
8902172
Issue Dt:
12/02/2014
Application #:
11636060
Filing Dt:
12/07/2006
Publication #:
US20080136792
Pub Dt:
06/12/2008
Title:
Preventing unintentional activation of a touch-sensor button caused by a presence of conductive liquid on the touch-sensor button
20
Patent #:
7450419
Issue Dt:
11/11/2008
Application #:
11636111
Filing Dt:
12/07/2006
Publication #:
US20070180184
Pub Dt:
08/02/2007
Title:
SEMICONDUCTOR DEVICE AND CONTROL METHOD THEREFOR
21
Patent #:
7821331
Issue Dt:
10/26/2010
Application #:
11636116
Filing Dt:
12/06/2006
Publication #:
US20080111617
Pub Dt:
05/15/2008
Title:
REDUCTION OF TEMPERATURE DEPENDENCE OF A REFERENCE VOLTAGE
22
Patent #:
9159568
Issue Dt:
10/13/2015
Application #:
11639666
Filing Dt:
12/15/2006
Publication #:
US20080142875
Pub Dt:
06/19/2008
Title:
METHOD FOR FABRICATING MEMORY CELLS HAVING SPLIT CHARGE STORAGE NODES
23
Patent #:
8422668
Issue Dt:
04/16/2013
Application #:
11639683
Filing Dt:
12/15/2006
Title:
TABLE LOOKUP OPERATION ON MASKED DATA
24
Patent #:
7989328
Issue Dt:
08/02/2011
Application #:
11641646
Filing Dt:
12/19/2006
Publication #:
US20080144354
Pub Dt:
06/19/2008
Title:
RESISTIVE MEMORY ARRAY USING P-I-N DIODE SELECT DEVICE AND METHODS OF FABRICATION THEREOF
25
Patent #:
8373664
Issue Dt:
02/12/2013
Application #:
11642025
Filing Dt:
12/18/2006
Publication #:
US20080142352
Pub Dt:
06/19/2008
Title:
TWO CIRCUIT BOARD TOUCH-SENSOR DEVICE
26
Patent #:
7944020
Issue Dt:
05/17/2011
Application #:
11644535
Filing Dt:
12/22/2006
Title:
REVERSE MIM CAPACITOR
27
Patent #:
7518916
Issue Dt:
04/14/2009
Application #:
11644819
Filing Dt:
12/22/2006
Publication #:
US20080151616
Pub Dt:
06/26/2008
Title:
METHOD AND APPARATUS TO PROGRAM BOTH SIDES OF A NON-VOLATILE STATIC RANDOM ACCESS MEMORY
28
Patent #:
7977218
Issue Dt:
07/12/2011
Application #:
11645475
Filing Dt:
12/26/2006
Publication #:
US20080153269
Pub Dt:
06/26/2008
Title:
THIN OXIDE DUMMY TILING AS CHARGE PROTECTION
29
Patent #:
7671405
Issue Dt:
03/02/2010
Application #:
11646157
Filing Dt:
12/26/2006
Publication #:
US20080153274
Pub Dt:
06/26/2008
Title:
DEEP BITLINE IMPLANT TO AVOID PROGRAM DISTURB
30
Patent #:
7414453
Issue Dt:
08/19/2008
Application #:
11650485
Filing Dt:
01/08/2007
Publication #:
US20070115041
Pub Dt:
05/24/2007
Title:
LEVEL CONVERSION CIRCUIT
31
Patent #:
9111985
Issue Dt:
08/18/2015
Application #:
11652785
Filing Dt:
01/11/2007
Title:
Shallow bipolar junction transistor
32
Patent #:
8129788
Issue Dt:
03/06/2012
Application #:
11656072
Filing Dt:
01/22/2007
Title:
CAPACITOR TRIGGERED SILICON CONTROLLED RECTIFIER
33
Patent #:
7759745
Issue Dt:
07/20/2010
Application #:
11656437
Filing Dt:
01/23/2007
Publication #:
US20070114617
Pub Dt:
05/24/2007
Title:
SEMICONDUCTOR MEMORY DEVICE
34
Patent #:
7852669
Issue Dt:
12/14/2010
Application #:
11687436
Filing Dt:
03/16/2007
Publication #:
US20080225607
Pub Dt:
09/18/2008
Title:
DIVISION-BASED SENSING AND PARTITIONING OF ELECTRONIC MEMORY
35
Patent #:
7835189
Issue Dt:
11/16/2010
Application #:
11687492
Filing Dt:
03/16/2007
Publication #:
US20080225596
Pub Dt:
09/18/2008
Title:
HIGH ACCURACY ADAPTIVE PROGRAMMING
36
Patent #:
9098641
Issue Dt:
08/04/2015
Application #:
11698660
Filing Dt:
01/25/2007
Title:
Configurable bus
37
Patent #:
8564042
Issue Dt:
10/22/2013
Application #:
11702845
Filing Dt:
02/05/2007
Publication #:
US20070205454
Pub Dt:
09/06/2007
Title:
DUAL STORAGE NODE MEMORY
38
Patent #:
8742486
Issue Dt:
06/03/2014
Application #:
11702846
Filing Dt:
02/05/2007
Publication #:
US20070205455
Pub Dt:
09/06/2007
Title:
FLASH MEMORY CELLS HAVING TRENCHED STORAGE ELEMENTS
39
Patent #:
7479913
Issue Dt:
01/20/2009
Application #:
11703873
Filing Dt:
02/07/2007
Title:
CONFIGURABLE ANALOG TO DIGITAL CONVERTER
40
Patent #:
7679422
Issue Dt:
03/16/2010
Application #:
11704589
Filing Dt:
02/08/2007
Title:
CONFIGURABLE SWITCHED CAPACITOR BLOCK
41
Patent #:
8067948
Issue Dt:
11/29/2011
Application #:
11709866
Filing Dt:
02/21/2007
Publication #:
US20080312857
Pub Dt:
12/18/2008
Title:
INPUT/OUTPUT MULTIPLEXER BUS
42
Patent #:
7906982
Issue Dt:
03/15/2011
Application #:
11711382
Filing Dt:
02/27/2007
Title:
INTERFACE APPARATUS AND METHODS OF TESTING INTEGRATED CIRCUITS USING THE SAME
43
Patent #:
7747911
Issue Dt:
06/29/2010
Application #:
11712069
Filing Dt:
02/27/2007
Title:
SELF VERIFICATION OF NON-VOLATILE MEMORY
44
Patent #:
8143664
Issue Dt:
03/27/2012
Application #:
11712299
Filing Dt:
02/27/2007
Publication #:
US20070210373
Pub Dt:
09/13/2007
Title:
SEMICONDUCTOR DEVICE HAVING LOWER LEAKAGE CURRENT BETWEEN SEMICONDUCTOR SUBSTRATE AND BIT LINES
45
Patent #:
7557587
Issue Dt:
07/07/2009
Application #:
11723599
Filing Dt:
03/21/2007
Publication #:
US20070170929
Pub Dt:
07/26/2007
Title:
CONTROL APPARATUS, SEMICONDUCTOR INTEGRATED CIRCUIT APPARATUS, AND SOURCE VOLTAGE SUPPLY CONTROL SYSTEM
46
Patent #:
9318333
Issue Dt:
04/19/2016
Application #:
11724725
Filing Dt:
03/16/2007
Publication #:
US20080157199
Pub Dt:
07/03/2008
Title:
Dielectric extension to mitigate short channel effects
47
Patent #:
7553727
Issue Dt:
06/30/2009
Application #:
11724726
Filing Dt:
03/16/2007
Publication #:
US20080150006
Pub Dt:
06/26/2008
Title:
USING IMPLANTED POLY-1 TO IMPROVE CHARGING PROTECTION IN DUAL-POLY PROCESS
48
Patent #:
8085615
Issue Dt:
12/27/2011
Application #:
11724773
Filing Dt:
03/16/2007
Publication #:
US20080158935
Pub Dt:
07/03/2008
Title:
MULTI-STATE RESISTANCE CHANGING MEMORY WITH A WORD LINE DRIVER FOR APPLYING A SAME PROGRAM VOLTAGE TO THE WORD LINE
49
Patent #:
7561465
Issue Dt:
07/14/2009
Application #:
11724774
Filing Dt:
03/16/2007
Publication #:
US20080175054
Pub Dt:
07/24/2008
Title:
METHODS AND SYSTEMS FOR RECOVERING DATA IN A NONVOLATILE MEMORY ARRAY
50
Patent #:
7888218
Issue Dt:
02/15/2011
Application #:
11724775
Filing Dt:
03/16/2007
Publication #:
US20080153223
Pub Dt:
06/26/2008
Title:
USING THICK SPACER FOR BITLINE IMPLANT THEN REMOVE
51
Patent #:
7807580
Issue Dt:
10/05/2010
Application #:
11742003
Filing Dt:
04/30/2007
Publication #:
US20080268650
Pub Dt:
10/30/2008
Title:
TRIPLE POLY-SI REPLACEMENT SCHEME FOR MEMORY DEVICES
52
Patent #:
7768068
Issue Dt:
08/03/2010
Application #:
11758451
Filing Dt:
06/05/2007
Title:
DRAIN EXTENDED MOS TRANSISTOR WITH INCREASED BREAKDOWN VOLTAGE
53
Patent #:
7915907
Issue Dt:
03/29/2011
Application #:
11767620
Filing Dt:
06/25/2007
Publication #:
US20080315906
Pub Dt:
12/25/2008
Title:
FAULTY DANGLING METAL ROUTE DETECTION
54
Patent #:
7799612
Issue Dt:
09/21/2010
Application #:
11767623
Filing Dt:
06/25/2007
Publication #:
US20080318364
Pub Dt:
12/25/2008
Title:
PROCESS APPLYING DIE ATTACH FILM TO SINGULATED DIE
55
Patent #:
7876076
Issue Dt:
01/25/2011
Application #:
11785958
Filing Dt:
04/23/2007
Publication #:
US20070285077
Pub Dt:
12/13/2007
Title:
CIRCUIT FOR PREVENTING THROUGH CURRENT IN DC-DC CONVERTER
56
Patent #:
7970129
Issue Dt:
06/28/2011
Application #:
11788264
Filing Dt:
04/19/2007
Publication #:
US20080260145
Pub Dt:
10/23/2008
Title:
SELECTION OF A LOOKUP TABLE WITH DATA MASKED WITH A COMBINATION OF AN ADDITIVE AND MULTIPLICATIVE MASK
57
Patent #:
7502271
Issue Dt:
03/10/2009
Application #:
11789888
Filing Dt:
04/25/2007
Publication #:
US20070253266
Pub Dt:
11/01/2007
Title:
SEMICONDUCTOR DEVICE AND PROGRAMMING METHOD
58
Patent #:
7777474
Issue Dt:
08/17/2010
Application #:
11790693
Filing Dt:
04/26/2007
Publication #:
US20070285074
Pub Dt:
12/13/2007
Title:
DC-DC CONVERTER WITH OSCILLATOR AND MONITORING FUNCTION
59
Patent #:
7825688
Issue Dt:
11/02/2010
Application #:
11799439
Filing Dt:
04/30/2007
Title:
PROGRAMMABLE MICROCONTROLLER ARCHITECTURE(MIXED ANALOG/DIGITAL)
60
Patent #:
8144126
Issue Dt:
03/27/2012
Application #:
11801115
Filing Dt:
05/07/2007
Publication #:
US20080277171
Pub Dt:
11/13/2008
Title:
REDUCING SLEEP CURRENT IN A CAPACITANCE SENSING SYSTEM
61
Patent #:
7901976
Issue Dt:
03/08/2011
Application #:
11803474
Filing Dt:
05/15/2007
Title:
METHOD OF FORMING BORDERLESS CONTACTS
62
Patent #:
8810260
Issue Dt:
08/19/2014
Application #:
11807687
Filing Dt:
05/29/2007
Title:
DEVICE AND METHOD FOR DETECTING CHARACTERISTICS OF A MATERIAL OCCUPYING A VOLUME WITH CAPACTIVE SENSING OF MIRRORED PLATES
63
Patent #:
7956586
Issue Dt:
06/07/2011
Application #:
11812142
Filing Dt:
06/15/2007
Publication #:
US20070290667
Pub Dt:
12/20/2007
Title:
STEP-UP/STEP-DOWN TYPE DC-DC CONVERTER, AND CONTROL CIRCUIT AND CONTROL METHOD OF THE SAME
64
Patent #:
8069428
Issue Dt:
11/29/2011
Application #:
11818005
Filing Dt:
06/12/2007
Title:
TECHNIQUES FOR GENERATING MICROCONTROLLER CONFIGURATION INFORMATION
65
Patent #:
7554204
Issue Dt:
06/30/2009
Application #:
11820278
Filing Dt:
06/18/2007
Publication #:
US20080308947
Pub Dt:
12/18/2008
Title:
DIE OFFSET DIE TO DIE BONDING
66
Patent #:
7901955
Issue Dt:
03/08/2011
Application #:
11821653
Filing Dt:
06/25/2007
Publication #:
US20080318348
Pub Dt:
12/25/2008
Title:
METHOD OF CONSTRUCTING A STACKED-DIE SEMICONDUCTOR STRUCTURE
67
Patent #:
8079014
Issue Dt:
12/13/2011
Application #:
11822728
Filing Dt:
07/09/2007
Publication #:
US20080010493
Pub Dt:
01/10/2008
Title:
SOFTWARE DEVELOPMENT APPARATUS AND METHOD
68
Patent #:
7861235
Issue Dt:
12/28/2010
Application #:
11822730
Filing Dt:
07/09/2007
Publication #:
US20080010399
Pub Dt:
01/10/2008
Title:
PROGRAM CONTROL DEVICE AND PROGRAM CONTROL METHOD
69
Patent #:
7915838
Issue Dt:
03/29/2011
Application #:
11823904
Filing Dt:
06/29/2007
Publication #:
US20090001905
Pub Dt:
01/01/2009
Title:
DELTA-SIGMA SIGNAL DENSITY MODULATION FOR OPTICAL TRANSDUCER CONTROL
70
Patent #:
7804307
Issue Dt:
09/28/2010
Application #:
11823982
Filing Dt:
06/29/2007
Title:
CAPACITANCE MEASUREMENT SYSTEMS AND METHODS
71
Patent #:
8436263
Issue Dt:
05/07/2013
Application #:
11824249
Filing Dt:
06/29/2007
Publication #:
US20090002206
Pub Dt:
01/01/2009
Title:
NOISE RESISTANT CAPACITIVE SENSOR
72
Patent #:
8314774
Issue Dt:
11/20/2012
Application #:
11825887
Filing Dt:
07/09/2007
Title:
METHOD AND APPARATUS FOR QUASI-3D TRACKING USING 2D OPTICAL MOTION SENSORS
73
Patent #:
7656143
Issue Dt:
02/02/2010
Application #:
11826261
Filing Dt:
07/13/2007
Publication #:
US20080012546
Pub Dt:
01/17/2008
Title:
DC-DC CONVERTER
74
Patent #:
7636382
Issue Dt:
12/22/2009
Application #:
11827718
Filing Dt:
07/13/2007
Title:
ENCODING VITERBI ERROR STATES INTO SINGLE CHIP SEQUENCES
75
Patent #:
7776688
Issue Dt:
08/17/2010
Application #:
11835538
Filing Dt:
08/08/2007
Publication #:
US20090042378
Pub Dt:
02/12/2009
Title:
USE OF A POLYMER SPACER AND SI TRENCH IN A BITLINE JUNCTION OF A FLASH MEMORY CELL TO IMPROVE TPD CHARACTERISTICS
76
Patent #:
8012830
Issue Dt:
09/06/2011
Application #:
11835542
Filing Dt:
08/08/2007
Publication #:
US20090039405
Pub Dt:
02/12/2009
Title:
ORO AND ORPRO WITH BIT LINE TRENCH TO SUPPRESS TRANSPORT PROGRAM DISTURB
77
Patent #:
7545694
Issue Dt:
06/09/2009
Application #:
11839632
Filing Dt:
08/16/2007
Publication #:
US20080042691
Pub Dt:
02/21/2008
Title:
SENSE AMPLIFIER WITH LEAKAGE TESTING AND READ DEBUG CAPABILITY
78
Patent #:
8082373
Issue Dt:
12/20/2011
Application #:
11857970
Filing Dt:
09/19/2007
Publication #:
US20080263243
Pub Dt:
10/23/2008
Title:
SPECIALIZED UNIVERSAL SERIAL BUS CONTROLLER
79
Patent #:
8154088
Issue Dt:
04/10/2012
Application #:
11860245
Filing Dt:
09/24/2007
Title:
SEMICONDUCTOR TOPOGRAPHY AND METHOD FOR REDUCING GATE INDUCED DRAIN LEAKAGE (GIDL) IN MOS TRANSISTORS
80
Patent #:
7936023
Issue Dt:
05/03/2011
Application #:
11861013
Filing Dt:
09/25/2007
Title:
HIGH VOLTAGE DIODE
81
Patent #:
8092083
Issue Dt:
01/10/2012
Application #:
11865672
Filing Dt:
10/01/2007
Publication #:
US20080259998
Pub Dt:
10/23/2008
Title:
TEMPERATURE SENSOR WITH DIGITAL BANDGAP
82
Patent #:
8017859
Issue Dt:
09/13/2011
Application #:
11873824
Filing Dt:
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Title:
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Assignor
1
MORGAN STANLEY SENIOR FUNDING, INC.
Exec Dt:
07/31/2019
Assignee
1
MUFG UNION BANK, N.A.
350 CALIFORNIA STREET
17TH FLOOR
SAN FRANCISCO, CALIFORNIA 94104
Correspondence name and address
SKADDEN, ARPS, SLATE, MEAGHER & FLOM LLP
FOUR TIMES SQUARE
ATTN: JUSTIN C. SELLE
NEW YORK, NY 10036

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