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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:050937/0001   Pages: 964
Recorded: 10/09/2019
Attorney Dkt #:4816.244
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
05/19/1998
Application #:
08844384
Filing Dt:
04/18/1997
Title:
METHOD OF FORMING A CAPACITOR
2
Patent #:
Issue Dt:
03/23/1999
Application #:
08844398
Filing Dt:
04/18/1997
Title:
ANTIREFLECTIVE STRUCTURE
3
Patent #:
Issue Dt:
09/28/1999
Application #:
08844696
Filing Dt:
04/25/1997
Title:
SENSE AMPLIFIER CONTROL OF A MEMORY DEVICE
4
Patent #:
Issue Dt:
03/16/1999
Application #:
08844771
Filing Dt:
04/22/1997
Title:
METHODS OF FORMING A SILICON NITRIDE FILM, A CAPACITOR DIELECTRIC LAYER AND A CAPACITOR
5
Patent #:
Issue Dt:
10/26/1999
Application #:
08844980
Filing Dt:
04/23/1997
Title:
MEMORY SYSTEM HAVING READ MODIFY WRITE FUNCTION AND METHOD
6
Patent #:
Issue Dt:
07/20/1999
Application #:
08845603
Filing Dt:
04/25/1997
Title:
MANUAL PELLET LOADER FOR BOSCHMAN AUTOMOLDS
7
Patent #:
Issue Dt:
04/06/1999
Application #:
08845609
Filing Dt:
04/25/1997
Title:
MEMORY ARRAY HAVING A DIGIT LINE BURIED IN AN ISOLATION REGION AND METHOD FOR FORMING SAME
8
Patent #:
Issue Dt:
12/21/1999
Application #:
08845616
Filing Dt:
04/25/1997
Title:
METHOD FOR MAKING A LOW RESISTIVITY ELECTRODE HAVING A NEAR NOBLE METAL
9
Patent #:
Issue Dt:
02/15/2000
Application #:
08845782
Filing Dt:
04/25/1997
Title:
SEMICONDUCTOR PACKAGE WITH WIRE BOND PROTECTIVE MEMBER
10
Patent #:
Issue Dt:
06/29/1999
Application #:
08845916
Filing Dt:
04/29/1997
Title:
SENSING CIRCUITRY FOR READING AND VERIFYING THE CONTENTS OF ELECTRICALLY PROGRAMMABLE/ERASABLE NON-VOLATILE MEMORY CELLS
11
Patent #:
Issue Dt:
08/03/1999
Application #:
08846105
Filing Dt:
04/25/1997
Title:
PROCESSOR TO MEMORY INTERFACE LOGIC FOR USE IN A COMPUTER SYSTEM USING A MULTIPLEXED MEMORY ADDRESS
12
Patent #:
Issue Dt:
12/21/1999
Application #:
08846110
Filing Dt:
04/25/1997
Title:
METHOD OF FORMING INTEGRATED CIRCUITRY, CONDUCTIVE LINES, A CONDUCTIVE GRID, A CONDUCTIVE NETWORK, AN ELECTRICAL INTERCONNECTION TO ANODE LOCATION AND AN ELECTRICAL INTERCONNECTION WITH A TRANSISTOR SOURCE/ DRAIN REGION
13
Patent #:
Issue Dt:
02/01/2005
Application #:
08846671
Filing Dt:
04/30/1997
Title:
UNDOPED SILICON DIOXIDE AS ETCH STOP FOR SELECTIVE ETCH OF DOPED SILICON DIOXIDE
14
Patent #:
Issue Dt:
01/12/1999
Application #:
08846753
Filing Dt:
04/30/1997
Title:
BIASING CIRCUIT FOR UPROM CELLS WITH LOW VOLTAGE SUPPLY
15
Patent #:
Issue Dt:
10/13/1998
Application #:
08846755
Filing Dt:
04/30/1997
Title:
UPROM CELL FOR LOW VOLTAGE SUPPLY
16
Patent #:
Issue Dt:
07/27/1999
Application #:
08846757
Filing Dt:
04/30/1997
Title:
POWER ON RESET CIRCUIT WITH AUTO TURN OFF
17
Patent #:
Issue Dt:
09/01/1998
Application #:
08846954
Filing Dt:
04/30/1997
Title:
CONDUCTIVE LINES ON THE BACK SIDE OF WAFERS AND DICE FOR SEMICONDUCTOR INTERCONNECTS
18
Patent #:
Issue Dt:
02/08/2000
Application #:
08847275
Filing Dt:
05/01/1997
Title:
METHOD OF MAKING A STRUCTURE FOR PROVIDING SIGNAL ISOLATION AND DECOUPLING IN AN INTEGRATED CIRCUIT DEVICE
19
Patent #:
Issue Dt:
06/29/1999
Application #:
08847385
Filing Dt:
04/24/1997
Title:
MEMORY ARCHITECTURE FOR FLEXIBLE READING MANAGEMENT, PARTICULARLY FOR NON-VOLATILE MEMORIES, HAVING NOISE-IMMUNITY FEATURES, MATCHING DEVICE PERFORMANCE, AND HAVING OPTIMIZED THROUGHOUT
20
Patent #:
Issue Dt:
06/13/2000
Application #:
08847673
Filing Dt:
04/24/1997
Title:
ALUMINUM BASED ALLOY BRIDGE STRUCTURE AND METHOD OF FORMING SAME
21
Patent #:
Issue Dt:
11/03/1998
Application #:
08847774
Filing Dt:
04/23/1997
Title:
ACTUATOR ASSEMBLY
22
Patent #:
Issue Dt:
09/01/1998
Application #:
08848122
Filing Dt:
04/28/1997
Title:
VOLTAGE COMPENSATING OUTPUT DRIVER CIRCUIT
23
Patent #:
Issue Dt:
05/09/2000
Application #:
08848528
Filing Dt:
04/28/1997
Title:
COMPUTER COMPONENT CARRIER THAT DIRECTS AIRFLOW TO CRITICAL COMPONENTS
24
Patent #:
Issue Dt:
08/15/2000
Application #:
08848554
Filing Dt:
04/28/1997
Title:
DYNAMIC COMMUNICATION PATH SELECTION FOR DATA TRANSMISSION BETWEEN COMPUTERS
25
Patent #:
Issue Dt:
09/01/1998
Application #:
08850278
Filing Dt:
05/05/1997
Title:
STAGGERED CONTACT PLACEMENT ON CMOS CHIP
26
Patent #:
Issue Dt:
01/11/2000
Application #:
08850461
Filing Dt:
05/05/1997
Title:
ETCH STOP FOR USE IN ETCHING OF SILICON OXIDE
27
Patent #:
Issue Dt:
05/12/1998
Application #:
08850950
Filing Dt:
05/05/1997
Title:
SEMICONDUCTOR DEVICE WITH VT IMPLANT
28
Patent #:
Issue Dt:
08/25/1998
Application #:
08851467
Filing Dt:
05/05/1997
Title:
METHOD OF MEASURING EXTRACTION FORCES
29
Patent #:
Issue Dt:
07/20/1999
Application #:
08852144
Filing Dt:
05/06/1997
Title:
VIBRATION-ENHANCED SPIN-ON FILM TECHNIQUES FOR SEMICONDUCTOR DEVICE PROCESSING
30
Patent #:
Issue Dt:
06/22/1999
Application #:
08853263
Filing Dt:
05/09/1997
Title:
METHOD AND APPARATUS FOR TESTING CELLS IN A MEMORY DEVICE WITH COMPRESSED DATA AND FOR REPLACING DEFECTIVE CELLS
31
Patent #:
Issue Dt:
07/04/2000
Application #:
08853526
Filing Dt:
05/09/1997
Title:
PARALLEL-ACCESS MEMORY AND METHOD
32
Patent #:
Issue Dt:
07/07/1998
Application #:
08853732
Filing Dt:
05/09/1997
Title:
COLUMN MULTIPLEXER
33
Patent #:
Issue Dt:
12/07/1999
Application #:
08853756
Filing Dt:
05/08/1997
Title:
ELECTRICALLY ERASABLE AND PROGRAMMABLE NON-VOLATILE MEMORY DEVICE WITH TESTABLE REDUNDANCY CIRCUITS
34
Patent #:
Issue Dt:
11/02/1999
Application #:
08854186
Filing Dt:
05/09/1997
Title:
THIN FILM TRANSISTORS CONSTRUCTIONS, WITH POLYCRYSTALLINE SILICON- GERMANIUM ALLOY DOPED WITH CARBON IN THE CHANNEL REGION
35
Patent #:
Issue Dt:
02/01/2000
Application #:
08854290
Filing Dt:
05/09/1997
Title:
ADJUSTABLE TIMER CIRCUIT
36
Patent #:
Issue Dt:
10/06/1998
Application #:
08854770
Filing Dt:
05/12/1997
Title:
INTELLIGENT START FOR MOTION ESTIMATION SEARCH
37
Patent #:
Issue Dt:
01/16/2001
Application #:
08854867
Filing Dt:
05/12/1997
Title:
PROCESS FOR MANUFACTURING INTEGRATED CIRCUIT SRAM
38
Patent #:
Issue Dt:
07/10/2001
Application #:
08855517
Filing Dt:
05/13/1997
Title:
METHODS OF PROVIDING SPACERS OVER CONDUCTIVE LINE SIDEWALLS, METHODS OF FORMING SIDEWALL SPACERS OVER ETCHED LINE SIDEWALLS, AND METHODS OF FORMING CONDUCTIVE LINES
39
Patent #:
Issue Dt:
03/02/1999
Application #:
08855555
Filing Dt:
05/13/1997
Title:
MEMORY CIRCUIT VOLTAGE REGULATOR
40
Patent #:
Issue Dt:
11/30/1999
Application #:
08855765
Filing Dt:
05/23/1997
Title:
SRAM CELL EMPLOYING SUBSTANTIALLY VERTICALLY ELONGATED PULL-UP RESISTORS
41
Patent #:
Issue Dt:
12/08/1998
Application #:
08855941
Filing Dt:
05/14/1997
Title:
APPARATUS AND METHOD FOR CONDITIONING A PLANARIZING SUBSTRATE USED IN CHEMICAL-MECHANICAL PLANARIZATION OF SEMICONDUCTOR WAFERS
42
Patent #:
Issue Dt:
07/13/1999
Application #:
08857200
Filing Dt:
05/15/1997
Title:
COMPRESSION LAYER ON THE LEADFRAME TO REDUCE STRESS DEFECTS
43
Patent #:
Issue Dt:
08/25/1998
Application #:
08857620
Filing Dt:
05/16/1997
Title:
METHOD AND APPARATUS TO ACCURATELY CORRELATE DEFECT COORDINATES BETWEEN PHOTOMASK INSPECTION AND REPAIR SYSTEMS
44
Patent #:
Issue Dt:
11/16/1999
Application #:
08858027
Filing Dt:
05/16/1997
Title:
METHOD OF FORMING A CAPACITOR
45
Patent #:
Issue Dt:
02/09/1999
Application #:
08858520
Filing Dt:
05/19/1997
Title:
CIRCUIT AND METHOD FOR READING AND WRITING DATA IN A MEMORY DEVICE
46
Patent #:
Issue Dt:
09/05/2000
Application #:
08858532
Filing Dt:
05/19/1997
Title:
METHOD AND STRUCTURE FOR RAPID ENABLEMENT
47
Patent #:
Issue Dt:
11/17/1998
Application #:
08858847
Filing Dt:
05/19/1997
Title:
IDENTIFICATION AND VERIFICATION OF A SECTOR WITHIN A BLOCK OF MASS STORAGE FLASH MEMORY
48
Patent #:
Issue Dt:
09/21/1999
Application #:
08858861
Filing Dt:
05/19/1997
Title:
TRANSISTOR DEVICE STRUCTURES
49
Patent #:
Issue Dt:
09/29/1998
Application #:
08858945
Filing Dt:
05/20/1997
Title:
ANTIFUSE PROGRAMMING METHOD AND APPARATUS
50
Patent #:
Issue Dt:
10/05/1999
Application #:
08859893
Filing Dt:
05/21/1997
Title:
RIBBON CABLE ALLIGATOR CLAMP
51
Patent #:
Issue Dt:
03/16/1999
Application #:
08861212
Filing Dt:
05/21/1997
Title:
LOW-TO-HIGH VOLTAGE CMOS DRIVER CIRCUIT FOR DRIVING CAPACITIVE LOADS
52
Patent #:
Issue Dt:
06/16/1998
Application #:
08862006
Filing Dt:
05/22/1997
Title:
DYNAMICALLY CONTROLLING THE NUMBER OF BOUNDARY-SCAN CELLS IN A BOUNDARY-SCAN PATH
53
Patent #:
Issue Dt:
07/04/2000
Application #:
08862093
Filing Dt:
05/22/1997
Title:
METHOD AND APPARATUS FOR REDUCING RESIN BLEED DURING THE FORMATION OF A SEMICONDUCTOR DEVICE
54
Patent #:
Issue Dt:
01/25/2000
Application #:
08862563
Filing Dt:
05/23/1997
Title:
LINE DECODER FOR MEMORY DEVICES
55
Patent #:
Issue Dt:
03/20/2001
Application #:
08862685
Filing Dt:
05/23/1997
Title:
PROCESS FOR FORMING A FILM COMPOSED OF A NITRIDE OF A DIFFUSION BARRIER MATERIAL
56
Patent #:
Issue Dt:
11/09/1999
Application #:
08862726
Filing Dt:
05/23/1997
Title:
THIN FILM CAPACITOR COUPONS FOR MEMORY MODULES AND MULTI-CHIP MODULES
57
Patent #:
Issue Dt:
02/29/2000
Application #:
08863094
Filing Dt:
05/23/1997
Title:
METHOD AND APPARATUS FOR LOCATING A STOLEN ELECTRONIC DEVICE USING AUTOMATIC NUMBER IDENTIFICATION
58
Patent #:
Issue Dt:
07/06/1999
Application #:
08863492
Filing Dt:
05/27/1997
Title:
FIELD EMISSION DISPLAY WITH VIDEO SIGNAL ON COLUMN LINES
59
Patent #:
Issue Dt:
04/25/2000
Application #:
08864727
Filing Dt:
06/06/1997
Title:
MULTI-CAPACITANCE HEAD LEAD FRAME DECOUPLING DEVICE
60
Patent #:
Issue Dt:
10/31/2000
Application #:
08865282
Filing Dt:
05/29/1997
Title:
ISOLATED ANTI-FUSE STRUCTURE AND METHOD FOR FABRICATING SAME
61
Patent #:
Issue Dt:
06/27/2000
Application #:
08865642
Filing Dt:
05/30/1997
Title:
METHOD AND CIRCUIT ARCHITECTURE FOR TESTING A NON-VOLATILE MEMORY DEVICE
62
Patent #:
Issue Dt:
09/28/1999
Application #:
08865748
Filing Dt:
05/30/1997
Title:
SYNCHRONIZATION SIGNAL GENERATION CIRCUIT AND METHOD
63
Patent #:
Issue Dt:
12/14/1999
Application #:
08865911
Filing Dt:
05/30/1997
Title:
BONDHEAD LEAD CLAMP APPARATUS AND METHOD
64
Patent #:
Issue Dt:
06/22/1999
Application #:
08866283
Filing Dt:
05/30/1997
Title:
INTEGRATED CIRCUIT FOR GENERATING INITIALIZATION SIGNALS FOR MEMORY CELL SENSING CIRCUITS
65
Patent #:
Issue Dt:
01/26/1999
Application #:
08866531
Filing Dt:
05/30/1997
Title:
METHOD FOR VERIFYING ELECTRICALLY PROGRAMMABLE NON-VOLATILE MEMORY CELLS OF AN ELECTRICALLY PROGRAMMABLE NON-VOLATILE MEMORY DEVICE AFTER PROGRAMMING
66
Patent #:
Issue Dt:
08/31/1999
Application #:
08866707
Filing Dt:
05/30/1997
Title:
METHOD AND APPARATUS FOR AUTOMATICALLY DETERMINING AND DYNAMICALLY UPDATING USER PREFERENCES IN AN ENTERTAINMENT SYSTEM
67
Patent #:
Issue Dt:
12/15/1998
Application #:
08867241
Filing Dt:
06/02/1997
Title:
MEGASONIC CLEANING METHODS AND APPARATUS
68
Patent #:
Issue Dt:
08/03/1999
Application #:
08867551
Filing Dt:
06/02/1997
Title:
INTERCONNECT FOR MAKING TEMPORARY ELECTRICAL CONNECTIONS WITH BUMPED SEMICONDUCTOR COMPONENTS
69
Patent #:
Issue Dt:
04/25/2000
Application #:
08868042
Filing Dt:
06/03/1997
Title:
SEMICONDUCTOR PROCESSING METHOD OF REDUCING THICKNESS DEPLETION OF A SILICIDE LAYER AT A JUNCTION OF DIFFERENT UNDERLYING LAYERS
70
Patent #:
Issue Dt:
01/16/2001
Application #:
08868057
Filing Dt:
06/03/1997
Title:
SEMICONDUCTOR PROCESSING METHOD OF DEPOSITING POLYSILICON
71
Patent #:
Issue Dt:
11/03/1998
Application #:
08868213
Filing Dt:
06/03/1997
Title:
MEMORY DEVICE WITH CLOCKED COLUMN REDUNDANCY
72
Patent #:
Issue Dt:
10/19/1999
Application #:
08868214
Filing Dt:
06/03/1997
Title:
SEMICONDUCTOR MEMORY DEVICE WITH CLOCKED COLUMN REDUNDANCY AND TIME-SHARED REDUNDANCY DATA TRANSFER APPROACH
73
Patent #:
Issue Dt:
05/23/2000
Application #:
08868562
Filing Dt:
06/04/1997
Title:
METHOD FOR FORMING OXIDE USING HIGH PRESSURE
74
Patent #:
Issue Dt:
08/22/2000
Application #:
08868651
Filing Dt:
06/04/1997
Title:
AMORPHOUS TIN FILMS FOR AN INTEGRATED CAPACITOR DIELECTRIC/BOTTOM PLATE USING HIGH DIELECTRIC CONSTANT MATERIAL
75
Patent #:
Issue Dt:
05/04/1999
Application #:
08869035
Filing Dt:
06/05/1997
Title:
DYNAMIC RANDOM ACCESS MEMORY HAVING DECODING CIRCUITRY FOR PARTIAL MEMORY BLOCKS
76
Patent #:
Issue Dt:
05/26/1998
Application #:
08869208
Filing Dt:
06/05/1997
Title:
PAGE-MODE MEMORY DEVICE WITH MULTIPLE-LEVEL MEMORY CELLS
77
Patent #:
Issue Dt:
02/02/1999
Application #:
08869367
Filing Dt:
06/05/1997
Title:
SEMICONDUCTOR MEMORY DEVICE WITH ROW AND COLUMN REDUNDANCY CIRCUITS AND A TIME-SHARED REDUNDANCY CIRCUIT TEST ARCHITECTURE
78
Patent #:
Issue Dt:
08/15/2000
Application #:
08869731
Filing Dt:
06/05/1997
Title:
METHOD OF FORMING CAPACITORS HAVING AN AMORPHOUS ELECTRICALLY CONDUCTIVE LAYER
79
Patent #:
Issue Dt:
01/26/1999
Application #:
08869859
Filing Dt:
06/05/1997
Title:
CIRCUIT FOR TRANSFERRING REDUNDANCY DATA OF A REDUNDANCY CIRCUIT INSIDE A MEMORY DEVICE BY MEANS OF A TIME-SHARED APPROACH
80
Patent #:
Issue Dt:
07/13/1999
Application #:
08870085
Filing Dt:
06/04/1997
Title:
MULTIPATH ANTIFUSE CIRCUIT
81
Patent #:
Issue Dt:
07/27/1999
Application #:
08870105
Filing Dt:
06/05/1997
Title:
REMOVAL OF METAL CUSP FOR IMPROVED CONTACT FILL
82
Patent #:
Issue Dt:
05/16/2000
Application #:
08870614
Filing Dt:
06/06/1997
Title:
DEVICE FOR ELECTRICALLY OR THERMALLY COUPLING TO THE BACKSIDES OF INTEGRATED CIRCUIT DICE IN CHIP-ON-BOARD APPLICATIONS
83
Patent #:
Issue Dt:
05/25/1999
Application #:
08871015
Filing Dt:
06/06/1997
Title:
METHOD FOR USING DATA REGARDING MANUFACTURING PROCEDURES INTEGRATED CIRCUITS (IC'S) HAVE UNDERGONE, SUCH AS REPAIRS, TO SELECT PROCEDURES THE IC'S WILL UNDERGO, SUCH AS ADDITIONAL REPAIRS
84
Patent #:
Issue Dt:
08/10/1999
Application #:
08871028
Filing Dt:
06/09/1997
Title:
METHOD OF CHEMICAL MECHANICAL POLISHING
85
Patent #:
Issue Dt:
08/03/1999
Application #:
08871209
Filing Dt:
06/09/1997
Title:
METHOD FOR MOUNTING PACKAGED INTEGRATED CIRCUIT DEVICES TO PRINTED CIRCUIT BOARDS
86
Patent #:
Issue Dt:
03/14/2000
Application #:
08871210
Filing Dt:
06/09/1997
Title:
FABRICATION OF INTEGRATED DEVICES USING NITROGEN IMPLANTATION
87
Patent #:
Issue Dt:
10/06/1998
Application #:
08871226
Filing Dt:
06/09/1997
Title:
METHOD AND DEVICE FOR SUPPLYING NEGATIVE PROGRAMMING VOLTAGES TO NON-VOLATILE MEMORY CELLS IN A NON-VOLATILE MEMORY DEVICE
88
Patent #:
Issue Dt:
05/11/1999
Application #:
08871362
Filing Dt:
06/09/1997
Title:
SINGLE DEPOSITION LAYER METAL DYNAMIC RANDOM ACCESS MEMORY
89
Patent #:
Issue Dt:
11/28/2000
Application #:
08871364
Filing Dt:
06/09/1997
Title:
TRI-STATING ADDRESS INPUT CIRCUIT
90
Patent #:
Issue Dt:
11/10/1998
Application #:
08871523
Filing Dt:
06/09/1997
Title:
FLOATING ISOLATION GATE FOR DRAM SENSING
91
Patent #:
Issue Dt:
09/07/1999
Application #:
08871653
Filing Dt:
06/09/1997
Title:
SEMICONDUCTOR PROCESSING METHODS OF FORMING COMPLEMENTARY METAL OXIDE SEMICONDUCTOR MEMORY AND OTHER CIRCUITRY
92
Patent #:
Issue Dt:
11/03/1998
Application #:
08872081
Filing Dt:
06/10/1997
Title:
MEMORY DEVICE TRACKING CIRCUIT
93
Patent #:
Issue Dt:
08/10/1999
Application #:
08872240
Filing Dt:
06/10/1997
Title:
METHOD AND APPARATUS FOR DETERMINING A SET OF TESTS FOR INTEGRATED CIRCUIT TESTING
94
Patent #:
Issue Dt:
07/14/1998
Application #:
08872403
Filing Dt:
06/10/1997
Title:
MODIFIED BUS BAR WITH KAPTONTM TAPE OR INSULATIVE MATERIAL ON LOC PACKAGED PART
95
Patent #:
Issue Dt:
12/14/1999
Application #:
08872789
Filing Dt:
06/10/1997
Title:
METHOD OF FORMING A THIN FILM TRANSISTOR
96
Patent #:
Issue Dt:
07/13/1999
Application #:
08873502
Filing Dt:
06/12/1997
Title:
DEVICE FOR READING CELLS OF A MEMORY
97
Patent #:
Issue Dt:
05/23/2000
Application #:
08873845
Filing Dt:
06/12/1997
Title:
SEMICONDUCTOR PROCESSING METHOD OF FORMING ELECTRICALLY CONDUCTIVE INTERCONNECT LINES AND INTEGRATED CIRCUITRY
98
Patent #:
Issue Dt:
01/12/1999
Application #:
08873968
Filing Dt:
06/12/1997
Title:
CIRCUIT FOR ON-BOARD PROGRAMMING OF PRD SERIAL EEPROMS
99
Patent #:
Issue Dt:
10/05/1999
Application #:
08873971
Filing Dt:
06/12/1997
Title:
METHOD FOR ON-BOARD PROGRAMMING OF PRD SERIAL EEPROMS
100
Patent #:
Issue Dt:
04/06/1999
Application #:
08874241
Filing Dt:
06/13/1997
Title:
MEMORY ARCHITECTURE AND DECODER ADDRESSING
Assignor
1
Exec Dt:
07/31/2019
Assignee
1
8000 S FEDERAL WAY
BOISE, IDAHO 83707
Correspondence name and address
WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
ONE MARKET, SPEAR TOWER, SUITE 3300
SAN FRANCISCO, CA 94105

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