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Reel/Frame:050937/0001   Pages: 964
Recorded: 10/09/2019
Attorney Dkt #:4816.244
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 18018
Page 101 of 181
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1
Patent #:
7250798
Issue Dt:
07/31/2007
Application #:
11417390
Filing Dt:
05/03/2006
Publication #:
US20060202732
Pub Dt:
09/14/2006
Title:
SYNCHRONOUS CLOCK GENERATOR INCLUDING DUTY CYCLE CORRECTION
2
Patent #:
7917685
Issue Dt:
03/29/2011
Application #:
11417573
Filing Dt:
05/04/2006
Publication #:
US20070260817
Pub Dt:
11/08/2007
Title:
METHOD FOR READING A MULTILEVEL CELL IN A NON-VOLATILE MEMORY DEVICE
3
Patent #:
7400533
Issue Dt:
07/15/2008
Application #:
11417577
Filing Dt:
05/04/2006
Publication #:
US20070258287
Pub Dt:
11/08/2007
Title:
MIMICKING PROGRAM VERIFY DRAIN RESISTANCE IN A MEMORY DEVICE
4
Patent #:
7271037
Issue Dt:
09/18/2007
Application #:
11417620
Filing Dt:
05/03/2006
Publication #:
US20060263943
Pub Dt:
11/23/2006
Title:
LEADFRAME ALTERATION TO DIRECT COMPOUND FLOW INTO PACKAGE
5
Patent #:
7589008
Issue Dt:
09/15/2009
Application #:
11418170
Filing Dt:
05/04/2006
Publication #:
US20060205211
Pub Dt:
09/14/2006
Title:
METHODS FOR FORMING INTERCONNECTS IN MICROELECTRONIC WORKPIECES AND MICROELECTRONIC WORKPIECES FORMED USING SUCH METHODS
6
Patent #:
7771537
Issue Dt:
08/10/2010
Application #:
11418337
Filing Dt:
05/04/2006
Publication #:
US20060204649
Pub Dt:
09/14/2006
Title:
METHODS AND SYSTEMS FOR CONTROLLING TEMPERATURE DURING MICROFEATURE WORKPIECE PROCESSING, E.G. CVD DEPOSITION
7
Patent #:
7544554
Issue Dt:
06/09/2009
Application #:
11418556
Filing Dt:
05/05/2006
Publication #:
US20060211208
Pub Dt:
09/21/2006
Title:
METHODS OF FORMING GATELINES AND TRANSISTOR DEVICES
8
Patent #:
7528424
Issue Dt:
05/05/2009
Application #:
11418582
Filing Dt:
05/04/2006
Publication #:
US20060258131
Pub Dt:
11/16/2006
Title:
INTEGRATED CIRCUITRY
9
Patent #:
7439752
Issue Dt:
10/21/2008
Application #:
11418724
Filing Dt:
05/03/2006
Publication #:
US20070257688
Pub Dt:
11/08/2007
Title:
METHODS OF PROVIDING SEMICONDUCTOR COMPONENTS WITHIN SOCKETS
10
Patent #:
7594088
Issue Dt:
09/22/2009
Application #:
11418897
Filing Dt:
05/04/2006
Publication #:
US20060200642
Pub Dt:
09/07/2006
Title:
SYSTEM AND METHOD FOR AN ASYNCHRONOUS DATA BUFFER HAVING BUFFER WRITE AND READ POINTERS
11
Patent #:
7863198
Issue Dt:
01/04/2011
Application #:
11419173
Filing Dt:
05/18/2006
Publication #:
US20070269982
Pub Dt:
11/22/2007
Title:
METHOD AND DEVICE TO VARY GROWTH RATE OF THIN FILMS OVER SEMICONDUCTOR STRUCTURES
12
Patent #:
7274610
Issue Dt:
09/25/2007
Application #:
11419261
Filing Dt:
05/19/2006
Publication #:
US20060291299
Pub Dt:
12/28/2006
Title:
SEMICONDUCTOR MEMORY DEVICE
13
Patent #:
8332832
Issue Dt:
12/11/2012
Application #:
11421399
Filing Dt:
05/31/2006
Publication #:
US20060221747
Pub Dt:
10/05/2006
Title:
DYNAMIC ARRAYS AND OVERLAYS WITH BOUNDS POLICIES
14
Patent #:
7915916
Issue Dt:
03/29/2011
Application #:
11421614
Filing Dt:
06/01/2006
Publication #:
US20070279086
Pub Dt:
12/06/2007
Title:
ANTIFUSE PROGRAMMING CIRCUIT WITH SNAPBACK SELECT TRANSISTOR
15
Patent #:
7549142
Issue Dt:
06/16/2009
Application #:
11423075
Filing Dt:
06/08/2006
Publication #:
US20060235663
Pub Dt:
10/19/2006
Title:
METHOD AND DEVICE FOR CHECKING LITHOGRAPHY DATA
16
Patent #:
7549143
Issue Dt:
06/16/2009
Application #:
11423082
Filing Dt:
06/08/2006
Publication #:
US20060234140
Pub Dt:
10/19/2006
Title:
METHOD AND DEVICE FOR CHECKING LITHOGRAPHY DATA
17
Patent #:
7557047
Issue Dt:
07/07/2009
Application #:
11423197
Filing Dt:
06/09/2006
Publication #:
US20070287300
Pub Dt:
12/13/2007
Title:
METHOD OF FORMING A LAYER OF MATERIAL USING AN ATOMIC LAYER DEPOSITION PROCESS
18
Patent #:
7932557
Issue Dt:
04/26/2011
Application #:
11424394
Filing Dt:
06/15/2006
Publication #:
US20060237800
Pub Dt:
10/26/2006
Title:
SEMICONDUCTOR CONTACT DEVICE
19
Patent #:
7509005
Issue Dt:
03/24/2009
Application #:
11424401
Filing Dt:
06/15/2006
Publication #:
US20060228084
Pub Dt:
10/12/2006
Title:
RESISTIVE HEATER FOR THERMO OPTIC DEVICE
20
Patent #:
7405463
Issue Dt:
07/29/2008
Application #:
11426523
Filing Dt:
06/26/2006
Publication #:
US20060231922
Pub Dt:
10/19/2006
Title:
GATE DIELECTRIC ANTIFUSE CIRCUIT TO PROTECT A HIGH-VOLTAGE TRANSISTOR
21
Patent #:
7307306
Issue Dt:
12/11/2007
Application #:
11426768
Filing Dt:
06/27/2006
Publication #:
US20060263911
Pub Dt:
11/23/2006
Title:
ETCH MASK AND METHOD OF FORMING A MAGNETIC RANDOM ACCESS MEMORY STRUCTURE
22
Patent #:
7622355
Issue Dt:
11/24/2009
Application #:
11427038
Filing Dt:
06/28/2006
Publication #:
US20060240626
Pub Dt:
10/26/2006
Title:
WRITE ONCE READ ONLY MEMORY EMPLOYING CHARGE TRAPPING IN INSULATORS
23
Patent #:
7388246
Issue Dt:
06/17/2008
Application #:
11427569
Filing Dt:
06/29/2006
Publication #:
US20060237764
Pub Dt:
10/26/2006
Title:
LANTHANIDE DOPED TIOX DIELECTRIC FILMS
24
Patent #:
7468559
Issue Dt:
12/23/2008
Application #:
11428620
Filing Dt:
07/05/2006
Publication #:
US20060237844
Pub Dt:
10/26/2006
Title:
SEMICONDUCTOR INTEGRATED CIRCUIT PACKAGE HAVING ELECTRICALLY DISCONNECTED SOLDER BALLS FOR MOUNTING
25
Patent #:
7342319
Issue Dt:
03/11/2008
Application #:
11428625
Filing Dt:
07/05/2006
Publication #:
US20060237845
Pub Dt:
10/26/2006
Title:
SEMICONDUCTOR INTEGRATED CIRCUIT PACKAGE HAVING ELECTRICALLY DISCONNECTED SOLDER BALLS FOR MOUNTING
26
Patent #:
7489019
Issue Dt:
02/10/2009
Application #:
11428959
Filing Dt:
07/06/2006
Publication #:
US20060284284
Pub Dt:
12/21/2006
Title:
EPITAXIAL SEMICONDUCTOR LAYER AND METHOD
27
Patent #:
7272696
Issue Dt:
09/18/2007
Application #:
11429030
Filing Dt:
05/04/2006
Publication #:
US20060200621
Pub Dt:
09/07/2006
Title:
DYNAMIC VOLUME MANAGEMENT
28
Patent #:
7566257
Issue Dt:
07/28/2009
Application #:
11429293
Filing Dt:
05/04/2006
Publication #:
US20060199643
Pub Dt:
09/07/2006
Title:
METHOD AND SYSTEM FOR TRANSFERRING DATA TO AN ELECTRONIC TOY OR OTHER ELECTRONIC DEVICE
29
Patent #:
7355922
Issue Dt:
04/08/2008
Application #:
11429856
Filing Dt:
05/08/2006
Publication #:
US20060198237
Pub Dt:
09/07/2006
Title:
METHOD AND APPARATUS FOR INITIALIZATION OF READ LATENCY TRACKING CIRCUIT IN HIGH-SPEED DRAM
30
Patent #:
7396699
Issue Dt:
07/08/2008
Application #:
11430046
Filing Dt:
05/09/2006
Publication #:
US20060270099
Pub Dt:
11/30/2006
Title:
METHOD OF FORMING NON-VOLATILE RESISTANCE VARIABLE DEVICES AND METHOD OF FORMING A PROGRAMMABLE MEMORY CELL OF MEMORY CIRCUITRY
31
Patent #:
7550818
Issue Dt:
06/23/2009
Application #:
11430047
Filing Dt:
05/09/2006
Publication #:
US20060234425
Pub Dt:
10/19/2006
Title:
METHOD OF MANUFACTURE OF A PCRAM MEMORY CELL
32
Patent #:
7385842
Issue Dt:
06/10/2008
Application #:
11430138
Filing Dt:
05/09/2006
Publication #:
US20060226458
Pub Dt:
10/12/2006
Title:
MAGNETIC MEMORY HAVING SYNTHETIC ANTIFERROMAGNETIC PINNED LAYER
33
Patent #:
7248516
Issue Dt:
07/24/2007
Application #:
11430339
Filing Dt:
05/09/2006
Publication #:
US20060221736
Pub Dt:
10/05/2006
Title:
DATA COMPRESSION READ MODE FOR MEMORY TESTING
34
Patent #:
7285850
Issue Dt:
10/23/2007
Application #:
11430375
Filing Dt:
05/08/2006
Publication #:
US20060208350
Pub Dt:
09/21/2006
Title:
SUPPORT ELEMENTS FOR SEMICONDUCTOR DEVICES WITH PERIPHERALLY LOCATED BOND PADS
35
Patent #:
7408828
Issue Dt:
08/05/2008
Application #:
11430379
Filing Dt:
05/08/2006
Title:
SYSTEM AND METHOD FOR REDUCING POWER CONSUMPTION DURING EXTENDED REFRESH PERIODS OF DYNAMIC RANDOM ACCESS MEMORY DEVICES
36
Patent #:
7319620
Issue Dt:
01/15/2008
Application #:
11430470
Filing Dt:
05/08/2006
Publication #:
US20060203571
Pub Dt:
09/14/2006
Title:
INPUT AND OUTPUT BUFFERS HAVING SYMMETRICAL OPERATING CHARACTERISTICS AND IMMUNITY FROM VOLTAGE VARIATIONS
37
Patent #:
7253672
Issue Dt:
08/07/2007
Application #:
11430471
Filing Dt:
05/08/2006
Publication #:
US20060202729
Pub Dt:
09/14/2006
Title:
SYSTEM AND METHOD FOR REDUCED POWER OPEN-LOOP SYNTHESIS OF OUTPUT CLOCK SIGNALS HAVING A SELECTED PHASE RELATIVE TO AN INPUT CLOCK SIGNAL
38
Patent #:
7579684
Issue Dt:
08/25/2009
Application #:
11430483
Filing Dt:
05/09/2006
Publication #:
US20060205116
Pub Dt:
09/14/2006
Title:
METHODS FOR PACKAGING MICROFEATURE DEVICES AND MICROFEATURE DEVICES FORMED BY SUCH METHODS
39
Patent #:
7778039
Issue Dt:
08/17/2010
Application #:
11430540
Filing Dt:
05/08/2006
Publication #:
US20070258173
Pub Dt:
11/08/2007
Title:
SUBSTRATES, SYSTEMS, AND DEVICES INCLUDING STRUCTURES FOR SUPPRESSING POWER AND GROUND PLANE NOISE, AND METHODS FOR SUPPRESSING POWER AND GROUND PLANE NOISE
40
Patent #:
7280420
Issue Dt:
10/09/2007
Application #:
11430549
Filing Dt:
05/09/2006
Publication #:
US20060221737
Pub Dt:
10/05/2006
Title:
DATA COMPRESSION READ MODE FOR MEMORY TESTING
41
Patent #:
7180803
Issue Dt:
02/20/2007
Application #:
11430550
Filing Dt:
05/09/2006
Publication #:
US20060215470
Pub Dt:
09/28/2006
Title:
DATA COMPRESSION READ MODE FOR MEMORY TESTING
42
Patent #:
7759800
Issue Dt:
07/20/2010
Application #:
11430735
Filing Dt:
05/09/2006
Publication #:
US20060216862
Pub Dt:
09/28/2006
Title:
MICROELECTRONIC DEVICES HAVING VIAS, AND PACKAGED MICROELECTRONIC DEVICES HAVING VIAS
43
Patent #:
7211479
Issue Dt:
05/01/2007
Application #:
11430792
Filing Dt:
05/09/2006
Publication #:
US20060205135
Pub Dt:
09/14/2006
Title:
SILICON RICH BARRIER LAYERS FOR INTEGRATED CIRCUIT DEVICES
44
Patent #:
7795152
Issue Dt:
09/14/2010
Application #:
11431269
Filing Dt:
05/10/2006
Publication #:
US20070264826
Pub Dt:
11/15/2007
Title:
METHODS OF MAKING SELF-ALIGNED NANO-STRUCTURES
45
Patent #:
7655969
Issue Dt:
02/02/2010
Application #:
11431509
Filing Dt:
05/11/2006
Publication #:
US20060258112
Pub Dt:
11/16/2006
Title:
SEMICONDUCTOR DEVICE HAVING A CYLINDRICAL CAPACITOR
46
Patent #:
7560392
Issue Dt:
07/14/2009
Application #:
11431958
Filing Dt:
05/10/2006
Publication #:
US20070264838
Pub Dt:
11/15/2007
Title:
ELECTRICAL COMPONENTS FOR MICROELECTRONIC DEVICES AND METHODS OF FORMING THE SAME
47
Patent #:
7526713
Issue Dt:
04/28/2009
Application #:
11432009
Filing Dt:
05/10/2006
Publication #:
US20060218469
Pub Dt:
09/28/2006
Title:
LOW POWER COST-EFFECTIVE ECC MEMORY SYSTEM AND METHOD
48
Patent #:
7805586
Issue Dt:
09/28/2010
Application #:
11432013
Filing Dt:
05/10/2006
Publication #:
US20060206667
Pub Dt:
09/14/2006
Title:
SYSTEM AND METHOD FOR OPTIMIZING INTERCONNECTIONS OF MEMORY DEVICES IN A MULTICHIP MODULE
49
Patent #:
7489875
Issue Dt:
02/10/2009
Application #:
11432015
Filing Dt:
05/10/2006
Publication #:
US20060204247
Pub Dt:
09/14/2006
Title:
SYSTEM AND METHOD FOR MULTIPLE BIT OPTICAL DATA TRANSMISSION IN MEMORY SYSTEMS
50
Patent #:
7528877
Issue Dt:
05/05/2009
Application #:
11432016
Filing Dt:
05/10/2006
Publication #:
US20060203115
Pub Dt:
09/14/2006
Title:
METHOD AND SYSTEM FOR REDUCING MISMATCH BETWEEN REFERENCE AND INTENSITY PATHS IN ANALOG TO DIGITAL CONVERTERS IN CMOS ACTIVE PIXEL SENSORS
51
Patent #:
7596641
Issue Dt:
09/29/2009
Application #:
11432017
Filing Dt:
05/10/2006
Publication #:
US20060271720
Pub Dt:
11/30/2006
Title:
SYSTEM AND METHOD FOR TRANSMITTING DATA PACKETS IN A COMPUTER SYSTEM HAVING A MEMORY HUB ARCHITECTURE
52
Patent #:
7266633
Issue Dt:
09/04/2007
Application #:
11432018
Filing Dt:
05/10/2006
Publication #:
US20060218331
Pub Dt:
09/28/2006
Title:
SYSTEM AND METHOD FOR COMMUNICATING THE SYNCHRONIZATION STATUS OF MEMORY MODULES DURING INITIALIZATION OF THE MEMORY MODULES
53
Patent #:
7616482
Issue Dt:
11/10/2009
Application #:
11432019
Filing Dt:
05/11/2006
Publication #:
US20060203554
Pub Dt:
09/14/2006
Title:
MULTI-STATE MEMORY CELL WITH ASYMMETRIC CHARGE TRAPPING
54
Patent #:
7434081
Issue Dt:
10/07/2008
Application #:
11432060
Filing Dt:
05/10/2006
Publication #:
US20060206679
Pub Dt:
09/14/2006
Title:
SYSTEM AND METHOD FOR READ SYNCHRONIZATION OF MEMORY MODULES
55
Patent #:
7450422
Issue Dt:
11/11/2008
Application #:
11432135
Filing Dt:
05/11/2006
Publication #:
US20070263462
Pub Dt:
11/15/2007
Title:
NAND ARCHITECTURE MEMORY DEVICES AND OPERATION
56
Patent #:
7224639
Issue Dt:
05/29/2007
Application #:
11432238
Filing Dt:
05/10/2006
Publication #:
US20060203605
Pub Dt:
09/14/2006
Title:
MULTI-PHASE CLOCK SIGNAL GENERATOR AND METHOD HAVING INHERENTLY UNLIMITED FREQUENCY CAPABILITY
57
Patent #:
8008144
Issue Dt:
08/30/2011
Application #:
11432270
Filing Dt:
05/11/2006
Publication #:
US20070264771
Pub Dt:
11/15/2007
Title:
DUAL WORK FUNCTION RECESSED ACCESS DEVICE AND METHODS OF FORMING
58
Patent #:
7761675
Issue Dt:
07/20/2010
Application #:
11432301
Filing Dt:
05/10/2006
Publication #:
US20070016735
Pub Dt:
01/18/2007
Title:
FLASH MEMORY DEVICE WITH IMPROVED MANAGEMENT OF PROTECTION INFORMATION
59
Patent #:
7288005
Issue Dt:
10/30/2007
Application #:
11432334
Filing Dt:
05/12/2006
Publication #:
US20060264112
Pub Dt:
11/23/2006
Title:
SEMICONDUCTOR DEVICE HAVING A MODULE BOARD
60
Patent #:
7514954
Issue Dt:
04/07/2009
Application #:
11432421
Filing Dt:
05/10/2006
Publication #:
US20070263459
Pub Dt:
11/15/2007
Title:
METHOD AND APPARATUS FOR OUTPUT DRIVER CALIBRATION
61
Patent #:
7482190
Issue Dt:
01/27/2009
Application #:
11432578
Filing Dt:
05/11/2006
Publication #:
US20060208343
Pub Dt:
09/21/2006
Title:
MICROMECHANICAL STRAINED SEMICONDUCTOR BY WAFER BONDING
62
Patent #:
7678460
Issue Dt:
03/16/2010
Application #:
11432739
Filing Dt:
05/11/2006
Publication #:
US20060205236
Pub Dt:
09/14/2006
Title:
INTERMEDIATE SEMICONDUCTOR DEVICE STRUCTURES USING PHOTOPATTERNABLE, DIELECTRIC MATERIALS
63
Patent #:
7910385
Issue Dt:
03/22/2011
Application #:
11433015
Filing Dt:
05/12/2006
Publication #:
US20070262436
Pub Dt:
11/15/2007
Title:
METHOD OF FABRICATING MICROELECTRONIC DEVICES
64
Patent #:
7529273
Issue Dt:
05/05/2009
Application #:
11433131
Filing Dt:
05/11/2006
Publication #:
US20060218318
Pub Dt:
09/28/2006
Title:
METHOD AND SYSTEM FOR SYNCHRONIZING COMMUNICATIONS LINKS IN A HUB-BASED MEMORY SYSTEM
65
Patent #:
7313034
Issue Dt:
12/25/2007
Application #:
11433182
Filing Dt:
05/11/2006
Publication #:
US20060203572
Pub Dt:
09/14/2006
Title:
LOW SUPPLY VOLTAGE TEMPERATURE COMPENSATED REFERENCE VOLTAGE GENERATOR AND METHOD
66
Patent #:
7259608
Issue Dt:
08/21/2007
Application #:
11433216
Filing Dt:
05/11/2006
Publication #:
US20060203606
Pub Dt:
09/14/2006
Title:
SYSTEM AND METHOD FOR OPEN-LOOP SYNTHESIS OF OUTPUT CLOCK SIGNALS HAVING A SELECTED PHASE RELATIVE TO AN INPUT CLOCK SIGNAL
67
Patent #:
7461320
Issue Dt:
12/02/2008
Application #:
11433217
Filing Dt:
05/11/2006
Publication #:
US20060206769
Pub Dt:
09/14/2006
Title:
MEMORY SYSTEM AND METHOD HAVING SELECTIVE ECC DURING LOW POWER REFRESH
68
Patent #:
7484142
Issue Dt:
01/27/2009
Application #:
11433220
Filing Dt:
05/11/2006
Publication #:
US20060218453
Pub Dt:
09/28/2006
Title:
SYSTEM AND METHOD FOR TESTING A MEMORY FOR A MEMORY FAILURE EXHIBITED BY A FAILING MEMORY
69
Patent #:
7746959
Issue Dt:
06/29/2010
Application #:
11433322
Filing Dt:
05/11/2006
Publication #:
US20060203938
Pub Dt:
09/14/2006
Title:
METHOD AND SYSTEM FOR GENERATING REFERENCE VOLTAGES FOR SIGNAL RECEIVERS
70
Patent #:
7682977
Issue Dt:
03/23/2010
Application #:
11433324
Filing Dt:
05/11/2006
Publication #:
US20070264794
Pub Dt:
11/15/2007
Title:
METHODS OF FORMING TRENCH ISOLATION AND METHODS OF FORMING ARRAYS OF FLASH MEMORY CELLS
71
Patent #:
7489556
Issue Dt:
02/10/2009
Application #:
11433341
Filing Dt:
05/12/2006
Publication #:
US20070263453
Pub Dt:
11/15/2007
Title:
METHOD AND APPARATUS FOR GENERATING READ AND VERIFY OPERATIONS IN NON-VOLATILE MEMORIES
72
Patent #:
7755119
Issue Dt:
07/13/2010
Application #:
11433383
Filing Dt:
05/15/2006
Publication #:
US20060214201
Pub Dt:
09/28/2006
Title:
METHOD AND APPARATUS FOR REDUCING IMAGER FLOATING DIFFUSION LEAKAGE
73
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11433384
Filing Dt:
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Pub Dt:
11/15/2007
Title:
METHOD FOR FORMING A FLOATING GATE USING CHEMICAL MECHANICAL PLANARIZATION
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11433533
Filing Dt:
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Pub Dt:
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Title:
NON-PLANAR TRANSISTOR AND TECHNIQUES FOR FABRICATING THE SAME
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Filing Dt:
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Publication #:
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Pub Dt:
11/15/2007
Title:
METHOD AND APPARATUS FOR PROGRAMMING FLASH MEMORY
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Filing Dt:
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Pub Dt:
09/14/2006
Title:
SEMICONDUCTOR COMPONENT HAVING STIFFENER, CIRCUIT DECAL AND TERMINAL CONTACTS
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09/18/2007
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Pub Dt:
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Title:
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Pub Dt:
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Title:
ROW DECODER CIRCUIT AND RELATED SYSTEM AND METHOD
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Pub Dt:
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Title:
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Pub Dt:
10/19/2006
Title:
SCALABLE HIGH DENSITY NON-VOLATILE MEMORY CELLS IN A CONTACTLESS MEMORY ARRAY
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Pub Dt:
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Title:
IN-SERVICE RECONFIGURABLE DRAM AND FLASH MEMORY DEVICE
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Title:
IN-SERVICE RECONFIGURABLE DRAM AND FLASH MEMORY DEVICE
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12/27/2011
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Pub Dt:
09/14/2006
Title:
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Pub Dt:
09/21/2006
Title:
NON-PLANAR FLASH MEMORY HAVING SHIELDING BETWEEN FLOATING GATES
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Pub Dt:
11/22/2007
Title:
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Pub Dt:
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Title:
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Pub Dt:
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Title:
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Pub Dt:
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Title:
LOW VOLTAGE SENSE AMPLIFIER AND SENSING METHOD
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Pub Dt:
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Title:
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90
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Pub Dt:
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Title:
SYNCHRONOUS CLOCK GENERATOR INCLUDING DUTY CYCLE CORRECTION
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Title:
CHARGE-PUMP TYPE, VOLTAGE-BOOSTING DEVICE WITH REDUCED RIPPLE, IN PARTICULAR FOR NON-VOLATILE FLASH MEMORIES
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Title:
MICROELECTRONIC COMPONENT ASSEMBLIES WITH RECESSED WIRE BONDS AND METHODS OF MAKING SAME
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Title:
HIGH-VOLTAGE SWITCH WITH LOW OUTPUT RIPPLE FOR NON-VOLATILE FLOATING-GATE MEMORIES
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7773412
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Title:
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Pub Dt:
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Title:
METHODS OF REDUCING FLOATING BODY EFFECT
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7528439
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11438419
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VERTICAL WRAP-AROUND-GATE FIELD-EFFECT-TRANSISTOR FOR HIGH DENSITY, LOW VOLTAGE LOGIC AND MEMORY ARRAY
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11438771
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05/23/2006
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Title:
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11438978
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09/28/2006
Title:
BALLISTIC DIRECT INJECTION NROM CELL ON STRAINED SILICON STRUCTURES
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06/07/2011
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11439078
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05/22/2006
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11/22/2007
Title:
METHODS OF DETERMINING X-Y SPATIAL ORIENTATION OF A SEMICONDUCTOR SUBSTRATE COMPRISING AN INTEGRATED CIRCUIT, METHODS OF POSITIONING A SEMICONDUCTOR SUBSTRATE COMPRISING AN INTEGRATED CIRCUIT, METHODS OF PROCESSING A SEMICONDUCTOR SUBSTRATE, AND SEMICONDUCTOR DEVIC
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7671644
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11439178
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05/24/2006
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US20070273421
Pub Dt:
11/29/2007
Title:
PROCESS INSENSITIVE DELAY LINE
Assignor
1
MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Exec Dt:
07/31/2019
Assignee
1
MICRON TECHNOLOGY, INC.
8000 S FEDERAL WAY
BOISE, IDAHO 83707
Correspondence name and address
WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
ONE MARKET, SPEAR TOWER, SUITE 3300
SAN FRANCISCO, CA 94105

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