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Reel/Frame:050937/0001   Pages: 964
Recorded: 10/09/2019
Attorney Dkt #:4816.244
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 18018
Page 102 of 181
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181
1
Patent #:
7310259
Issue Dt:
12/18/2007
Application #:
11439635
Filing Dt:
05/23/2006
Publication #:
US20060221659
Pub Dt:
10/05/2006
Title:
ACCESS CIRCUIT AND METHOD FOR ALLOWING EXTERNAL TEST VOLTAGE TO BE APPLIED TO ISOLATED WELLS
2
Patent #:
7506226
Issue Dt:
03/17/2009
Application #:
11439636
Filing Dt:
05/23/2006
Publication #:
US20070277066
Pub Dt:
11/29/2007
Title:
SYSTEM AND METHOD FOR MORE EFFICIENTLY USING ERROR CORRECTION CODES TO FACILITATE MEMORY DEVICE TESTING
3
Patent #:
7253668
Issue Dt:
08/07/2007
Application #:
11439685
Filing Dt:
05/24/2006
Publication #:
US20060208780
Pub Dt:
09/21/2006
Title:
DELAY-LOCKED LOOP WITH FEEDBACK COMPENSATION
4
Patent #:
7202098
Issue Dt:
04/10/2007
Application #:
11439965
Filing Dt:
05/25/2006
Publication #:
US20060208330
Pub Dt:
09/21/2006
Title:
METHOD AND STRUCTURE TO REDUCE OPTICAL CROSSTALK IN A SOLID STATE IMAGER
5
Patent #:
7359263
Issue Dt:
04/15/2008
Application #:
11440181
Filing Dt:
05/25/2006
Publication #:
US20060268634
Pub Dt:
11/30/2006
Title:
CHIP INFORMATION MANAGING METHOD, CHIP INFORMATION MANAGING SYSTEM, AND CHIP INFORMATION MANAGING PROGRAM
6
Patent #:
7375554
Issue Dt:
05/20/2008
Application #:
11440250
Filing Dt:
05/24/2006
Publication #:
US20060255835
Pub Dt:
11/16/2006
Title:
VOLTAGE LEVEL TRANSLATOR CIRCUITRY
7
Patent #:
8084322
Issue Dt:
12/27/2011
Application #:
11440260
Filing Dt:
05/24/2006
Publication #:
US20070072357
Pub Dt:
03/29/2007
Title:
METHOD OF MANUFACTURING DEVICES HAVING VERTICAL JUNCTION EDGE
8
Patent #:
7650541
Issue Dt:
01/19/2010
Application #:
11440348
Filing Dt:
05/24/2006
Publication #:
US20060242484
Pub Dt:
10/26/2006
Title:
MEMORY BLOCK QUALITY IDENTIFICATION IN A MEMORY DEVICE
9
Patent #:
7417280
Issue Dt:
08/26/2008
Application #:
11440646
Filing Dt:
05/24/2006
Publication #:
US20060208310
Pub Dt:
09/21/2006
Title:
METHOD AND APPARATUS FOR A FLASH MEMORY DEVICE COMPRISING A SOURCE LOCAL INTERCONNECT
10
Patent #:
7282390
Issue Dt:
10/16/2007
Application #:
11440913
Filing Dt:
05/25/2006
Publication #:
US20060216864
Pub Dt:
09/28/2006
Title:
STACKED DIE-IN-DIE BGA PACKAGE WITH DIE HAVING A RECESS
11
Patent #:
7362634
Issue Dt:
04/22/2008
Application #:
11442506
Filing Dt:
05/25/2006
Publication #:
US20070280032
Pub Dt:
12/06/2007
Title:
BUILT-IN SYSTEM AND METHOD FOR TESTING INTEGRATED CIRCUIT TIMING PARAMETERS
12
Patent #:
7375573
Issue Dt:
05/20/2008
Application #:
11442510
Filing Dt:
05/25/2006
Publication #:
US20070273425
Pub Dt:
11/29/2007
Title:
DE-EMPHASIS SYSTEM AND METHOD FOR COUPLING DIGITAL SIGNALS THROUGH CAPACITIVELY LOADED LINES
13
Patent #:
7536618
Issue Dt:
05/19/2009
Application #:
11442515
Filing Dt:
05/25/2006
Publication #:
US20070300111
Pub Dt:
12/27/2007
Title:
WIDE FREQUENCY RANGE SIGNAL GENERATOR AND METHOD, AND INTEGRATED CIRCUIT TEST SYSTEM USING SAME
14
Patent #:
7723713
Issue Dt:
05/25/2010
Application #:
11443266
Filing Dt:
05/31/2006
Publication #:
US20070007506
Pub Dt:
01/11/2007
Title:
LAYERED RESISTANCE VARIABLE MEMORY DEVICE AND METHOD OF FABRICATION
15
Patent #:
7498606
Issue Dt:
03/03/2009
Application #:
11444404
Filing Dt:
06/01/2006
Publication #:
US20060216850
Pub Dt:
09/28/2006
Title:
MICROELECTRONIC IMAGING UNITS AND METHODS OF MANUFACTURING MICROELECTRONIC IMAGING UNITS
16
Patent #:
7676710
Issue Dt:
03/09/2010
Application #:
11444705
Filing Dt:
06/01/2006
Publication #:
US20060236207
Pub Dt:
10/19/2006
Title:
ERROR DETECTION, DOCUMENTATION, AND CORRECTION IN A FLASH MEMORY DEVICE
17
Patent #:
7797597
Issue Dt:
09/14/2010
Application #:
11444820
Filing Dt:
06/01/2006
Publication #:
US20060242485
Pub Dt:
10/26/2006
Title:
ERROR DETECTION, DOCUMENTATION, AND CORRECTION IN A FLASH MEMORY DEVICE
18
Patent #:
7474577
Issue Dt:
01/06/2009
Application #:
11444892
Filing Dt:
05/31/2006
Publication #:
US20060291322
Pub Dt:
12/28/2006
Title:
CIRCUIT AND METHOD FOR RETRIEVING DATA STORED IN SEMICONDUCTOR MEMORY CELLS
19
Patent #:
7674698
Issue Dt:
03/09/2010
Application #:
11444993
Filing Dt:
06/01/2006
Publication #:
US20070010061
Pub Dt:
01/11/2007
Title:
METAL-SUBSTITUTED TRANSISTOR GATES
20
Patent #:
7750379
Issue Dt:
07/06/2010
Application #:
11445000
Filing Dt:
06/01/2006
Publication #:
US20070007560
Pub Dt:
01/11/2007
Title:
METAL-SUBSTITUTED TRANSISTOR GATES
21
Patent #:
7662649
Issue Dt:
02/16/2010
Application #:
11445032
Filing Dt:
05/31/2006
Publication #:
US20060216840
Pub Dt:
09/28/2006
Title:
METHODS FOR ASSESSING ALIGNMENTS OF SUBSTRATES WITHIN DEPOSITION APPARATUSES; AND METHODS FOR ASSESSING THICKNESSES OF DEPOSITED LAYERS WITHIN DEPOSITION APPARATUSES
22
Patent #:
7394694
Issue Dt:
07/01/2008
Application #:
11445491
Filing Dt:
05/31/2006
Publication #:
US20060285387
Pub Dt:
12/21/2006
Title:
FLASH MEMORY DEVICE WITH NAND ARCHITECTURE WITH REDUCED CAPACITIVE COUPLING EFFECT
23
Patent #:
7709341
Issue Dt:
05/04/2010
Application #:
11445544
Filing Dt:
06/02/2006
Publication #:
US20070281493
Pub Dt:
12/06/2007
Title:
METHODS OF SHAPING VERTICAL SINGLE CRYSTAL SILICON WALLS AND RESULTING STRUCTURES
24
Patent #:
7625766
Issue Dt:
12/01/2009
Application #:
11445708
Filing Dt:
06/02/2006
Publication #:
US20070281452
Pub Dt:
12/06/2007
Title:
METHODS OF FORMING CARBON NANOTUBES AND METHODS OF FABRICATING INTEGRATED CIRCUITRY
25
Patent #:
7628932
Issue Dt:
12/08/2009
Application #:
11445718
Filing Dt:
06/02/2006
Publication #:
US20070278183
Pub Dt:
12/06/2007
Title:
WET ETCH SUITABLE FOR CREATING SQUARE CUTS IN SI
26
Patent #:
7795149
Issue Dt:
09/14/2010
Application #:
11445766
Filing Dt:
06/01/2006
Publication #:
US20070281219
Pub Dt:
12/06/2007
Title:
MASKING TECHNIQUES AND CONTACT IMPRINT RETICLES FOR DENSE SEMICONDUCTOR FABRICATION
27
Patent #:
7723009
Issue Dt:
05/25/2010
Application #:
11445907
Filing Dt:
06/02/2006
Publication #:
US20070281220
Pub Dt:
12/06/2007
Title:
TOPOGRAPHY BASED PATTERNING
28
Patent #:
7625776
Issue Dt:
12/01/2009
Application #:
11445911
Filing Dt:
06/02/2006
Publication #:
US20070281488
Pub Dt:
12/06/2007
Title:
METHODS OF FABRICATING INTERMEDIATE SEMICONDUCTOR STRUCTURES BY SELECTIVELY ETCHING POCKETS OF IMPLANTED SILICON
29
Patent #:
7749899
Issue Dt:
07/06/2010
Application #:
11446003
Filing Dt:
06/01/2006
Publication #:
US20070281473
Pub Dt:
12/06/2007
Title:
MICROELECTRONIC WORKPIECES AND METHODS AND SYSTEMS FOR FORMING INTERCONNECTS IN MICROELECTRONIC WORKPIECES
30
Patent #:
7622798
Issue Dt:
11/24/2009
Application #:
11446004
Filing Dt:
06/01/2006
Publication #:
US20070246840
Pub Dt:
10/25/2007
Title:
INTEGRATED CIRCUIT DEVICES WITH STACKED PACKAGE INTERPOSERS
31
Patent #:
7627772
Issue Dt:
12/01/2009
Application #:
11446725
Filing Dt:
06/05/2006
Publication #:
US20060248368
Pub Dt:
11/02/2006
Title:
FAST DATA ACCESS MODE IN A MEMORY DEVICE
32
Patent #:
7338878
Issue Dt:
03/04/2008
Application #:
11447147
Filing Dt:
06/06/2006
Publication #:
US20060275997
Pub Dt:
12/07/2006
Title:
METHOD FOR FORMING CAPACITOR IN SEMICONDUCTOR DEVICE
33
Patent #:
7388794
Issue Dt:
06/17/2008
Application #:
11447272
Filing Dt:
06/06/2006
Publication #:
US20060221671
Pub Dt:
10/05/2006
Title:
INDIVIDUAL I/O MODULATION IN MEMORY DEVICES
34
Patent #:
7486550
Issue Dt:
02/03/2009
Application #:
11447709
Filing Dt:
06/06/2006
Publication #:
US20070279977
Pub Dt:
12/06/2007
Title:
SEMICONDUCTOR MAGNETIC MEMORY INTEGRATING A MAGNETIC TUNNELING JUNCTION ABOVE A FLOATING-GATE MEMORY CELL
35
Patent #:
7277357
Issue Dt:
10/02/2007
Application #:
11447740
Filing Dt:
06/05/2006
Title:
METHOD AND APPARATUS FOR REDUCING OSCILLATION IN SYNCHRONOUS CIRCUITS
36
Patent #:
7568970
Issue Dt:
08/04/2009
Application #:
11447741
Filing Dt:
06/05/2006
Publication #:
US20060229008
Pub Dt:
10/12/2006
Title:
CHEMICAL MECHANICAL POLISHING PADS
37
Patent #:
7439450
Issue Dt:
10/21/2008
Application #:
11447808
Filing Dt:
06/06/2006
Publication #:
US20060225919
Pub Dt:
10/12/2006
Title:
PLATING BUSS AND A METHOD OF USE THEREOF
38
Patent #:
7344946
Issue Dt:
03/18/2008
Application #:
11447909
Filing Dt:
06/07/2006
Publication #:
US20060231823
Pub Dt:
10/19/2006
Title:
METHODS OF FORMING AMORPHOUS CARBON BASED NON-VOLATILE MEMORY
39
Patent #:
7619247
Issue Dt:
11/17/2009
Application #:
11447921
Filing Dt:
06/07/2006
Publication #:
US20060219994
Pub Dt:
10/05/2006
Title:
STRUCTURE FOR AMORPHOUS CARBON BASED NON-VOLATILE MEMORY
40
Patent #:
7272046
Issue Dt:
09/18/2007
Application #:
11448062
Filing Dt:
06/06/2006
Publication #:
US20070133300
Pub Dt:
06/14/2007
Title:
HIGH VOLTAGE SWITCHING CIRCUIT
41
Patent #:
7952922
Issue Dt:
05/31/2011
Application #:
11448063
Filing Dt:
06/06/2006
Publication #:
US20070279989
Pub Dt:
12/06/2007
Title:
METHOD FOR PROGRAMMING A NON-VOLATILE MEMORY DEVICE TO REDUCE FLOATING-GATE-TO-FLOATING-GATE COUPLING EFFECT
42
Patent #:
7333366
Issue Dt:
02/19/2008
Application #:
11448220
Filing Dt:
06/07/2006
Publication #:
US20060227612
Pub Dt:
10/12/2006
Title:
COMMON WORDLINE FLASH ARRAY ARCHITECTURE
43
Patent #:
7329910
Issue Dt:
02/12/2008
Application #:
11448257
Filing Dt:
06/06/2006
Publication #:
US20060228893
Pub Dt:
10/12/2006
Title:
SEMICONDUCTOR SUBSTRATES AND FIELD EFFECT TRANSISTOR CONSTRUCTIONS
44
Patent #:
7427811
Issue Dt:
09/23/2008
Application #:
11448375
Filing Dt:
06/06/2006
Publication #:
US20060237822
Pub Dt:
10/26/2006
Title:
SEMICONDUCTOR SUBSTRATE
45
Patent #:
7465406
Issue Dt:
12/16/2008
Application #:
11448996
Filing Dt:
06/07/2006
Publication #:
US20060228891
Pub Dt:
10/12/2006
Title:
METHOD OF EXPOSING A SUBSTRATE TO A SURFACE MICROWAVE PLASMA, ETCHING METHOD, DEPOSITION METHOD, SURFACE MICROWAVE PLASMA GENERATING APPARATUS, SEMICONDUCTOR SUBSTRATE ETCHING APPARATUS, SEMICONDUCTOR SUBSTRATE DEPOSITION APPARATUS, AND MICROWAVE PLASMA GENERATING
46
Patent #:
7425462
Issue Dt:
09/16/2008
Application #:
11449472
Filing Dt:
06/07/2006
Publication #:
US20060240582
Pub Dt:
10/26/2006
Title:
METHODS RELATING TO THE RECONSTRUCTION OF SEMICONDUCTOR WAFERS FOR WAFER-LEVEL PROCESSING
47
Patent #:
7807541
Issue Dt:
10/05/2010
Application #:
11449539
Filing Dt:
06/07/2006
Publication #:
US20060226496
Pub Dt:
10/12/2006
Title:
CONCENTRIC OR NESTED CONTAINER CAPACITOR STRUCTURE FOR INTEGRATED CIRCUITS
48
Patent #:
7512029
Issue Dt:
03/31/2009
Application #:
11449754
Filing Dt:
06/09/2006
Publication #:
US20070291570
Pub Dt:
12/20/2007
Title:
METHOD AND APPARATUS FOR MANAGING BEHAVIOR OF MEMORY DEVICES
49
Patent #:
7505317
Issue Dt:
03/17/2009
Application #:
11449755
Filing Dt:
06/09/2006
Publication #:
US20070263443
Pub Dt:
11/15/2007
Title:
METHOD, APPARATUS, AND SYSTEM FOR PROVIDING INITIAL STATE RANDOM ACCESS MEMORY
50
Patent #:
7825033
Issue Dt:
11/02/2010
Application #:
11450020
Filing Dt:
06/09/2006
Publication #:
US20070287252
Pub Dt:
12/13/2007
Title:
METHODS OF FORMING VARIABLE RESISTANCE MEMORY CELLS, AND METHODS OF ETCHING GERMANIUM, ANTIMONY, AND TELLURIUM-COMPRISING MATERIALS
51
Patent #:
7425463
Issue Dt:
09/16/2008
Application #:
11450485
Filing Dt:
06/09/2006
Publication #:
US20060246622
Pub Dt:
11/02/2006
Title:
STACKED DIE PACKAGE FOR PERIPHERAL AND CENTER DEVICE PAD LAYOUT DEVICE
52
Patent #:
7525354
Issue Dt:
04/28/2009
Application #:
11450630
Filing Dt:
06/09/2006
Publication #:
US20070296472
Pub Dt:
12/27/2007
Title:
LOCAL COARSE DELAY UNITS
53
Patent #:
7517744
Issue Dt:
04/14/2009
Application #:
11450661
Filing Dt:
06/08/2006
Publication #:
US20060284210
Pub Dt:
12/21/2006
Title:
CAPACITORLESS DRAM ON BULK SILICON
54
Patent #:
7586784
Issue Dt:
09/08/2009
Application #:
11450759
Filing Dt:
06/09/2006
Publication #:
US20070288702
Pub Dt:
12/13/2007
Title:
APPARATUS AND METHODS FOR PROGRAMMING MULTILEVEL-CELL NAND MEMORY DEVICES
55
Patent #:
7580279
Issue Dt:
08/25/2009
Application #:
11450760
Filing Dt:
06/09/2006
Publication #:
US20060226471
Pub Dt:
10/12/2006
Title:
FLASH MEMORY CELLS WITH REDUCED DISTANCES BETWEEN CELL ELEMENTS
56
Patent #:
7214994
Issue Dt:
05/08/2007
Application #:
11451703
Filing Dt:
06/13/2006
Publication #:
US20070045676
Pub Dt:
03/01/2007
Title:
SELF ALIGNED METAL GATES ON HIGH-K DIELECTRICS
57
Patent #:
7588677
Issue Dt:
09/15/2009
Application #:
11451723
Filing Dt:
06/12/2006
Publication #:
US20060234604
Pub Dt:
10/19/2006
Title:
METHODS AND APPARATUS FOR ELECTRICAL, MECHANICAL AND/OR CHEMICAL REMOVAL OF CONDUCTIVE MATERIAL FROM A MICROELECTRONIC SUBSTRATE
58
Patent #:
7626865
Issue Dt:
12/01/2009
Application #:
11451822
Filing Dt:
06/13/2006
Publication #:
US20070291547
Pub Dt:
12/20/2007
Title:
CHARGE PUMP OPERATION IN A NON-VOLATILE MEMORY DEVICE
59
Patent #:
7564087
Issue Dt:
07/21/2009
Application #:
11451920
Filing Dt:
06/13/2006
Publication #:
US20060231879
Pub Dt:
10/19/2006
Title:
MERGED MOS-BIPOLAR CAPACITOR MEMORY CELL
60
Patent #:
7601547
Issue Dt:
10/13/2009
Application #:
11451925
Filing Dt:
06/12/2006
Publication #:
US20060234397
Pub Dt:
10/19/2006
Title:
MAGNETIC ANNEALING SEQUENCES FOR PATTERNED MRAM SYNTHETIC ANTIFERROMAGNETIC PINNED LAYERS
61
Patent #:
7608876
Issue Dt:
10/27/2009
Application #:
11452025
Filing Dt:
06/13/2006
Publication #:
US20060226463
Pub Dt:
10/12/2006
Title:
MERGED MOS-BIPOLAR CAPACITOR MEMORY CELL
62
Patent #:
7540018
Issue Dt:
05/26/2009
Application #:
11452594
Filing Dt:
06/14/2006
Publication #:
US20070005959
Pub Dt:
01/04/2007
Title:
DATA SECURITY FOR DIGITAL DATA STORAGE
63
Patent #:
8037378
Issue Dt:
10/11/2011
Application #:
11452696
Filing Dt:
06/14/2006
Publication #:
US20060236164
Pub Dt:
10/19/2006
Title:
AUTOMATIC TEST ENTRY TERMINATION IN A MEMORY DEVICE
64
Patent #:
7372715
Issue Dt:
05/13/2008
Application #:
11452697
Filing Dt:
06/14/2006
Publication #:
US20070291565
Pub Dt:
12/20/2007
Title:
ARCHITECTURE AND METHOD FOR NAND FLASH MEMORY
65
Patent #:
7525841
Issue Dt:
04/28/2009
Application #:
11452698
Filing Dt:
06/14/2006
Publication #:
US20070291542
Pub Dt:
12/20/2007
Title:
PROGRAMMING METHOD FOR NAND FLASH
66
Patent #:
8202754
Issue Dt:
06/19/2012
Application #:
11452750
Filing Dt:
06/13/2006
Publication #:
US20070228577
Pub Dt:
10/04/2007
Title:
PACKAGED MICROELECTRONIC DEVICES RECESSED IN SUPPORT MEMBER CAVITIES, AND ASSOCIATED METHODS
67
Patent #:
7567477
Issue Dt:
07/28/2009
Application #:
11452783
Filing Dt:
06/13/2006
Publication #:
US20060280011
Pub Dt:
12/14/2006
Title:
BIAS SENSING IN SENSE AMPLIFIERS THROUGH A VOLTAGE-COUPLING/DECOUPLING DEVICE
68
Patent #:
7488386
Issue Dt:
02/10/2009
Application #:
11452817
Filing Dt:
06/13/2006
Publication #:
US20060231017
Pub Dt:
10/19/2006
Title:
ATOMIC LAYER DEPOSITION METHODS AND CHEMICAL VAPOR DEPOSITION METHODS
69
Patent #:
7944025
Issue Dt:
05/17/2011
Application #:
11452830
Filing Dt:
06/13/2006
Publication #:
US20060234167
Pub Dt:
10/19/2006
Title:
SEMICONDUCTOR CONSTRUCTIONS
70
Patent #:
7432025
Issue Dt:
10/07/2008
Application #:
11453425
Filing Dt:
06/14/2006
Publication #:
US20060234142
Pub Dt:
10/19/2006
Title:
METHODS OF FORMING RETICLES
71
Patent #:
7610525
Issue Dt:
10/27/2009
Application #:
11454464
Filing Dt:
06/16/2006
Publication #:
US20060248268
Pub Dt:
11/02/2006
Title:
DEFECTIVE MEMORY BLOCK IDENTIFICATION IN A MEMORY DEVICE
72
Patent #:
7563157
Issue Dt:
07/21/2009
Application #:
11454501
Filing Dt:
06/16/2006
Publication #:
US20060234610
Pub Dt:
10/19/2006
Title:
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Title:
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Title:
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Title:
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Title:
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Title:
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Assignor
1
MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Exec Dt:
07/31/2019
Assignee
1
MICRON TECHNOLOGY, INC.
8000 S FEDERAL WAY
BOISE, IDAHO 83707
Correspondence name and address
WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
ONE MARKET, SPEAR TOWER, SUITE 3300
SAN FRANCISCO, CA 94105

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