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Reel/Frame:050937/0001   Pages: 964
Recorded: 10/09/2019
Attorney Dkt #:4816.244
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 18018
Page 108 of 181
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181
1
Patent #:
7528402
Issue Dt:
05/05/2009
Application #:
11594879
Filing Dt:
11/09/2006
Publication #:
US20070114510
Pub Dt:
05/24/2007
Title:
ELECTRICALLY REWRITABLE NON-VOLATILE MEMORY ELEMENT
2
Patent #:
8130536
Issue Dt:
03/06/2012
Application #:
11595055
Filing Dt:
11/09/2006
Publication #:
US20080112217
Pub Dt:
05/15/2008
Title:
READ WINDOW IN CHALCOGENIDE SEMICONDUCTOR MEMORIES
3
Patent #:
7553697
Issue Dt:
06/30/2009
Application #:
11595067
Filing Dt:
11/09/2006
Publication #:
US20070059862
Pub Dt:
03/15/2007
Title:
MULTIPLE CHIP SEMICONDUCTOR PACKAGE
4
Patent #:
7378723
Issue Dt:
05/27/2008
Application #:
11595404
Filing Dt:
11/10/2006
Publication #:
US20070052087
Pub Dt:
03/08/2007
Title:
METHOD AND APPARATUS FOR DECOUPLING CONDUCTIVE PORTIONS OF A MICROELECTRONIC DEVICE PACKAGE
5
Patent #:
7781818
Issue Dt:
08/24/2010
Application #:
11595436
Filing Dt:
11/09/2006
Publication #:
US20070052115
Pub Dt:
03/08/2007
Title:
SEMICONDUCTOR CONSTRUCTIONS CONTAINING TUBULAR CAPACITOR STORAGE NODES, AND RETAINING STRUCTURES ALONG PORTIONS OF THE TUBULAR CAPACITOR STORAGE NODES
6
Patent #:
7552274
Issue Dt:
06/23/2009
Application #:
11595730
Filing Dt:
11/08/2006
Publication #:
US20070124533
Pub Dt:
05/31/2007
Title:
FLASH MEMORY ARCHITECTURE WITH SEPARATE STORAGE OF OVERHEAD AND USER DATA
7
Patent #:
7547628
Issue Dt:
06/16/2009
Application #:
11598036
Filing Dt:
11/13/2006
Publication #:
US20070111434
Pub Dt:
05/17/2007
Title:
METHOD FOR MANUFACTURING CAPACITOR
8
Patent #:
7910397
Issue Dt:
03/22/2011
Application #:
11598089
Filing Dt:
11/13/2006
Publication #:
US20070166983
Pub Dt:
07/19/2007
Title:
SMALL ELECTRODE FOR RESISTANCE VARIABLE DEVICES
9
Patent #:
7625794
Issue Dt:
12/01/2009
Application #:
11598437
Filing Dt:
11/13/2006
Publication #:
US20070059881
Pub Dt:
03/15/2007
Title:
METHODS OF FORMING ZIRCONIUM ALUMINUM OXIDE
10
Patent #:
7645671
Issue Dt:
01/12/2010
Application #:
11598449
Filing Dt:
11/13/2006
Publication #:
US20080113478
Pub Dt:
05/15/2008
Title:
RECESSED ACCESS DEVICE FOR A MEMORY
11
Patent #:
7456504
Issue Dt:
11/25/2008
Application #:
11599194
Filing Dt:
11/13/2006
Publication #:
US20070155029
Pub Dt:
07/05/2007
Title:
ELECTRONIC COMPONENT ASSEMBLIES WITH ELECTRICALLY CONDUCTIVE BONDS
12
Patent #:
7450450
Issue Dt:
11/11/2008
Application #:
11599224
Filing Dt:
11/13/2006
Publication #:
US20070070679
Pub Dt:
03/29/2007
Title:
CIRCUITRY FOR A PROGRAMMABLE ELEMENT
13
Patent #:
7471112
Issue Dt:
12/30/2008
Application #:
11599253
Filing Dt:
11/15/2006
Publication #:
US20070109022
Pub Dt:
05/17/2007
Title:
DIFFERENTIAL AMPLIFIER CIRCUIT
14
Patent #:
7663133
Issue Dt:
02/16/2010
Application #:
11599471
Filing Dt:
11/15/2006
Publication #:
US20070059882
Pub Dt:
03/15/2007
Title:
MEMORY ELEMENTS HAVING PATTERNED ELECTRODES AND METHOD OF FORMING THE SAME
15
Patent #:
7277321
Issue Dt:
10/02/2007
Application #:
11599700
Filing Dt:
11/15/2006
Publication #:
US20070070700
Pub Dt:
03/29/2007
Title:
METHOD FOR PROGRAMMING AND ERASING AN NROM CELL
16
Patent #:
7639530
Issue Dt:
12/29/2009
Application #:
11599701
Filing Dt:
11/15/2006
Publication #:
US20070064466
Pub Dt:
03/22/2007
Title:
METHOD FOR PROGRAMMING AND ERASING AN NROM CELL
17
Patent #:
7336541
Issue Dt:
02/26/2008
Application #:
11599702
Filing Dt:
11/15/2006
Publication #:
US20070058465
Pub Dt:
03/15/2007
Title:
NAND FLASH MEMORY CELL PROGRAMMING
18
Patent #:
7459930
Issue Dt:
12/02/2008
Application #:
11599889
Filing Dt:
11/14/2006
Publication #:
US20080112246
Pub Dt:
05/15/2008
Title:
DIGITAL CALIBRATION CIRCUITS, DEVICES AND SYSTEMS INCLUDING SAME, AND METHODS OF OPERATION
19
Patent #:
7592267
Issue Dt:
09/22/2009
Application #:
11600105
Filing Dt:
11/16/2006
Publication #:
US20070120222
Pub Dt:
05/31/2007
Title:
METHOD FOR MANUFACTURING SEMICONDUCTOR SILICON SUBSTRATE AND APPARATUS FOR MANUFACTURING THE SAME
20
Patent #:
7332789
Issue Dt:
02/19/2008
Application #:
11600350
Filing Dt:
11/16/2006
Publication #:
US20070063258
Pub Dt:
03/22/2007
Title:
ISOLATION TRENCHES FOR MEMORY DEVICES
21
Patent #:
7532517
Issue Dt:
05/12/2009
Application #:
11600356
Filing Dt:
11/16/2006
Publication #:
US20070064497
Pub Dt:
03/22/2007
Title:
NON-VOLATILE ONE TIME PROGRAMMABLE MEMORY
22
Patent #:
7898017
Issue Dt:
03/01/2011
Application #:
11600357
Filing Dt:
11/16/2006
Publication #:
US20070063259
Pub Dt:
03/22/2007
Title:
FLOATING-GATE MEMORY CELL AND MEMORY DEVICE AND ELECTRONIC SYSTEM THEREWITH
23
Patent #:
7345932
Issue Dt:
03/18/2008
Application #:
11600629
Filing Dt:
11/16/2006
Publication #:
US20070058458
Pub Dt:
03/15/2007
Title:
LOW POWER DISSIPATION VOLTAGE GENERATOR
24
Patent #:
7754531
Issue Dt:
07/13/2010
Application #:
11600665
Filing Dt:
11/15/2006
Publication #:
US20070128737
Pub Dt:
06/07/2007
Title:
METHOD FOR PACKAGING MICROELECTRONIC DEVICES
25
Patent #:
NONE
Issue Dt:
Application #:
11600695
Filing Dt:
11/16/2006
Publication #:
US20080118731
Pub Dt:
05/22/2008
Title:
Method of forming a structure having a high dielectric constant, a structure having a high dielectric constant, a capacitor including the structure, a method of forming the capacitor
26
Patent #:
9117553
Issue Dt:
08/25/2015
Application #:
11601107
Filing Dt:
11/17/2006
Publication #:
US20070168840
Pub Dt:
07/19/2007
Title:
Memory block quality identification in a memory device
27
Patent #:
7271620
Issue Dt:
09/18/2007
Application #:
11601263
Filing Dt:
11/17/2006
Publication #:
US20070063730
Pub Dt:
03/22/2007
Title:
VARIABLE IMPEDENCE OUTPUT BUFFER
28
Patent #:
7629250
Issue Dt:
12/08/2009
Application #:
11601341
Filing Dt:
11/17/2006
Publication #:
US20070066048
Pub Dt:
03/22/2007
Title:
METHOD FOR CREATING ELECTRICALLY CONDUCTIVE ELEMENTS FOR SEMICONDUCTOR DEVICE STRUCTURES USING LASER ABLATION PROCESSES AND METHODS OF FABRICATING SEMICONDUCTOR DEVICE ASSEMBLIES
29
Patent #:
7473645
Issue Dt:
01/06/2009
Application #:
11601362
Filing Dt:
11/16/2006
Publication #:
US20070066068
Pub Dt:
03/22/2007
Title:
METHOD OF DEPOSITING A LAYER COMPRISING SILICON, CARBON, AND FLOURINE ONTO A SEMICONDUCTOR SUBSTRATE
30
Patent #:
7567462
Issue Dt:
07/28/2009
Application #:
11601368
Filing Dt:
11/16/2006
Publication #:
US20080117686
Pub Dt:
05/22/2008
Title:
METHOD AND SYSTEM FOR SELECTIVELY LIMITING PEAK POWER CONSUMPTION DURING PROGRAMMING OR ERASE OF NON-VOLATILE MEMORY DEVICES
31
Patent #:
7939403
Issue Dt:
05/10/2011
Application #:
11601478
Filing Dt:
11/17/2006
Publication #:
US20080119020
Pub Dt:
05/22/2008
Title:
METHODS OF FORMING A FIELD EFFECT TRANSISTORS, PLURALITIES OF FIELD EFFECT TRANSISTORS, AND DRAM CIRCUITRY COMPRISING A PLURALITY OF INDIVIDUAL MEMORY CELLS
32
Patent #:
7289349
Issue Dt:
10/30/2007
Application #:
11601747
Filing Dt:
11/20/2006
Publication #:
US20070064474
Pub Dt:
03/22/2007
Title:
RESISTANCE VARIABLE MEMORY ELEMENT WITH THRESHOLD DEVICE AND METHOD OF FORMING THE SAME
33
Patent #:
7759187
Issue Dt:
07/20/2010
Application #:
11602607
Filing Dt:
11/21/2006
Publication #:
US20070077441
Pub Dt:
04/05/2007
Title:
METAL PLATING USING SEED FILM
34
Patent #:
7492033
Issue Dt:
02/17/2009
Application #:
11602947
Filing Dt:
11/22/2006
Publication #:
US20070120128
Pub Dt:
05/31/2007
Title:
SEMICONDUCTOR MEMORY DEVICE
35
Patent #:
7790632
Issue Dt:
09/07/2010
Application #:
11603426
Filing Dt:
11/21/2006
Publication #:
US20070161260
Pub Dt:
07/12/2007
Title:
METHODS OF FORMING A PHOSPHORUS DOPED SILICON DIOXIDE-COMPRISING LAYER
36
Patent #:
7539896
Issue Dt:
05/26/2009
Application #:
11604744
Filing Dt:
11/28/2006
Publication #:
US20070074070
Pub Dt:
03/29/2007
Title:
REPAIRABLE BLOCK REDUNDANCY SCHEME
37
Patent #:
7620789
Issue Dt:
11/17/2009
Application #:
11604906
Filing Dt:
11/28/2006
Publication #:
US20070101075
Pub Dt:
05/03/2007
Title:
OUT OF ORDER DRAM SEQUENCER
38
Patent #:
7409529
Issue Dt:
08/05/2008
Application #:
11604907
Filing Dt:
11/28/2006
Publication #:
US20070136560
Pub Dt:
06/14/2007
Title:
METHOD AND APPARATUS FOR A SHIFT REGISTER BASED INTERCONNECTION FOR A MASSIVELY PARALLEL PROCESSOR ARRAY
39
Patent #:
7935610
Issue Dt:
05/03/2011
Application #:
11604958
Filing Dt:
11/28/2006
Publication #:
US20080124888
Pub Dt:
05/29/2008
Title:
SEMICONDUCTOR DEVICE ISOLATION STRUCTURES
40
Patent #:
7655095
Issue Dt:
02/02/2010
Application #:
11605065
Filing Dt:
11/28/2006
Publication #:
US20070072368
Pub Dt:
03/29/2007
Title:
METHOD OF CLEANING SEMICONDUCTOR SURFACES
41
Patent #:
7675093
Issue Dt:
03/09/2010
Application #:
11605103
Filing Dt:
11/28/2006
Publication #:
US20080122956
Pub Dt:
05/29/2008
Title:
ANTIBLOOMING IMAGING APPARATUS, SYSTEMS, AND METHODS
42
Patent #:
7560782
Issue Dt:
07/14/2009
Application #:
11605190
Filing Dt:
11/27/2006
Publication #:
US20070126064
Pub Dt:
06/07/2007
Title:
TRANSISTOR STRUCTURE WITH HIGH INPUT IMPEDANCE AND HIGH CURRENT CAPABILITY
43
Patent #:
7499345
Issue Dt:
03/03/2009
Application #:
11605209
Filing Dt:
11/27/2006
Publication #:
US20080018380
Pub Dt:
01/24/2008
Title:
NON-VOLATILE MEMORY IMPLEMENTED WITH LOW-VOLTAGES TRANSISTORS AND RELATED SYSTEM AND METHOD
44
Patent #:
7544984
Issue Dt:
06/09/2009
Application #:
11606479
Filing Dt:
11/30/2006
Publication #:
US20070075401
Pub Dt:
04/05/2007
Title:
GETTERING USING VOIDS FORMED BY SURFACE TRANSFORMATION
45
Patent #:
8084846
Issue Dt:
12/27/2011
Application #:
11606497
Filing Dt:
11/29/2006
Publication #:
US20080122072
Pub Dt:
05/29/2008
Title:
BALANCED SEMICONDUCTOR DEVICE PACKAGES INCLUDING LEAD FRAME WITH FLOATING LEADS AND ASSOCIATED METHODS
46
Patent #:
7564082
Issue Dt:
07/21/2009
Application #:
11606503
Filing Dt:
11/30/2006
Publication #:
US20070080335
Pub Dt:
04/12/2007
Title:
GETTERING USING VOIDS FORMED BY SURFACE TRANSFORMATION
47
Patent #:
7807575
Issue Dt:
10/05/2010
Application #:
11606613
Filing Dt:
11/29/2006
Publication #:
US20080122125
Pub Dt:
05/29/2008
Title:
METHODS TO REDUCE THE CRITICAL DIMENSION OF SEMICONDUCTOR DEVICES
48
Patent #:
7378891
Issue Dt:
05/27/2008
Application #:
11606757
Filing Dt:
11/30/2006
Publication #:
US20070075763
Pub Dt:
04/05/2007
Title:
MEASURE-CONTROLLED CIRCUIT WITH FREQUENCY CONTROL
49
Patent #:
7423456
Issue Dt:
09/09/2008
Application #:
11607614
Filing Dt:
12/01/2006
Publication #:
US20080130396
Pub Dt:
06/05/2008
Title:
FAST RESPONSE TIME, LOW POWER PHASE DETECTOR CIRCUITS, DEVICES AND SYSTEMS INCORPORATING THE SAME, AND ASSOCIATED METHODS
50
Patent #:
7776762
Issue Dt:
08/17/2010
Application #:
11608281
Filing Dt:
12/08/2006
Publication #:
US20070087563
Pub Dt:
04/19/2007
Title:
ZIRCONIUM-DOPED TANTALUM OXIDE FILMS
51
Patent #:
7867919
Issue Dt:
01/11/2011
Application #:
11608286
Filing Dt:
12/08/2006
Publication #:
US20070099366
Pub Dt:
05/03/2007
Title:
METHOD OF FABRICATING AN APPARATUS HAVING A LANTHANUM-METAL OXIDE DIELECTRIC LAYER
52
Patent #:
7541851
Issue Dt:
06/02/2009
Application #:
11608903
Filing Dt:
12/11/2006
Publication #:
US20080136475
Pub Dt:
06/12/2008
Title:
CONTROL OF A VARIABLE DELAY LINE USING LINE ENTRY POINT TO MODIFY LINE POWER SUPPLY VOLTAGE
53
Patent #:
7935997
Issue Dt:
05/03/2011
Application #:
11612588
Filing Dt:
12/19/2006
Publication #:
US20070158749
Pub Dt:
07/12/2007
Title:
LOW RESISTANCE PERIPHERAL CONTACTS WHILE MAINTAINING DRAM ARRAY INTEGRITY
54
Patent #:
7716510
Issue Dt:
05/11/2010
Application #:
11612798
Filing Dt:
12/19/2006
Publication #:
US20080144423
Pub Dt:
06/19/2008
Title:
TIMING SYNCHRONIZATION CIRCUIT WITH LOOP COUNTER
55
Patent #:
7271052
Issue Dt:
09/18/2007
Application #:
11613131
Filing Dt:
12/19/2006
Title:
LONG RETENTION TIME SINGLE TRANSISTOR VERTICAL MEMORY GAIN CELL
56
Patent #:
NONE
Issue Dt:
Application #:
11614213
Filing Dt:
12/21/2006
Publication #:
US20070099443
Pub Dt:
05/03/2007
Title:
METHODS FOR MANUFACTURING MEMORY MODULES
57
Patent #:
9076888
Issue Dt:
07/07/2015
Application #:
11614802
Filing Dt:
12/21/2006
Publication #:
US20070105357
Pub Dt:
05/10/2007
Title:
SILICIDED RECESSED SILICON
58
Patent #:
7642660
Issue Dt:
01/05/2010
Application #:
11616164
Filing Dt:
12/26/2006
Publication #:
US20070102817
Pub Dt:
05/10/2007
Title:
METHOD AND APPARATUS FOR REDUCING ELECTRICAL INTERCONNECTION FATIGUE
59
Patent #:
7459742
Issue Dt:
12/02/2008
Application #:
11616511
Filing Dt:
12/27/2006
Publication #:
US20070111436
Pub Dt:
05/17/2007
Title:
METHOD OF MANUFACTURING SIDEWALL SPACERS ON A MEMORY DEVICE, AND DEVICE COMPRISING SAME
60
Patent #:
7968369
Issue Dt:
06/28/2011
Application #:
11617567
Filing Dt:
12/28/2006
Publication #:
US20070105272
Pub Dt:
05/10/2007
Title:
MICROELECTRONIC DEVICES AND MICROELECTRONIC SUPPORT DEVICES, AND ASSOCIATED ASSEMBLIES AND METHODS
61
Patent #:
7544624
Issue Dt:
06/09/2009
Application #:
11619130
Filing Dt:
01/02/2007
Publication #:
US20070102400
Pub Dt:
05/10/2007
Title:
SYSTEMS AND METHODS FOR PROCESSING MICROFEATURE WORKPIECES
62
Patent #:
7352643
Issue Dt:
04/01/2008
Application #:
11619414
Filing Dt:
01/03/2007
Publication #:
US20070109877
Pub Dt:
05/17/2007
Title:
REGULATING VOLTAGES FOR REFRESH OPERATION USING FLASH TRIM BITS IN SEMICONDUCTOR MEMORY DEVICES
63
Patent #:
8093638
Issue Dt:
01/10/2012
Application #:
11621401
Filing Dt:
01/09/2007
Publication #:
US20070111544
Pub Dt:
05/17/2007
Title:
SYSTEMS WITH A GATE DIELECTRIC HAVING MULTIPLE LANTHANIDE OXIDE LAYERS
64
Patent #:
7626219
Issue Dt:
12/01/2009
Application #:
11622148
Filing Dt:
01/11/2007
Publication #:
US20070114576
Pub Dt:
05/24/2007
Title:
SURROUND GATE ACCESS TRANSISTORS WITH GROWN ULTRA-THIN BODIES
65
Patent #:
7479440
Issue Dt:
01/20/2009
Application #:
11622374
Filing Dt:
01/11/2007
Publication #:
US20070111470
Pub Dt:
05/17/2007
Title:
METHOD OF FORMING AN ISOLATION STRUCTURE THAT INCLUDES FORMING A SILICON LAYER AT A BASE OF THE RECESS
66
Patent #:
7532507
Issue Dt:
05/12/2009
Application #:
11623657
Filing Dt:
01/16/2007
Publication #:
US20070165452
Pub Dt:
07/19/2007
Title:
PHASE CHANGE MEMORY DEVICE AND METHOD FOR MANUFACTURING PHASE CHANGE MEMORY DEVICE
67
Patent #:
7678714
Issue Dt:
03/16/2010
Application #:
11624993
Filing Dt:
01/19/2007
Publication #:
US20080108183
Pub Dt:
05/08/2008
Title:
METHOD FOR MANUFACTURING DYNAMIC RANDOM ACCESS MEMORY
68
Patent #:
7667258
Issue Dt:
02/23/2010
Application #:
11625130
Filing Dt:
01/19/2007
Publication #:
US20070117335
Pub Dt:
05/24/2007
Title:
DOUBLE-SIDED CONTAINER CAPACITORS USING A SACRIFICIAL LAYER
69
Patent #:
7405447
Issue Dt:
07/29/2008
Application #:
11625846
Filing Dt:
01/23/2007
Publication #:
US20070117381
Pub Dt:
05/24/2007
Title:
SILICON RICH BARRIER LAYERS FOR INTEGRATED CIRCUIT DEVICES
70
Patent #:
7405966
Issue Dt:
07/29/2008
Application #:
11626256
Filing Dt:
01/23/2007
Publication #:
US20070127303
Pub Dt:
06/07/2007
Title:
MAGNETIC TUNNELING JUNCTION ANTIFUSE DEVICE
71
Patent #:
7741150
Issue Dt:
06/22/2010
Application #:
11626683
Filing Dt:
01/24/2007
Publication #:
US20080128900
Pub Dt:
06/05/2008
Title:
PACKAGED MICROELECTRONIC DEVICES AND METHODS FOR MANUFACTURING PACKAGED MICROELECTRONIC DEVICES
72
Patent #:
7385259
Issue Dt:
06/10/2008
Application #:
11627067
Filing Dt:
01/25/2007
Publication #:
US20070114615
Pub Dt:
05/24/2007
Title:
METHOD OF MANUFACTURING A MULTILAYERED DOPED CONDUCTOR FOR A CONTACT IN AN INTEGRATED CIRCUIT DEVICE
73
Patent #:
7612574
Issue Dt:
11/03/2009
Application #:
11627108
Filing Dt:
01/25/2007
Publication #:
US20080180116
Pub Dt:
07/31/2008
Title:
SYSTEMS AND METHODS FOR DEFECT TESTING OF EXTERNALLY ACCESSIBLE INTEGRATED CIRCUIT INTERCONNECTS
74
Patent #:
7838920
Issue Dt:
11/23/2010
Application #:
11633211
Filing Dt:
12/04/2006
Publication #:
US20080130372
Pub Dt:
06/05/2008
Title:
TRENCH MEMORY STRUCTURES AND OPERATION
75
Patent #:
7683430
Issue Dt:
03/23/2010
Application #:
11633311
Filing Dt:
12/04/2006
Publication #:
US20070138530
Pub Dt:
06/21/2007
Title:
ELECTRICALLY FLOATING BODY MEMORY CELL AND ARRAY, AND METHOD OF OPERATING OR CONTROLLING SAME
76
Patent #:
7589573
Issue Dt:
09/15/2009
Application #:
11633862
Filing Dt:
12/05/2006
Publication #:
US20070080727
Pub Dt:
04/12/2007
Title:
STARTUP CIRCUIT AND METHOD
77
Patent #:
7551510
Issue Dt:
06/23/2009
Application #:
11635708
Filing Dt:
12/07/2006
Publication #:
US20070081411
Pub Dt:
04/12/2007
Title:
MEMORY BLOCK REALLOCATION IN A FLASH MEMORY DEVICE
78
Patent #:
7531443
Issue Dt:
05/12/2009
Application #:
11635902
Filing Dt:
12/08/2006
Publication #:
US20080138975
Pub Dt:
06/12/2008
Title:
METHOD AND SYSTEM FOR FABRICATING SEMICONDUCTOR COMPONENTS WITH THROUGH INTERCONNECTS AND BACK SIDE REDISTRIBUTION CONDUCTORS
79
Patent #:
8652912
Issue Dt:
02/18/2014
Application #:
11636192
Filing Dt:
12/08/2006
Publication #:
US20080135903
Pub Dt:
06/12/2008
Title:
Methods of Fabricating a Transistor Gate Including Cobalt Silicide
80
Patent #:
7606078
Issue Dt:
10/20/2009
Application #:
11636382
Filing Dt:
12/08/2006
Publication #:
US20070147130
Pub Dt:
06/28/2007
Title:
METHOD FOR PROGRAMMING OF MEMORY CELLS, IN PARTICULAR OF THE FLASH TYPE, AND CORRESPONDING PROGRAMMING ARCHITECTURE
81
Patent #:
7732926
Issue Dt:
06/08/2010
Application #:
11636612
Filing Dt:
12/11/2006
Publication #:
US20070134819
Pub Dt:
06/14/2007
Title:
SEMICONDUCTOR DEVICE HAVING A THROUGH ELECTRODE WITH A LOW RESISTANCE AND METHOD OF MANUFACTURING THE SAME
82
Patent #:
7511354
Issue Dt:
03/31/2009
Application #:
11636658
Filing Dt:
12/11/2006
Publication #:
US20070080424
Pub Dt:
04/12/2007
Title:
WELL FOR CMOS IMAGER AND METHOD OF FORMATION
83
Patent #:
7601586
Issue Dt:
10/13/2009
Application #:
11637298
Filing Dt:
12/12/2006
Publication #:
US20070087498
Pub Dt:
04/19/2007
Title:
METHODS OF FORMING BURIED BIT LINE DRAM CIRCUITRY
84
Patent #:
7648872
Issue Dt:
01/19/2010
Application #:
11638223
Filing Dt:
12/11/2006
Publication #:
US20080138948
Pub Dt:
06/12/2008
Title:
METHODS OF FORMING DRAM ARRAYS
85
Patent #:
7463051
Issue Dt:
12/09/2008
Application #:
11638321
Filing Dt:
12/13/2006
Publication #:
US20070159236
Pub Dt:
07/12/2007
Title:
OUTPUT BUFFER
86
Patent #:
7257022
Issue Dt:
08/14/2007
Application #:
11638772
Filing Dt:
12/14/2006
Publication #:
US20070091661
Pub Dt:
04/26/2007
Title:
NANOCRYSTAL WRITE ONCE READ ONLY MEMORY FOR ARCHIVAL STORAGE
87
Patent #:
7493442
Issue Dt:
02/17/2009
Application #:
11638971
Filing Dt:
12/13/2006
Publication #:
US20070088907
Pub Dt:
04/19/2007
Title:
MULTIPLE SEGMENT DATA OBJECT MANAGEMENT
88
Patent #:
7573087
Issue Dt:
08/11/2009
Application #:
11639218
Filing Dt:
12/15/2006
Publication #:
US20070096190
Pub Dt:
05/03/2007
Title:
INTERCONNECT LINE SELECTIVELY ISOLATED FROM AN UNDERLYING CONTACT PLUG
89
Patent #:
7558125
Issue Dt:
07/07/2009
Application #:
11639452
Filing Dt:
12/15/2006
Publication #:
US20080144398
Pub Dt:
06/19/2008
Title:
INPUT BUFFER AND METHOD WITH AC POSITIVE FEEDBACK, AND A MEMORY DEVICE AND COMPUTER SYSTEM USING SAME
90
Patent #:
8485863
Issue Dt:
07/16/2013
Application #:
11639659
Filing Dt:
12/15/2006
Publication #:
US20070093185
Pub Dt:
04/26/2007
Title:
Polishing liquids for activating and/or conditioning fixed abrasive polishing pads, and associated systems and methods
91
Patent #:
7749885
Issue Dt:
07/06/2010
Application #:
11639771
Filing Dt:
12/15/2006
Publication #:
US20080142982
Pub Dt:
06/19/2008
Title:
SEMICONDUCTOR PROCESSING METHODS, METHODS OF FORMING CONTACT PADS, AND METHODS OF FORMING ELECTRICAL CONNECTIONS BETWEEN METAL-CONTAINING LAYERS
92
Patent #:
8729787
Issue Dt:
05/20/2014
Application #:
11640701
Filing Dt:
12/18/2006
Publication #:
US20080143230
Pub Dt:
06/19/2008
Title:
Field emission devices and methods for making the same
93
Patent #:
7515485
Issue Dt:
04/07/2009
Application #:
11641586
Filing Dt:
12/18/2006
Publication #:
US20080144376
Pub Dt:
06/19/2008
Title:
EXTERNAL CLOCK TRACKING PIPELINED LATCH SCHEME
94
Patent #:
7592107
Issue Dt:
09/22/2009
Application #:
11642023
Filing Dt:
12/18/2006
Publication #:
US20070122720
Pub Dt:
05/31/2007
Title:
POLARIZED RETICLE, PHOTOLITHOGRAPHY SYSTEM, AND METHOD OF FABRICATING A POLARIZED RETICLE
95
Patent #:
7620859
Issue Dt:
11/17/2009
Application #:
11642038
Filing Dt:
12/19/2006
Publication #:
US20080086604
Pub Dt:
04/10/2008
Title:
FILTERED REGISTER ARCHITECTURE TO GENERATE ACTUATOR SIGNALS
96
Patent #:
7281952
Issue Dt:
10/16/2007
Application #:
11642346
Filing Dt:
12/20/2006
Publication #:
US20070093139
Pub Dt:
04/26/2007
Title:
EDGE CONNECTOR INCLUDING INTERNAL LAYER CONTACT, PRINTED CIRCUIT BOARD AND ELECTRONIC MODULE INCORPORATING SAME
97
Patent #:
7423923
Issue Dt:
09/09/2008
Application #:
11642810
Filing Dt:
12/19/2006
Publication #:
US20070097764
Pub Dt:
05/03/2007
Title:
CAPACITOR SUPPORTED PRECHARGING OF MEMORY DIGIT LINES
98
Patent #:
7366045
Issue Dt:
04/29/2008
Application #:
11643689
Filing Dt:
12/22/2006
Publication #:
US20070104010
Pub Dt:
05/10/2007
Title:
POWER CIRCUITS FOR REDUCING A NUMBER OF POWER SUPPLY VOLTAGE TAPS REQUIRED FOR SENSING A RESISTIVE MEMORY
99
Patent #:
7307901
Issue Dt:
12/11/2007
Application #:
11644642
Filing Dt:
12/22/2006
Publication #:
US20070104018
Pub Dt:
05/10/2007
Title:
APPARATUS AND METHOD FOR IMPROVING DYNAMIC REFRESH IN A MEMORY DEVICE
100
Patent #:
7701765
Issue Dt:
04/20/2010
Application #:
11646658
Filing Dt:
12/28/2006
Publication #:
US20080158951
Pub Dt:
07/03/2008
Title:
NON-VOLATILE MULTILEVEL MEMORY CELL PROGRAMMING
Assignor
1
MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Exec Dt:
07/31/2019
Assignee
1
MICRON TECHNOLOGY, INC.
8000 S FEDERAL WAY
BOISE, IDAHO 83707
Correspondence name and address
WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
ONE MARKET, SPEAR TOWER, SUITE 3300
SAN FRANCISCO, CA 94105

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